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memory: move ioeventfd ops to MemoryListener
[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #define WANT_EXEC_OBSOLETE
24 #include "exec-obsolete.h"
25
26 unsigned memory_region_transaction_depth = 0;
27 static bool memory_region_update_pending = false;
28 static bool global_dirty_log = false;
29
30 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
31 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
32
33 typedef struct AddrRange AddrRange;
34
35 /*
36 * Note using signed integers limits us to physical addresses at most
37 * 63 bits wide. They are needed for negative offsetting in aliases
38 * (large MemoryRegion::alias_offset).
39 */
40 struct AddrRange {
41 Int128 start;
42 Int128 size;
43 };
44
45 static AddrRange addrrange_make(Int128 start, Int128 size)
46 {
47 return (AddrRange) { start, size };
48 }
49
50 static bool addrrange_equal(AddrRange r1, AddrRange r2)
51 {
52 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
53 }
54
55 static Int128 addrrange_end(AddrRange r)
56 {
57 return int128_add(r.start, r.size);
58 }
59
60 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
61 {
62 int128_addto(&range.start, delta);
63 return range;
64 }
65
66 static bool addrrange_contains(AddrRange range, Int128 addr)
67 {
68 return int128_ge(addr, range.start)
69 && int128_lt(addr, addrrange_end(range));
70 }
71
72 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
73 {
74 return addrrange_contains(r1, r2.start)
75 || addrrange_contains(r2, r1.start);
76 }
77
78 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
79 {
80 Int128 start = int128_max(r1.start, r2.start);
81 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
82 return addrrange_make(start, int128_sub(end, start));
83 }
84
85 enum ListenerDirection { Forward, Reverse };
86
87 #define MEMORY_LISTENER_CALL(_callback, _direction, _args...) \
88 do { \
89 MemoryListener *_listener; \
90 \
91 switch (_direction) { \
92 case Forward: \
93 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
94 _listener->_callback(_listener, ##_args); \
95 } \
96 break; \
97 case Reverse: \
98 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
99 memory_listeners, link) { \
100 _listener->_callback(_listener, ##_args); \
101 } \
102 break; \
103 default: \
104 abort(); \
105 } \
106 } while (0)
107
108 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
109 MEMORY_LISTENER_CALL(callback, dir, &(MemoryRegionSection) { \
110 .mr = (fr)->mr, \
111 .address_space = (as)->root, \
112 .offset_within_region = (fr)->offset_in_region, \
113 .size = int128_get64((fr)->addr.size), \
114 .offset_within_address_space = int128_get64((fr)->addr.start), \
115 })
116
117 struct CoalescedMemoryRange {
118 AddrRange addr;
119 QTAILQ_ENTRY(CoalescedMemoryRange) link;
120 };
121
122 struct MemoryRegionIoeventfd {
123 AddrRange addr;
124 bool match_data;
125 uint64_t data;
126 int fd;
127 };
128
129 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
130 MemoryRegionIoeventfd b)
131 {
132 if (int128_lt(a.addr.start, b.addr.start)) {
133 return true;
134 } else if (int128_gt(a.addr.start, b.addr.start)) {
135 return false;
136 } else if (int128_lt(a.addr.size, b.addr.size)) {
137 return true;
138 } else if (int128_gt(a.addr.size, b.addr.size)) {
139 return false;
140 } else if (a.match_data < b.match_data) {
141 return true;
142 } else if (a.match_data > b.match_data) {
143 return false;
144 } else if (a.match_data) {
145 if (a.data < b.data) {
146 return true;
147 } else if (a.data > b.data) {
148 return false;
149 }
150 }
151 if (a.fd < b.fd) {
152 return true;
153 } else if (a.fd > b.fd) {
154 return false;
155 }
156 return false;
157 }
158
159 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
160 MemoryRegionIoeventfd b)
161 {
162 return !memory_region_ioeventfd_before(a, b)
163 && !memory_region_ioeventfd_before(b, a);
164 }
165
166 typedef struct FlatRange FlatRange;
167 typedef struct FlatView FlatView;
168
169 /* Range of memory in the global map. Addresses are absolute. */
170 struct FlatRange {
171 MemoryRegion *mr;
172 target_phys_addr_t offset_in_region;
173 AddrRange addr;
174 uint8_t dirty_log_mask;
175 bool readable;
176 bool readonly;
177 };
178
179 /* Flattened global view of current active memory hierarchy. Kept in sorted
180 * order.
181 */
182 struct FlatView {
183 FlatRange *ranges;
184 unsigned nr;
185 unsigned nr_allocated;
186 };
187
188 typedef struct AddressSpace AddressSpace;
189 typedef struct AddressSpaceOps AddressSpaceOps;
190
191 /* A system address space - I/O, memory, etc. */
192 struct AddressSpace {
193 const AddressSpaceOps *ops;
194 MemoryRegion *root;
195 FlatView current_map;
196 int ioeventfd_nb;
197 MemoryRegionIoeventfd *ioeventfds;
198 };
199
200 struct AddressSpaceOps {
201 void (*range_add)(AddressSpace *as, FlatRange *fr);
202 void (*range_del)(AddressSpace *as, FlatRange *fr);
203 void (*log_start)(AddressSpace *as, FlatRange *fr);
204 void (*log_stop)(AddressSpace *as, FlatRange *fr);
205 };
206
207 #define FOR_EACH_FLAT_RANGE(var, view) \
208 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
209
210 static bool flatrange_equal(FlatRange *a, FlatRange *b)
211 {
212 return a->mr == b->mr
213 && addrrange_equal(a->addr, b->addr)
214 && a->offset_in_region == b->offset_in_region
215 && a->readable == b->readable
216 && a->readonly == b->readonly;
217 }
218
219 static void flatview_init(FlatView *view)
220 {
221 view->ranges = NULL;
222 view->nr = 0;
223 view->nr_allocated = 0;
224 }
225
226 /* Insert a range into a given position. Caller is responsible for maintaining
227 * sorting order.
228 */
229 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
230 {
231 if (view->nr == view->nr_allocated) {
232 view->nr_allocated = MAX(2 * view->nr, 10);
233 view->ranges = g_realloc(view->ranges,
234 view->nr_allocated * sizeof(*view->ranges));
235 }
236 memmove(view->ranges + pos + 1, view->ranges + pos,
237 (view->nr - pos) * sizeof(FlatRange));
238 view->ranges[pos] = *range;
239 ++view->nr;
240 }
241
242 static void flatview_destroy(FlatView *view)
243 {
244 g_free(view->ranges);
245 }
246
247 static bool can_merge(FlatRange *r1, FlatRange *r2)
248 {
249 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
250 && r1->mr == r2->mr
251 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
252 r1->addr.size),
253 int128_make64(r2->offset_in_region))
254 && r1->dirty_log_mask == r2->dirty_log_mask
255 && r1->readable == r2->readable
256 && r1->readonly == r2->readonly;
257 }
258
259 /* Attempt to simplify a view by merging ajacent ranges */
260 static void flatview_simplify(FlatView *view)
261 {
262 unsigned i, j;
263
264 i = 0;
265 while (i < view->nr) {
266 j = i + 1;
267 while (j < view->nr
268 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
269 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
270 ++j;
271 }
272 ++i;
273 memmove(&view->ranges[i], &view->ranges[j],
274 (view->nr - j) * sizeof(view->ranges[j]));
275 view->nr -= j - i;
276 }
277 }
278
279 static void memory_region_read_accessor(void *opaque,
280 target_phys_addr_t addr,
281 uint64_t *value,
282 unsigned size,
283 unsigned shift,
284 uint64_t mask)
285 {
286 MemoryRegion *mr = opaque;
287 uint64_t tmp;
288
289 tmp = mr->ops->read(mr->opaque, addr, size);
290 *value |= (tmp & mask) << shift;
291 }
292
293 static void memory_region_write_accessor(void *opaque,
294 target_phys_addr_t addr,
295 uint64_t *value,
296 unsigned size,
297 unsigned shift,
298 uint64_t mask)
299 {
300 MemoryRegion *mr = opaque;
301 uint64_t tmp;
302
303 tmp = (*value >> shift) & mask;
304 mr->ops->write(mr->opaque, addr, tmp, size);
305 }
306
307 static void access_with_adjusted_size(target_phys_addr_t addr,
308 uint64_t *value,
309 unsigned size,
310 unsigned access_size_min,
311 unsigned access_size_max,
312 void (*access)(void *opaque,
313 target_phys_addr_t addr,
314 uint64_t *value,
315 unsigned size,
316 unsigned shift,
317 uint64_t mask),
318 void *opaque)
319 {
320 uint64_t access_mask;
321 unsigned access_size;
322 unsigned i;
323
324 if (!access_size_min) {
325 access_size_min = 1;
326 }
327 if (!access_size_max) {
328 access_size_max = 4;
329 }
330 access_size = MAX(MIN(size, access_size_max), access_size_min);
331 access_mask = -1ULL >> (64 - access_size * 8);
332 for (i = 0; i < size; i += access_size) {
333 /* FIXME: big-endian support */
334 access(opaque, addr + i, value, access_size, i * 8, access_mask);
335 }
336 }
337
338 static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
339 {
340 MemoryRegionSection section = {
341 .mr = fr->mr,
342 .offset_within_address_space = int128_get64(fr->addr.start),
343 .offset_within_region = fr->offset_in_region,
344 .size = int128_get64(fr->addr.size),
345 };
346
347 cpu_register_physical_memory_log(&section, fr->readable, fr->readonly);
348 }
349
350 static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
351 {
352 MemoryRegionSection section = {
353 .mr = &io_mem_unassigned,
354 .offset_within_address_space = int128_get64(fr->addr.start),
355 .offset_within_region = int128_get64(fr->addr.start),
356 .size = int128_get64(fr->addr.size),
357 };
358
359 cpu_register_physical_memory_log(&section, true, false);
360 }
361
362 static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
363 {
364 }
365
366 static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
367 {
368 }
369
370 static const AddressSpaceOps address_space_ops_memory = {
371 .range_add = as_memory_range_add,
372 .range_del = as_memory_range_del,
373 .log_start = as_memory_log_start,
374 .log_stop = as_memory_log_stop,
375 };
376
377 static AddressSpace address_space_memory = {
378 .ops = &address_space_ops_memory,
379 };
380
381 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
382 unsigned width, bool write)
383 {
384 const MemoryRegionPortio *mrp;
385
386 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
387 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
388 && width == mrp->size
389 && (write ? (bool)mrp->write : (bool)mrp->read)) {
390 return mrp;
391 }
392 }
393 return NULL;
394 }
395
396 static void memory_region_iorange_read(IORange *iorange,
397 uint64_t offset,
398 unsigned width,
399 uint64_t *data)
400 {
401 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
402
403 if (mr->ops->old_portio) {
404 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
405
406 *data = ((uint64_t)1 << (width * 8)) - 1;
407 if (mrp) {
408 *data = mrp->read(mr->opaque, offset);
409 } else if (width == 2) {
410 mrp = find_portio(mr, offset, 1, false);
411 assert(mrp);
412 *data = mrp->read(mr->opaque, offset) |
413 (mrp->read(mr->opaque, offset + 1) << 8);
414 }
415 return;
416 }
417 *data = 0;
418 access_with_adjusted_size(offset, data, width,
419 mr->ops->impl.min_access_size,
420 mr->ops->impl.max_access_size,
421 memory_region_read_accessor, mr);
422 }
423
424 static void memory_region_iorange_write(IORange *iorange,
425 uint64_t offset,
426 unsigned width,
427 uint64_t data)
428 {
429 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
430
431 if (mr->ops->old_portio) {
432 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
433
434 if (mrp) {
435 mrp->write(mr->opaque, offset, data);
436 } else if (width == 2) {
437 mrp = find_portio(mr, offset, 1, false);
438 assert(mrp);
439 mrp->write(mr->opaque, offset, data & 0xff);
440 mrp->write(mr->opaque, offset + 1, data >> 8);
441 }
442 return;
443 }
444 access_with_adjusted_size(offset, &data, width,
445 mr->ops->impl.min_access_size,
446 mr->ops->impl.max_access_size,
447 memory_region_write_accessor, mr);
448 }
449
450 static const IORangeOps memory_region_iorange_ops = {
451 .read = memory_region_iorange_read,
452 .write = memory_region_iorange_write,
453 };
454
455 static void as_io_range_add(AddressSpace *as, FlatRange *fr)
456 {
457 iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
458 int128_get64(fr->addr.start), int128_get64(fr->addr.size));
459 ioport_register(&fr->mr->iorange);
460 }
461
462 static void as_io_range_del(AddressSpace *as, FlatRange *fr)
463 {
464 isa_unassign_ioport(int128_get64(fr->addr.start),
465 int128_get64(fr->addr.size));
466 }
467
468 static const AddressSpaceOps address_space_ops_io = {
469 .range_add = as_io_range_add,
470 .range_del = as_io_range_del,
471 };
472
473 static AddressSpace address_space_io = {
474 .ops = &address_space_ops_io,
475 };
476
477 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
478 {
479 while (mr->parent) {
480 mr = mr->parent;
481 }
482 if (mr == address_space_memory.root) {
483 return &address_space_memory;
484 }
485 if (mr == address_space_io.root) {
486 return &address_space_io;
487 }
488 abort();
489 }
490
491 /* Render a memory region into the global view. Ranges in @view obscure
492 * ranges in @mr.
493 */
494 static void render_memory_region(FlatView *view,
495 MemoryRegion *mr,
496 Int128 base,
497 AddrRange clip,
498 bool readonly)
499 {
500 MemoryRegion *subregion;
501 unsigned i;
502 target_phys_addr_t offset_in_region;
503 Int128 remain;
504 Int128 now;
505 FlatRange fr;
506 AddrRange tmp;
507
508 if (!mr->enabled) {
509 return;
510 }
511
512 int128_addto(&base, int128_make64(mr->addr));
513 readonly |= mr->readonly;
514
515 tmp = addrrange_make(base, mr->size);
516
517 if (!addrrange_intersects(tmp, clip)) {
518 return;
519 }
520
521 clip = addrrange_intersection(tmp, clip);
522
523 if (mr->alias) {
524 int128_subfrom(&base, int128_make64(mr->alias->addr));
525 int128_subfrom(&base, int128_make64(mr->alias_offset));
526 render_memory_region(view, mr->alias, base, clip, readonly);
527 return;
528 }
529
530 /* Render subregions in priority order. */
531 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
532 render_memory_region(view, subregion, base, clip, readonly);
533 }
534
535 if (!mr->terminates) {
536 return;
537 }
538
539 offset_in_region = int128_get64(int128_sub(clip.start, base));
540 base = clip.start;
541 remain = clip.size;
542
543 /* Render the region itself into any gaps left by the current view. */
544 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
545 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
546 continue;
547 }
548 if (int128_lt(base, view->ranges[i].addr.start)) {
549 now = int128_min(remain,
550 int128_sub(view->ranges[i].addr.start, base));
551 fr.mr = mr;
552 fr.offset_in_region = offset_in_region;
553 fr.addr = addrrange_make(base, now);
554 fr.dirty_log_mask = mr->dirty_log_mask;
555 fr.readable = mr->readable;
556 fr.readonly = readonly;
557 flatview_insert(view, i, &fr);
558 ++i;
559 int128_addto(&base, now);
560 offset_in_region += int128_get64(now);
561 int128_subfrom(&remain, now);
562 }
563 if (int128_eq(base, view->ranges[i].addr.start)) {
564 now = int128_min(remain, view->ranges[i].addr.size);
565 int128_addto(&base, now);
566 offset_in_region += int128_get64(now);
567 int128_subfrom(&remain, now);
568 }
569 }
570 if (int128_nz(remain)) {
571 fr.mr = mr;
572 fr.offset_in_region = offset_in_region;
573 fr.addr = addrrange_make(base, remain);
574 fr.dirty_log_mask = mr->dirty_log_mask;
575 fr.readable = mr->readable;
576 fr.readonly = readonly;
577 flatview_insert(view, i, &fr);
578 }
579 }
580
581 /* Render a memory topology into a list of disjoint absolute ranges. */
582 static FlatView generate_memory_topology(MemoryRegion *mr)
583 {
584 FlatView view;
585
586 flatview_init(&view);
587
588 render_memory_region(&view, mr, int128_zero(),
589 addrrange_make(int128_zero(), int128_2_64()), false);
590 flatview_simplify(&view);
591
592 return view;
593 }
594
595 static void address_space_add_del_ioeventfds(AddressSpace *as,
596 MemoryRegionIoeventfd *fds_new,
597 unsigned fds_new_nb,
598 MemoryRegionIoeventfd *fds_old,
599 unsigned fds_old_nb)
600 {
601 unsigned iold, inew;
602 MemoryRegionIoeventfd *fd;
603 MemoryRegionSection section;
604
605 /* Generate a symmetric difference of the old and new fd sets, adding
606 * and deleting as necessary.
607 */
608
609 iold = inew = 0;
610 while (iold < fds_old_nb || inew < fds_new_nb) {
611 if (iold < fds_old_nb
612 && (inew == fds_new_nb
613 || memory_region_ioeventfd_before(fds_old[iold],
614 fds_new[inew]))) {
615 fd = &fds_old[iold];
616 section = (MemoryRegionSection) {
617 .address_space = as->root,
618 .offset_within_address_space = int128_get64(fd->addr.start),
619 .size = int128_get64(fd->addr.size),
620 };
621 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
622 fd->match_data, fd->data, fd->fd);
623 ++iold;
624 } else if (inew < fds_new_nb
625 && (iold == fds_old_nb
626 || memory_region_ioeventfd_before(fds_new[inew],
627 fds_old[iold]))) {
628 fd = &fds_new[inew];
629 section = (MemoryRegionSection) {
630 .address_space = as->root,
631 .offset_within_address_space = int128_get64(fd->addr.start),
632 .size = int128_get64(fd->addr.size),
633 };
634 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
635 fd->match_data, fd->data, fd->fd);
636 ++inew;
637 } else {
638 ++iold;
639 ++inew;
640 }
641 }
642 }
643
644 static void address_space_update_ioeventfds(AddressSpace *as)
645 {
646 FlatRange *fr;
647 unsigned ioeventfd_nb = 0;
648 MemoryRegionIoeventfd *ioeventfds = NULL;
649 AddrRange tmp;
650 unsigned i;
651
652 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
653 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
654 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
655 int128_sub(fr->addr.start,
656 int128_make64(fr->offset_in_region)));
657 if (addrrange_intersects(fr->addr, tmp)) {
658 ++ioeventfd_nb;
659 ioeventfds = g_realloc(ioeventfds,
660 ioeventfd_nb * sizeof(*ioeventfds));
661 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
662 ioeventfds[ioeventfd_nb-1].addr = tmp;
663 }
664 }
665 }
666
667 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
668 as->ioeventfds, as->ioeventfd_nb);
669
670 g_free(as->ioeventfds);
671 as->ioeventfds = ioeventfds;
672 as->ioeventfd_nb = ioeventfd_nb;
673 }
674
675 static void address_space_update_topology_pass(AddressSpace *as,
676 FlatView old_view,
677 FlatView new_view,
678 bool adding)
679 {
680 unsigned iold, inew;
681 FlatRange *frold, *frnew;
682
683 /* Generate a symmetric difference of the old and new memory maps.
684 * Kill ranges in the old map, and instantiate ranges in the new map.
685 */
686 iold = inew = 0;
687 while (iold < old_view.nr || inew < new_view.nr) {
688 if (iold < old_view.nr) {
689 frold = &old_view.ranges[iold];
690 } else {
691 frold = NULL;
692 }
693 if (inew < new_view.nr) {
694 frnew = &new_view.ranges[inew];
695 } else {
696 frnew = NULL;
697 }
698
699 if (frold
700 && (!frnew
701 || int128_lt(frold->addr.start, frnew->addr.start)
702 || (int128_eq(frold->addr.start, frnew->addr.start)
703 && !flatrange_equal(frold, frnew)))) {
704 /* In old, but (not in new, or in new but attributes changed). */
705
706 if (!adding) {
707 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
708 as->ops->range_del(as, frold);
709 }
710
711 ++iold;
712 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
713 /* In both (logging may have changed) */
714
715 if (adding) {
716 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
717 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
718 as->ops->log_stop(as, frnew);
719 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
720 as->ops->log_start(as, frnew);
721 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
722 }
723 }
724
725 ++iold;
726 ++inew;
727 } else {
728 /* In new */
729
730 if (adding) {
731 as->ops->range_add(as, frnew);
732 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
733 }
734
735 ++inew;
736 }
737 }
738 }
739
740
741 static void address_space_update_topology(AddressSpace *as)
742 {
743 FlatView old_view = as->current_map;
744 FlatView new_view = generate_memory_topology(as->root);
745
746 address_space_update_topology_pass(as, old_view, new_view, false);
747 address_space_update_topology_pass(as, old_view, new_view, true);
748
749 as->current_map = new_view;
750 flatview_destroy(&old_view);
751 address_space_update_ioeventfds(as);
752 }
753
754 static void memory_region_update_topology(MemoryRegion *mr)
755 {
756 if (memory_region_transaction_depth) {
757 memory_region_update_pending |= !mr || mr->enabled;
758 return;
759 }
760
761 if (mr && !mr->enabled) {
762 return;
763 }
764
765 if (address_space_memory.root) {
766 address_space_update_topology(&address_space_memory);
767 }
768 if (address_space_io.root) {
769 address_space_update_topology(&address_space_io);
770 }
771
772 memory_region_update_pending = false;
773 }
774
775 void memory_region_transaction_begin(void)
776 {
777 ++memory_region_transaction_depth;
778 }
779
780 void memory_region_transaction_commit(void)
781 {
782 assert(memory_region_transaction_depth);
783 --memory_region_transaction_depth;
784 if (!memory_region_transaction_depth && memory_region_update_pending) {
785 memory_region_update_topology(NULL);
786 }
787 }
788
789 static void memory_region_destructor_none(MemoryRegion *mr)
790 {
791 }
792
793 static void memory_region_destructor_ram(MemoryRegion *mr)
794 {
795 qemu_ram_free(mr->ram_addr);
796 }
797
798 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
799 {
800 qemu_ram_free_from_ptr(mr->ram_addr);
801 }
802
803 static void memory_region_destructor_iomem(MemoryRegion *mr)
804 {
805 cpu_unregister_io_memory(mr->ram_addr);
806 }
807
808 static void memory_region_destructor_rom_device(MemoryRegion *mr)
809 {
810 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
811 cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK);
812 }
813
814 static bool memory_region_wrong_endianness(MemoryRegion *mr)
815 {
816 #ifdef TARGET_WORDS_BIGENDIAN
817 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
818 #else
819 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
820 #endif
821 }
822
823 void memory_region_init(MemoryRegion *mr,
824 const char *name,
825 uint64_t size)
826 {
827 mr->ops = NULL;
828 mr->parent = NULL;
829 mr->size = int128_make64(size);
830 if (size == UINT64_MAX) {
831 mr->size = int128_2_64();
832 }
833 mr->addr = 0;
834 mr->subpage = false;
835 mr->enabled = true;
836 mr->terminates = false;
837 mr->ram = false;
838 mr->readable = true;
839 mr->readonly = false;
840 mr->rom_device = false;
841 mr->destructor = memory_region_destructor_none;
842 mr->priority = 0;
843 mr->may_overlap = false;
844 mr->alias = NULL;
845 QTAILQ_INIT(&mr->subregions);
846 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
847 QTAILQ_INIT(&mr->coalesced);
848 mr->name = g_strdup(name);
849 mr->dirty_log_mask = 0;
850 mr->ioeventfd_nb = 0;
851 mr->ioeventfds = NULL;
852 }
853
854 static bool memory_region_access_valid(MemoryRegion *mr,
855 target_phys_addr_t addr,
856 unsigned size,
857 bool is_write)
858 {
859 if (mr->ops->valid.accepts
860 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
861 return false;
862 }
863
864 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
865 return false;
866 }
867
868 /* Treat zero as compatibility all valid */
869 if (!mr->ops->valid.max_access_size) {
870 return true;
871 }
872
873 if (size > mr->ops->valid.max_access_size
874 || size < mr->ops->valid.min_access_size) {
875 return false;
876 }
877 return true;
878 }
879
880 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
881 target_phys_addr_t addr,
882 unsigned size)
883 {
884 uint64_t data = 0;
885
886 if (!memory_region_access_valid(mr, addr, size, false)) {
887 return -1U; /* FIXME: better signalling */
888 }
889
890 if (!mr->ops->read) {
891 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
892 }
893
894 /* FIXME: support unaligned access */
895 access_with_adjusted_size(addr, &data, size,
896 mr->ops->impl.min_access_size,
897 mr->ops->impl.max_access_size,
898 memory_region_read_accessor, mr);
899
900 return data;
901 }
902
903 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
904 {
905 if (memory_region_wrong_endianness(mr)) {
906 switch (size) {
907 case 1:
908 break;
909 case 2:
910 *data = bswap16(*data);
911 break;
912 case 4:
913 *data = bswap32(*data);
914 break;
915 default:
916 abort();
917 }
918 }
919 }
920
921 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
922 target_phys_addr_t addr,
923 unsigned size)
924 {
925 uint64_t ret;
926
927 ret = memory_region_dispatch_read1(mr, addr, size);
928 adjust_endianness(mr, &ret, size);
929 return ret;
930 }
931
932 static void memory_region_dispatch_write(MemoryRegion *mr,
933 target_phys_addr_t addr,
934 uint64_t data,
935 unsigned size)
936 {
937 if (!memory_region_access_valid(mr, addr, size, true)) {
938 return; /* FIXME: better signalling */
939 }
940
941 adjust_endianness(mr, &data, size);
942
943 if (!mr->ops->write) {
944 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
945 return;
946 }
947
948 /* FIXME: support unaligned access */
949 access_with_adjusted_size(addr, &data, size,
950 mr->ops->impl.min_access_size,
951 mr->ops->impl.max_access_size,
952 memory_region_write_accessor, mr);
953 }
954
955 void memory_region_init_io(MemoryRegion *mr,
956 const MemoryRegionOps *ops,
957 void *opaque,
958 const char *name,
959 uint64_t size)
960 {
961 memory_region_init(mr, name, size);
962 mr->ops = ops;
963 mr->opaque = opaque;
964 mr->terminates = true;
965 mr->destructor = memory_region_destructor_iomem;
966 mr->ram_addr = cpu_register_io_memory(mr);
967 }
968
969 void memory_region_init_ram(MemoryRegion *mr,
970 const char *name,
971 uint64_t size)
972 {
973 memory_region_init(mr, name, size);
974 mr->ram = true;
975 mr->terminates = true;
976 mr->destructor = memory_region_destructor_ram;
977 mr->ram_addr = qemu_ram_alloc(size, mr);
978 }
979
980 void memory_region_init_ram_ptr(MemoryRegion *mr,
981 const char *name,
982 uint64_t size,
983 void *ptr)
984 {
985 memory_region_init(mr, name, size);
986 mr->ram = true;
987 mr->terminates = true;
988 mr->destructor = memory_region_destructor_ram_from_ptr;
989 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
990 }
991
992 void memory_region_init_alias(MemoryRegion *mr,
993 const char *name,
994 MemoryRegion *orig,
995 target_phys_addr_t offset,
996 uint64_t size)
997 {
998 memory_region_init(mr, name, size);
999 mr->alias = orig;
1000 mr->alias_offset = offset;
1001 }
1002
1003 void memory_region_init_rom_device(MemoryRegion *mr,
1004 const MemoryRegionOps *ops,
1005 void *opaque,
1006 const char *name,
1007 uint64_t size)
1008 {
1009 memory_region_init(mr, name, size);
1010 mr->ops = ops;
1011 mr->opaque = opaque;
1012 mr->terminates = true;
1013 mr->rom_device = true;
1014 mr->destructor = memory_region_destructor_rom_device;
1015 mr->ram_addr = qemu_ram_alloc(size, mr);
1016 mr->ram_addr |= cpu_register_io_memory(mr);
1017 }
1018
1019 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
1020 unsigned size)
1021 {
1022 MemoryRegion *mr = opaque;
1023
1024 if (!mr->warning_printed) {
1025 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
1026 mr->warning_printed = true;
1027 }
1028 return -1U;
1029 }
1030
1031 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
1032 unsigned size)
1033 {
1034 MemoryRegion *mr = opaque;
1035
1036 if (!mr->warning_printed) {
1037 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1038 mr->warning_printed = true;
1039 }
1040 }
1041
1042 static const MemoryRegionOps reservation_ops = {
1043 .read = invalid_read,
1044 .write = invalid_write,
1045 .endianness = DEVICE_NATIVE_ENDIAN,
1046 };
1047
1048 void memory_region_init_reservation(MemoryRegion *mr,
1049 const char *name,
1050 uint64_t size)
1051 {
1052 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1053 }
1054
1055 void memory_region_destroy(MemoryRegion *mr)
1056 {
1057 assert(QTAILQ_EMPTY(&mr->subregions));
1058 mr->destructor(mr);
1059 memory_region_clear_coalescing(mr);
1060 g_free((char *)mr->name);
1061 g_free(mr->ioeventfds);
1062 }
1063
1064 uint64_t memory_region_size(MemoryRegion *mr)
1065 {
1066 if (int128_eq(mr->size, int128_2_64())) {
1067 return UINT64_MAX;
1068 }
1069 return int128_get64(mr->size);
1070 }
1071
1072 const char *memory_region_name(MemoryRegion *mr)
1073 {
1074 return mr->name;
1075 }
1076
1077 bool memory_region_is_ram(MemoryRegion *mr)
1078 {
1079 return mr->ram;
1080 }
1081
1082 bool memory_region_is_logging(MemoryRegion *mr)
1083 {
1084 return mr->dirty_log_mask;
1085 }
1086
1087 bool memory_region_is_rom(MemoryRegion *mr)
1088 {
1089 return mr->ram && mr->readonly;
1090 }
1091
1092 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1093 {
1094 uint8_t mask = 1 << client;
1095
1096 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1097 memory_region_update_topology(mr);
1098 }
1099
1100 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1101 target_phys_addr_t size, unsigned client)
1102 {
1103 assert(mr->terminates);
1104 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1105 1 << client);
1106 }
1107
1108 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1109 target_phys_addr_t size)
1110 {
1111 assert(mr->terminates);
1112 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1113 }
1114
1115 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1116 {
1117 FlatRange *fr;
1118
1119 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1120 if (fr->mr == mr) {
1121 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory,
1122 Forward, log_sync);
1123 }
1124 }
1125 }
1126
1127 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1128 {
1129 if (mr->readonly != readonly) {
1130 mr->readonly = readonly;
1131 memory_region_update_topology(mr);
1132 }
1133 }
1134
1135 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1136 {
1137 if (mr->readable != readable) {
1138 mr->readable = readable;
1139 memory_region_update_topology(mr);
1140 }
1141 }
1142
1143 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1144 target_phys_addr_t size, unsigned client)
1145 {
1146 assert(mr->terminates);
1147 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1148 mr->ram_addr + addr + size,
1149 1 << client);
1150 }
1151
1152 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1153 {
1154 if (mr->alias) {
1155 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1156 }
1157
1158 assert(mr->terminates);
1159
1160 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1161 }
1162
1163 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1164 {
1165 FlatRange *fr;
1166 CoalescedMemoryRange *cmr;
1167 AddrRange tmp;
1168
1169 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1170 if (fr->mr == mr) {
1171 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1172 int128_get64(fr->addr.size));
1173 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1174 tmp = addrrange_shift(cmr->addr,
1175 int128_sub(fr->addr.start,
1176 int128_make64(fr->offset_in_region)));
1177 if (!addrrange_intersects(tmp, fr->addr)) {
1178 continue;
1179 }
1180 tmp = addrrange_intersection(tmp, fr->addr);
1181 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1182 int128_get64(tmp.size));
1183 }
1184 }
1185 }
1186 }
1187
1188 void memory_region_set_coalescing(MemoryRegion *mr)
1189 {
1190 memory_region_clear_coalescing(mr);
1191 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1192 }
1193
1194 void memory_region_add_coalescing(MemoryRegion *mr,
1195 target_phys_addr_t offset,
1196 uint64_t size)
1197 {
1198 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1199
1200 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1201 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1202 memory_region_update_coalesced_range(mr);
1203 }
1204
1205 void memory_region_clear_coalescing(MemoryRegion *mr)
1206 {
1207 CoalescedMemoryRange *cmr;
1208
1209 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1210 cmr = QTAILQ_FIRST(&mr->coalesced);
1211 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1212 g_free(cmr);
1213 }
1214 memory_region_update_coalesced_range(mr);
1215 }
1216
1217 void memory_region_add_eventfd(MemoryRegion *mr,
1218 target_phys_addr_t addr,
1219 unsigned size,
1220 bool match_data,
1221 uint64_t data,
1222 int fd)
1223 {
1224 MemoryRegionIoeventfd mrfd = {
1225 .addr.start = int128_make64(addr),
1226 .addr.size = int128_make64(size),
1227 .match_data = match_data,
1228 .data = data,
1229 .fd = fd,
1230 };
1231 unsigned i;
1232
1233 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1234 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1235 break;
1236 }
1237 }
1238 ++mr->ioeventfd_nb;
1239 mr->ioeventfds = g_realloc(mr->ioeventfds,
1240 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1241 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1242 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1243 mr->ioeventfds[i] = mrfd;
1244 memory_region_update_topology(mr);
1245 }
1246
1247 void memory_region_del_eventfd(MemoryRegion *mr,
1248 target_phys_addr_t addr,
1249 unsigned size,
1250 bool match_data,
1251 uint64_t data,
1252 int fd)
1253 {
1254 MemoryRegionIoeventfd mrfd = {
1255 .addr.start = int128_make64(addr),
1256 .addr.size = int128_make64(size),
1257 .match_data = match_data,
1258 .data = data,
1259 .fd = fd,
1260 };
1261 unsigned i;
1262
1263 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1264 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1265 break;
1266 }
1267 }
1268 assert(i != mr->ioeventfd_nb);
1269 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1270 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1271 --mr->ioeventfd_nb;
1272 mr->ioeventfds = g_realloc(mr->ioeventfds,
1273 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1274 memory_region_update_topology(mr);
1275 }
1276
1277 static void memory_region_add_subregion_common(MemoryRegion *mr,
1278 target_phys_addr_t offset,
1279 MemoryRegion *subregion)
1280 {
1281 MemoryRegion *other;
1282
1283 assert(!subregion->parent);
1284 subregion->parent = mr;
1285 subregion->addr = offset;
1286 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1287 if (subregion->may_overlap || other->may_overlap) {
1288 continue;
1289 }
1290 if (int128_gt(int128_make64(offset),
1291 int128_add(int128_make64(other->addr), other->size))
1292 || int128_le(int128_add(int128_make64(offset), subregion->size),
1293 int128_make64(other->addr))) {
1294 continue;
1295 }
1296 #if 0
1297 printf("warning: subregion collision %llx/%llx (%s) "
1298 "vs %llx/%llx (%s)\n",
1299 (unsigned long long)offset,
1300 (unsigned long long)int128_get64(subregion->size),
1301 subregion->name,
1302 (unsigned long long)other->addr,
1303 (unsigned long long)int128_get64(other->size),
1304 other->name);
1305 #endif
1306 }
1307 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1308 if (subregion->priority >= other->priority) {
1309 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1310 goto done;
1311 }
1312 }
1313 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1314 done:
1315 memory_region_update_topology(mr);
1316 }
1317
1318
1319 void memory_region_add_subregion(MemoryRegion *mr,
1320 target_phys_addr_t offset,
1321 MemoryRegion *subregion)
1322 {
1323 subregion->may_overlap = false;
1324 subregion->priority = 0;
1325 memory_region_add_subregion_common(mr, offset, subregion);
1326 }
1327
1328 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1329 target_phys_addr_t offset,
1330 MemoryRegion *subregion,
1331 unsigned priority)
1332 {
1333 subregion->may_overlap = true;
1334 subregion->priority = priority;
1335 memory_region_add_subregion_common(mr, offset, subregion);
1336 }
1337
1338 void memory_region_del_subregion(MemoryRegion *mr,
1339 MemoryRegion *subregion)
1340 {
1341 assert(subregion->parent == mr);
1342 subregion->parent = NULL;
1343 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1344 memory_region_update_topology(mr);
1345 }
1346
1347 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1348 {
1349 if (enabled == mr->enabled) {
1350 return;
1351 }
1352 mr->enabled = enabled;
1353 memory_region_update_topology(NULL);
1354 }
1355
1356 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1357 {
1358 MemoryRegion *parent = mr->parent;
1359 unsigned priority = mr->priority;
1360 bool may_overlap = mr->may_overlap;
1361
1362 if (addr == mr->addr || !parent) {
1363 mr->addr = addr;
1364 return;
1365 }
1366
1367 memory_region_transaction_begin();
1368 memory_region_del_subregion(parent, mr);
1369 if (may_overlap) {
1370 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1371 } else {
1372 memory_region_add_subregion(parent, addr, mr);
1373 }
1374 memory_region_transaction_commit();
1375 }
1376
1377 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1378 {
1379 target_phys_addr_t old_offset = mr->alias_offset;
1380
1381 assert(mr->alias);
1382 mr->alias_offset = offset;
1383
1384 if (offset == old_offset || !mr->parent) {
1385 return;
1386 }
1387
1388 memory_region_update_topology(mr);
1389 }
1390
1391 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1392 {
1393 return mr->ram_addr;
1394 }
1395
1396 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1397 {
1398 const AddrRange *addr = addr_;
1399 const FlatRange *fr = fr_;
1400
1401 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1402 return -1;
1403 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1404 return 1;
1405 }
1406 return 0;
1407 }
1408
1409 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1410 {
1411 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1412 sizeof(FlatRange), cmp_flatrange_addr);
1413 }
1414
1415 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1416 target_phys_addr_t addr, uint64_t size)
1417 {
1418 AddressSpace *as = memory_region_to_address_space(address_space);
1419 AddrRange range = addrrange_make(int128_make64(addr),
1420 int128_make64(size));
1421 FlatRange *fr = address_space_lookup(as, range);
1422 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1423
1424 if (!fr) {
1425 return ret;
1426 }
1427
1428 while (fr > as->current_map.ranges
1429 && addrrange_intersects(fr[-1].addr, range)) {
1430 --fr;
1431 }
1432
1433 ret.mr = fr->mr;
1434 range = addrrange_intersection(range, fr->addr);
1435 ret.offset_within_region = fr->offset_in_region;
1436 ret.offset_within_region += int128_get64(int128_sub(range.start,
1437 fr->addr.start));
1438 ret.size = int128_get64(range.size);
1439 ret.offset_within_address_space = int128_get64(range.start);
1440 return ret;
1441 }
1442
1443 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1444 {
1445 AddressSpace *as = memory_region_to_address_space(address_space);
1446 FlatRange *fr;
1447
1448 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1449 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1450 }
1451 }
1452
1453 void memory_global_dirty_log_start(void)
1454 {
1455 cpu_physical_memory_set_dirty_tracking(1);
1456 global_dirty_log = true;
1457 MEMORY_LISTENER_CALL(log_global_start, Forward);
1458 }
1459
1460 void memory_global_dirty_log_stop(void)
1461 {
1462 global_dirty_log = false;
1463 MEMORY_LISTENER_CALL(log_global_stop, Reverse);
1464 cpu_physical_memory_set_dirty_tracking(0);
1465 }
1466
1467 static void listener_add_address_space(MemoryListener *listener,
1468 AddressSpace *as)
1469 {
1470 FlatRange *fr;
1471
1472 if (global_dirty_log) {
1473 listener->log_global_start(listener);
1474 }
1475 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1476 MemoryRegionSection section = {
1477 .mr = fr->mr,
1478 .address_space = as->root,
1479 .offset_within_region = fr->offset_in_region,
1480 .size = int128_get64(fr->addr.size),
1481 .offset_within_address_space = int128_get64(fr->addr.start),
1482 };
1483 listener->region_add(listener, &section);
1484 }
1485 }
1486
1487 void memory_listener_register(MemoryListener *listener)
1488 {
1489 MemoryListener *other = NULL;
1490
1491 if (QTAILQ_EMPTY(&memory_listeners)
1492 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1493 memory_listeners)->priority) {
1494 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1495 } else {
1496 QTAILQ_FOREACH(other, &memory_listeners, link) {
1497 if (listener->priority < other->priority) {
1498 break;
1499 }
1500 }
1501 QTAILQ_INSERT_BEFORE(other, listener, link);
1502 }
1503 listener_add_address_space(listener, &address_space_memory);
1504 listener_add_address_space(listener, &address_space_io);
1505 }
1506
1507 void memory_listener_unregister(MemoryListener *listener)
1508 {
1509 QTAILQ_REMOVE(&memory_listeners, listener, link);
1510 }
1511
1512 void set_system_memory_map(MemoryRegion *mr)
1513 {
1514 address_space_memory.root = mr;
1515 memory_region_update_topology(NULL);
1516 }
1517
1518 void set_system_io_map(MemoryRegion *mr)
1519 {
1520 address_space_io.root = mr;
1521 memory_region_update_topology(NULL);
1522 }
1523
1524 uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size)
1525 {
1526 return memory_region_dispatch_read(io_mem_region[io_index], addr, size);
1527 }
1528
1529 void io_mem_write(int io_index, target_phys_addr_t addr,
1530 uint64_t val, unsigned size)
1531 {
1532 memory_region_dispatch_write(io_mem_region[io_index], addr, val, size);
1533 }
1534
1535 typedef struct MemoryRegionList MemoryRegionList;
1536
1537 struct MemoryRegionList {
1538 const MemoryRegion *mr;
1539 bool printed;
1540 QTAILQ_ENTRY(MemoryRegionList) queue;
1541 };
1542
1543 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1544
1545 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1546 const MemoryRegion *mr, unsigned int level,
1547 target_phys_addr_t base,
1548 MemoryRegionListHead *alias_print_queue)
1549 {
1550 MemoryRegionList *new_ml, *ml, *next_ml;
1551 MemoryRegionListHead submr_print_queue;
1552 const MemoryRegion *submr;
1553 unsigned int i;
1554
1555 if (!mr) {
1556 return;
1557 }
1558
1559 for (i = 0; i < level; i++) {
1560 mon_printf(f, " ");
1561 }
1562
1563 if (mr->alias) {
1564 MemoryRegionList *ml;
1565 bool found = false;
1566
1567 /* check if the alias is already in the queue */
1568 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1569 if (ml->mr == mr->alias && !ml->printed) {
1570 found = true;
1571 }
1572 }
1573
1574 if (!found) {
1575 ml = g_new(MemoryRegionList, 1);
1576 ml->mr = mr->alias;
1577 ml->printed = false;
1578 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1579 }
1580 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1581 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1582 "-" TARGET_FMT_plx "\n",
1583 base + mr->addr,
1584 base + mr->addr
1585 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1586 mr->priority,
1587 mr->readable ? 'R' : '-',
1588 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1589 : '-',
1590 mr->name,
1591 mr->alias->name,
1592 mr->alias_offset,
1593 mr->alias_offset
1594 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1595 } else {
1596 mon_printf(f,
1597 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1598 base + mr->addr,
1599 base + mr->addr
1600 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1601 mr->priority,
1602 mr->readable ? 'R' : '-',
1603 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1604 : '-',
1605 mr->name);
1606 }
1607
1608 QTAILQ_INIT(&submr_print_queue);
1609
1610 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1611 new_ml = g_new(MemoryRegionList, 1);
1612 new_ml->mr = submr;
1613 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1614 if (new_ml->mr->addr < ml->mr->addr ||
1615 (new_ml->mr->addr == ml->mr->addr &&
1616 new_ml->mr->priority > ml->mr->priority)) {
1617 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1618 new_ml = NULL;
1619 break;
1620 }
1621 }
1622 if (new_ml) {
1623 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1624 }
1625 }
1626
1627 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1628 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1629 alias_print_queue);
1630 }
1631
1632 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1633 g_free(ml);
1634 }
1635 }
1636
1637 void mtree_info(fprintf_function mon_printf, void *f)
1638 {
1639 MemoryRegionListHead ml_head;
1640 MemoryRegionList *ml, *ml2;
1641
1642 QTAILQ_INIT(&ml_head);
1643
1644 mon_printf(f, "memory\n");
1645 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1646
1647 /* print aliased regions */
1648 QTAILQ_FOREACH(ml, &ml_head, queue) {
1649 if (!ml->printed) {
1650 mon_printf(f, "%s\n", ml->mr->name);
1651 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1652 }
1653 }
1654
1655 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1656 g_free(ml);
1657 }
1658
1659 if (address_space_io.root &&
1660 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1661 QTAILQ_INIT(&ml_head);
1662 mon_printf(f, "I/O\n");
1663 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1664 }
1665 }
Qemu copy for testing