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memory: dispatch directly via MemoryRegion
[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #define WANT_EXEC_OBSOLETE
24 #include "exec-obsolete.h"
25
26 unsigned memory_region_transaction_depth = 0;
27 static bool memory_region_update_pending = false;
28 static bool global_dirty_log = false;
29
30 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
31 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
32
33 typedef struct AddrRange AddrRange;
34
35 /*
36 * Note using signed integers limits us to physical addresses at most
37 * 63 bits wide. They are needed for negative offsetting in aliases
38 * (large MemoryRegion::alias_offset).
39 */
40 struct AddrRange {
41 Int128 start;
42 Int128 size;
43 };
44
45 static AddrRange addrrange_make(Int128 start, Int128 size)
46 {
47 return (AddrRange) { start, size };
48 }
49
50 static bool addrrange_equal(AddrRange r1, AddrRange r2)
51 {
52 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
53 }
54
55 static Int128 addrrange_end(AddrRange r)
56 {
57 return int128_add(r.start, r.size);
58 }
59
60 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
61 {
62 int128_addto(&range.start, delta);
63 return range;
64 }
65
66 static bool addrrange_contains(AddrRange range, Int128 addr)
67 {
68 return int128_ge(addr, range.start)
69 && int128_lt(addr, addrrange_end(range));
70 }
71
72 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
73 {
74 return addrrange_contains(r1, r2.start)
75 || addrrange_contains(r2, r1.start);
76 }
77
78 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
79 {
80 Int128 start = int128_max(r1.start, r2.start);
81 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
82 return addrrange_make(start, int128_sub(end, start));
83 }
84
85 enum ListenerDirection { Forward, Reverse };
86
87 static bool memory_listener_match(MemoryListener *listener,
88 MemoryRegionSection *section)
89 {
90 return !listener->address_space_filter
91 || listener->address_space_filter == section->address_space;
92 }
93
94 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
95 do { \
96 MemoryListener *_listener; \
97 \
98 switch (_direction) { \
99 case Forward: \
100 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
101 _listener->_callback(_listener, ##_args); \
102 } \
103 break; \
104 case Reverse: \
105 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
106 memory_listeners, link) { \
107 _listener->_callback(_listener, ##_args); \
108 } \
109 break; \
110 default: \
111 abort(); \
112 } \
113 } while (0)
114
115 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
116 do { \
117 MemoryListener *_listener; \
118 \
119 switch (_direction) { \
120 case Forward: \
121 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
122 if (memory_listener_match(_listener, _section)) { \
123 _listener->_callback(_listener, _section, ##_args); \
124 } \
125 } \
126 break; \
127 case Reverse: \
128 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
129 memory_listeners, link) { \
130 if (memory_listener_match(_listener, _section)) { \
131 _listener->_callback(_listener, _section, ##_args); \
132 } \
133 } \
134 break; \
135 default: \
136 abort(); \
137 } \
138 } while (0)
139
140 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
141 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
142 .mr = (fr)->mr, \
143 .address_space = (as)->root, \
144 .offset_within_region = (fr)->offset_in_region, \
145 .size = int128_get64((fr)->addr.size), \
146 .offset_within_address_space = int128_get64((fr)->addr.start), \
147 .readonly = (fr)->readonly, \
148 }))
149
150 struct CoalescedMemoryRange {
151 AddrRange addr;
152 QTAILQ_ENTRY(CoalescedMemoryRange) link;
153 };
154
155 struct MemoryRegionIoeventfd {
156 AddrRange addr;
157 bool match_data;
158 uint64_t data;
159 int fd;
160 };
161
162 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
163 MemoryRegionIoeventfd b)
164 {
165 if (int128_lt(a.addr.start, b.addr.start)) {
166 return true;
167 } else if (int128_gt(a.addr.start, b.addr.start)) {
168 return false;
169 } else if (int128_lt(a.addr.size, b.addr.size)) {
170 return true;
171 } else if (int128_gt(a.addr.size, b.addr.size)) {
172 return false;
173 } else if (a.match_data < b.match_data) {
174 return true;
175 } else if (a.match_data > b.match_data) {
176 return false;
177 } else if (a.match_data) {
178 if (a.data < b.data) {
179 return true;
180 } else if (a.data > b.data) {
181 return false;
182 }
183 }
184 if (a.fd < b.fd) {
185 return true;
186 } else if (a.fd > b.fd) {
187 return false;
188 }
189 return false;
190 }
191
192 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
193 MemoryRegionIoeventfd b)
194 {
195 return !memory_region_ioeventfd_before(a, b)
196 && !memory_region_ioeventfd_before(b, a);
197 }
198
199 typedef struct FlatRange FlatRange;
200 typedef struct FlatView FlatView;
201
202 /* Range of memory in the global map. Addresses are absolute. */
203 struct FlatRange {
204 MemoryRegion *mr;
205 target_phys_addr_t offset_in_region;
206 AddrRange addr;
207 uint8_t dirty_log_mask;
208 bool readable;
209 bool readonly;
210 };
211
212 /* Flattened global view of current active memory hierarchy. Kept in sorted
213 * order.
214 */
215 struct FlatView {
216 FlatRange *ranges;
217 unsigned nr;
218 unsigned nr_allocated;
219 };
220
221 typedef struct AddressSpace AddressSpace;
222 typedef struct AddressSpaceOps AddressSpaceOps;
223
224 /* A system address space - I/O, memory, etc. */
225 struct AddressSpace {
226 MemoryRegion *root;
227 FlatView current_map;
228 int ioeventfd_nb;
229 MemoryRegionIoeventfd *ioeventfds;
230 };
231
232 #define FOR_EACH_FLAT_RANGE(var, view) \
233 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
234
235 static bool flatrange_equal(FlatRange *a, FlatRange *b)
236 {
237 return a->mr == b->mr
238 && addrrange_equal(a->addr, b->addr)
239 && a->offset_in_region == b->offset_in_region
240 && a->readable == b->readable
241 && a->readonly == b->readonly;
242 }
243
244 static void flatview_init(FlatView *view)
245 {
246 view->ranges = NULL;
247 view->nr = 0;
248 view->nr_allocated = 0;
249 }
250
251 /* Insert a range into a given position. Caller is responsible for maintaining
252 * sorting order.
253 */
254 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
255 {
256 if (view->nr == view->nr_allocated) {
257 view->nr_allocated = MAX(2 * view->nr, 10);
258 view->ranges = g_realloc(view->ranges,
259 view->nr_allocated * sizeof(*view->ranges));
260 }
261 memmove(view->ranges + pos + 1, view->ranges + pos,
262 (view->nr - pos) * sizeof(FlatRange));
263 view->ranges[pos] = *range;
264 ++view->nr;
265 }
266
267 static void flatview_destroy(FlatView *view)
268 {
269 g_free(view->ranges);
270 }
271
272 static bool can_merge(FlatRange *r1, FlatRange *r2)
273 {
274 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
275 && r1->mr == r2->mr
276 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
277 r1->addr.size),
278 int128_make64(r2->offset_in_region))
279 && r1->dirty_log_mask == r2->dirty_log_mask
280 && r1->readable == r2->readable
281 && r1->readonly == r2->readonly;
282 }
283
284 /* Attempt to simplify a view by merging ajacent ranges */
285 static void flatview_simplify(FlatView *view)
286 {
287 unsigned i, j;
288
289 i = 0;
290 while (i < view->nr) {
291 j = i + 1;
292 while (j < view->nr
293 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
294 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
295 ++j;
296 }
297 ++i;
298 memmove(&view->ranges[i], &view->ranges[j],
299 (view->nr - j) * sizeof(view->ranges[j]));
300 view->nr -= j - i;
301 }
302 }
303
304 static void memory_region_read_accessor(void *opaque,
305 target_phys_addr_t addr,
306 uint64_t *value,
307 unsigned size,
308 unsigned shift,
309 uint64_t mask)
310 {
311 MemoryRegion *mr = opaque;
312 uint64_t tmp;
313
314 tmp = mr->ops->read(mr->opaque, addr, size);
315 *value |= (tmp & mask) << shift;
316 }
317
318 static void memory_region_write_accessor(void *opaque,
319 target_phys_addr_t addr,
320 uint64_t *value,
321 unsigned size,
322 unsigned shift,
323 uint64_t mask)
324 {
325 MemoryRegion *mr = opaque;
326 uint64_t tmp;
327
328 tmp = (*value >> shift) & mask;
329 mr->ops->write(mr->opaque, addr, tmp, size);
330 }
331
332 static void access_with_adjusted_size(target_phys_addr_t addr,
333 uint64_t *value,
334 unsigned size,
335 unsigned access_size_min,
336 unsigned access_size_max,
337 void (*access)(void *opaque,
338 target_phys_addr_t addr,
339 uint64_t *value,
340 unsigned size,
341 unsigned shift,
342 uint64_t mask),
343 void *opaque)
344 {
345 uint64_t access_mask;
346 unsigned access_size;
347 unsigned i;
348
349 if (!access_size_min) {
350 access_size_min = 1;
351 }
352 if (!access_size_max) {
353 access_size_max = 4;
354 }
355 access_size = MAX(MIN(size, access_size_max), access_size_min);
356 access_mask = -1ULL >> (64 - access_size * 8);
357 for (i = 0; i < size; i += access_size) {
358 /* FIXME: big-endian support */
359 access(opaque, addr + i, value, access_size, i * 8, access_mask);
360 }
361 }
362
363 static AddressSpace address_space_memory;
364
365 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
366 unsigned width, bool write)
367 {
368 const MemoryRegionPortio *mrp;
369
370 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
371 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
372 && width == mrp->size
373 && (write ? (bool)mrp->write : (bool)mrp->read)) {
374 return mrp;
375 }
376 }
377 return NULL;
378 }
379
380 static void memory_region_iorange_read(IORange *iorange,
381 uint64_t offset,
382 unsigned width,
383 uint64_t *data)
384 {
385 MemoryRegionIORange *mrio
386 = container_of(iorange, MemoryRegionIORange, iorange);
387 MemoryRegion *mr = mrio->mr;
388
389 offset += mrio->offset;
390 if (mr->ops->old_portio) {
391 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
392 width, false);
393
394 *data = ((uint64_t)1 << (width * 8)) - 1;
395 if (mrp) {
396 *data = mrp->read(mr->opaque, offset);
397 } else if (width == 2) {
398 mrp = find_portio(mr, offset - mrio->offset, 1, false);
399 assert(mrp);
400 *data = mrp->read(mr->opaque, offset) |
401 (mrp->read(mr->opaque, offset + 1) << 8);
402 }
403 return;
404 }
405 *data = 0;
406 access_with_adjusted_size(offset, data, width,
407 mr->ops->impl.min_access_size,
408 mr->ops->impl.max_access_size,
409 memory_region_read_accessor, mr);
410 }
411
412 static void memory_region_iorange_write(IORange *iorange,
413 uint64_t offset,
414 unsigned width,
415 uint64_t data)
416 {
417 MemoryRegionIORange *mrio
418 = container_of(iorange, MemoryRegionIORange, iorange);
419 MemoryRegion *mr = mrio->mr;
420
421 offset += mrio->offset;
422 if (mr->ops->old_portio) {
423 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
424 width, true);
425
426 if (mrp) {
427 mrp->write(mr->opaque, offset, data);
428 } else if (width == 2) {
429 mrp = find_portio(mr, offset - mrio->offset, 1, false);
430 assert(mrp);
431 mrp->write(mr->opaque, offset, data & 0xff);
432 mrp->write(mr->opaque, offset + 1, data >> 8);
433 }
434 return;
435 }
436 access_with_adjusted_size(offset, &data, width,
437 mr->ops->impl.min_access_size,
438 mr->ops->impl.max_access_size,
439 memory_region_write_accessor, mr);
440 }
441
442 static void memory_region_iorange_destructor(IORange *iorange)
443 {
444 g_free(container_of(iorange, MemoryRegionIORange, iorange));
445 }
446
447 const IORangeOps memory_region_iorange_ops = {
448 .read = memory_region_iorange_read,
449 .write = memory_region_iorange_write,
450 .destructor = memory_region_iorange_destructor,
451 };
452
453 static AddressSpace address_space_io;
454
455 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
456 {
457 while (mr->parent) {
458 mr = mr->parent;
459 }
460 if (mr == address_space_memory.root) {
461 return &address_space_memory;
462 }
463 if (mr == address_space_io.root) {
464 return &address_space_io;
465 }
466 abort();
467 }
468
469 /* Render a memory region into the global view. Ranges in @view obscure
470 * ranges in @mr.
471 */
472 static void render_memory_region(FlatView *view,
473 MemoryRegion *mr,
474 Int128 base,
475 AddrRange clip,
476 bool readonly)
477 {
478 MemoryRegion *subregion;
479 unsigned i;
480 target_phys_addr_t offset_in_region;
481 Int128 remain;
482 Int128 now;
483 FlatRange fr;
484 AddrRange tmp;
485
486 if (!mr->enabled) {
487 return;
488 }
489
490 int128_addto(&base, int128_make64(mr->addr));
491 readonly |= mr->readonly;
492
493 tmp = addrrange_make(base, mr->size);
494
495 if (!addrrange_intersects(tmp, clip)) {
496 return;
497 }
498
499 clip = addrrange_intersection(tmp, clip);
500
501 if (mr->alias) {
502 int128_subfrom(&base, int128_make64(mr->alias->addr));
503 int128_subfrom(&base, int128_make64(mr->alias_offset));
504 render_memory_region(view, mr->alias, base, clip, readonly);
505 return;
506 }
507
508 /* Render subregions in priority order. */
509 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
510 render_memory_region(view, subregion, base, clip, readonly);
511 }
512
513 if (!mr->terminates) {
514 return;
515 }
516
517 offset_in_region = int128_get64(int128_sub(clip.start, base));
518 base = clip.start;
519 remain = clip.size;
520
521 /* Render the region itself into any gaps left by the current view. */
522 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
523 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
524 continue;
525 }
526 if (int128_lt(base, view->ranges[i].addr.start)) {
527 now = int128_min(remain,
528 int128_sub(view->ranges[i].addr.start, base));
529 fr.mr = mr;
530 fr.offset_in_region = offset_in_region;
531 fr.addr = addrrange_make(base, now);
532 fr.dirty_log_mask = mr->dirty_log_mask;
533 fr.readable = mr->readable;
534 fr.readonly = readonly;
535 flatview_insert(view, i, &fr);
536 ++i;
537 int128_addto(&base, now);
538 offset_in_region += int128_get64(now);
539 int128_subfrom(&remain, now);
540 }
541 if (int128_eq(base, view->ranges[i].addr.start)) {
542 now = int128_min(remain, view->ranges[i].addr.size);
543 int128_addto(&base, now);
544 offset_in_region += int128_get64(now);
545 int128_subfrom(&remain, now);
546 }
547 }
548 if (int128_nz(remain)) {
549 fr.mr = mr;
550 fr.offset_in_region = offset_in_region;
551 fr.addr = addrrange_make(base, remain);
552 fr.dirty_log_mask = mr->dirty_log_mask;
553 fr.readable = mr->readable;
554 fr.readonly = readonly;
555 flatview_insert(view, i, &fr);
556 }
557 }
558
559 /* Render a memory topology into a list of disjoint absolute ranges. */
560 static FlatView generate_memory_topology(MemoryRegion *mr)
561 {
562 FlatView view;
563
564 flatview_init(&view);
565
566 render_memory_region(&view, mr, int128_zero(),
567 addrrange_make(int128_zero(), int128_2_64()), false);
568 flatview_simplify(&view);
569
570 return view;
571 }
572
573 static void address_space_add_del_ioeventfds(AddressSpace *as,
574 MemoryRegionIoeventfd *fds_new,
575 unsigned fds_new_nb,
576 MemoryRegionIoeventfd *fds_old,
577 unsigned fds_old_nb)
578 {
579 unsigned iold, inew;
580 MemoryRegionIoeventfd *fd;
581 MemoryRegionSection section;
582
583 /* Generate a symmetric difference of the old and new fd sets, adding
584 * and deleting as necessary.
585 */
586
587 iold = inew = 0;
588 while (iold < fds_old_nb || inew < fds_new_nb) {
589 if (iold < fds_old_nb
590 && (inew == fds_new_nb
591 || memory_region_ioeventfd_before(fds_old[iold],
592 fds_new[inew]))) {
593 fd = &fds_old[iold];
594 section = (MemoryRegionSection) {
595 .address_space = as->root,
596 .offset_within_address_space = int128_get64(fd->addr.start),
597 .size = int128_get64(fd->addr.size),
598 };
599 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
600 fd->match_data, fd->data, fd->fd);
601 ++iold;
602 } else if (inew < fds_new_nb
603 && (iold == fds_old_nb
604 || memory_region_ioeventfd_before(fds_new[inew],
605 fds_old[iold]))) {
606 fd = &fds_new[inew];
607 section = (MemoryRegionSection) {
608 .address_space = as->root,
609 .offset_within_address_space = int128_get64(fd->addr.start),
610 .size = int128_get64(fd->addr.size),
611 };
612 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
613 fd->match_data, fd->data, fd->fd);
614 ++inew;
615 } else {
616 ++iold;
617 ++inew;
618 }
619 }
620 }
621
622 static void address_space_update_ioeventfds(AddressSpace *as)
623 {
624 FlatRange *fr;
625 unsigned ioeventfd_nb = 0;
626 MemoryRegionIoeventfd *ioeventfds = NULL;
627 AddrRange tmp;
628 unsigned i;
629
630 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
631 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
632 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
633 int128_sub(fr->addr.start,
634 int128_make64(fr->offset_in_region)));
635 if (addrrange_intersects(fr->addr, tmp)) {
636 ++ioeventfd_nb;
637 ioeventfds = g_realloc(ioeventfds,
638 ioeventfd_nb * sizeof(*ioeventfds));
639 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
640 ioeventfds[ioeventfd_nb-1].addr = tmp;
641 }
642 }
643 }
644
645 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
646 as->ioeventfds, as->ioeventfd_nb);
647
648 g_free(as->ioeventfds);
649 as->ioeventfds = ioeventfds;
650 as->ioeventfd_nb = ioeventfd_nb;
651 }
652
653 static void address_space_update_topology_pass(AddressSpace *as,
654 FlatView old_view,
655 FlatView new_view,
656 bool adding)
657 {
658 unsigned iold, inew;
659 FlatRange *frold, *frnew;
660
661 /* Generate a symmetric difference of the old and new memory maps.
662 * Kill ranges in the old map, and instantiate ranges in the new map.
663 */
664 iold = inew = 0;
665 while (iold < old_view.nr || inew < new_view.nr) {
666 if (iold < old_view.nr) {
667 frold = &old_view.ranges[iold];
668 } else {
669 frold = NULL;
670 }
671 if (inew < new_view.nr) {
672 frnew = &new_view.ranges[inew];
673 } else {
674 frnew = NULL;
675 }
676
677 if (frold
678 && (!frnew
679 || int128_lt(frold->addr.start, frnew->addr.start)
680 || (int128_eq(frold->addr.start, frnew->addr.start)
681 && !flatrange_equal(frold, frnew)))) {
682 /* In old, but (not in new, or in new but attributes changed). */
683
684 if (!adding) {
685 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
686 }
687
688 ++iold;
689 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
690 /* In both (logging may have changed) */
691
692 if (adding) {
693 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
694 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
695 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
696 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
697 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
698 }
699 }
700
701 ++iold;
702 ++inew;
703 } else {
704 /* In new */
705
706 if (adding) {
707 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
708 }
709
710 ++inew;
711 }
712 }
713 }
714
715
716 static void address_space_update_topology(AddressSpace *as)
717 {
718 FlatView old_view = as->current_map;
719 FlatView new_view = generate_memory_topology(as->root);
720
721 address_space_update_topology_pass(as, old_view, new_view, false);
722 address_space_update_topology_pass(as, old_view, new_view, true);
723
724 as->current_map = new_view;
725 flatview_destroy(&old_view);
726 address_space_update_ioeventfds(as);
727 }
728
729 static void memory_region_update_topology(MemoryRegion *mr)
730 {
731 if (memory_region_transaction_depth) {
732 memory_region_update_pending |= !mr || mr->enabled;
733 return;
734 }
735
736 if (mr && !mr->enabled) {
737 return;
738 }
739
740 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
741
742 if (address_space_memory.root) {
743 address_space_update_topology(&address_space_memory);
744 }
745 if (address_space_io.root) {
746 address_space_update_topology(&address_space_io);
747 }
748
749 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
750
751 memory_region_update_pending = false;
752 }
753
754 void memory_region_transaction_begin(void)
755 {
756 ++memory_region_transaction_depth;
757 }
758
759 void memory_region_transaction_commit(void)
760 {
761 assert(memory_region_transaction_depth);
762 --memory_region_transaction_depth;
763 if (!memory_region_transaction_depth && memory_region_update_pending) {
764 memory_region_update_topology(NULL);
765 }
766 }
767
768 static void memory_region_destructor_none(MemoryRegion *mr)
769 {
770 }
771
772 static void memory_region_destructor_ram(MemoryRegion *mr)
773 {
774 qemu_ram_free(mr->ram_addr);
775 }
776
777 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
778 {
779 qemu_ram_free_from_ptr(mr->ram_addr);
780 }
781
782 static void memory_region_destructor_iomem(MemoryRegion *mr)
783 {
784 cpu_unregister_io_memory(mr->ram_addr);
785 }
786
787 static void memory_region_destructor_rom_device(MemoryRegion *mr)
788 {
789 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
790 cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK);
791 }
792
793 static bool memory_region_wrong_endianness(MemoryRegion *mr)
794 {
795 #ifdef TARGET_WORDS_BIGENDIAN
796 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
797 #else
798 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
799 #endif
800 }
801
802 void memory_region_init(MemoryRegion *mr,
803 const char *name,
804 uint64_t size)
805 {
806 mr->ops = NULL;
807 mr->parent = NULL;
808 mr->size = int128_make64(size);
809 if (size == UINT64_MAX) {
810 mr->size = int128_2_64();
811 }
812 mr->addr = 0;
813 mr->subpage = false;
814 mr->enabled = true;
815 mr->terminates = false;
816 mr->ram = false;
817 mr->readable = true;
818 mr->readonly = false;
819 mr->rom_device = false;
820 mr->destructor = memory_region_destructor_none;
821 mr->priority = 0;
822 mr->may_overlap = false;
823 mr->alias = NULL;
824 QTAILQ_INIT(&mr->subregions);
825 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
826 QTAILQ_INIT(&mr->coalesced);
827 mr->name = g_strdup(name);
828 mr->dirty_log_mask = 0;
829 mr->ioeventfd_nb = 0;
830 mr->ioeventfds = NULL;
831 }
832
833 static bool memory_region_access_valid(MemoryRegion *mr,
834 target_phys_addr_t addr,
835 unsigned size,
836 bool is_write)
837 {
838 if (mr->ops->valid.accepts
839 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
840 return false;
841 }
842
843 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
844 return false;
845 }
846
847 /* Treat zero as compatibility all valid */
848 if (!mr->ops->valid.max_access_size) {
849 return true;
850 }
851
852 if (size > mr->ops->valid.max_access_size
853 || size < mr->ops->valid.min_access_size) {
854 return false;
855 }
856 return true;
857 }
858
859 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
860 target_phys_addr_t addr,
861 unsigned size)
862 {
863 uint64_t data = 0;
864
865 if (!memory_region_access_valid(mr, addr, size, false)) {
866 return -1U; /* FIXME: better signalling */
867 }
868
869 if (!mr->ops->read) {
870 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
871 }
872
873 /* FIXME: support unaligned access */
874 access_with_adjusted_size(addr, &data, size,
875 mr->ops->impl.min_access_size,
876 mr->ops->impl.max_access_size,
877 memory_region_read_accessor, mr);
878
879 return data;
880 }
881
882 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
883 {
884 if (memory_region_wrong_endianness(mr)) {
885 switch (size) {
886 case 1:
887 break;
888 case 2:
889 *data = bswap16(*data);
890 break;
891 case 4:
892 *data = bswap32(*data);
893 break;
894 default:
895 abort();
896 }
897 }
898 }
899
900 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
901 target_phys_addr_t addr,
902 unsigned size)
903 {
904 uint64_t ret;
905
906 ret = memory_region_dispatch_read1(mr, addr, size);
907 adjust_endianness(mr, &ret, size);
908 return ret;
909 }
910
911 static void memory_region_dispatch_write(MemoryRegion *mr,
912 target_phys_addr_t addr,
913 uint64_t data,
914 unsigned size)
915 {
916 if (!memory_region_access_valid(mr, addr, size, true)) {
917 return; /* FIXME: better signalling */
918 }
919
920 adjust_endianness(mr, &data, size);
921
922 if (!mr->ops->write) {
923 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
924 return;
925 }
926
927 /* FIXME: support unaligned access */
928 access_with_adjusted_size(addr, &data, size,
929 mr->ops->impl.min_access_size,
930 mr->ops->impl.max_access_size,
931 memory_region_write_accessor, mr);
932 }
933
934 void memory_region_init_io(MemoryRegion *mr,
935 const MemoryRegionOps *ops,
936 void *opaque,
937 const char *name,
938 uint64_t size)
939 {
940 memory_region_init(mr, name, size);
941 mr->ops = ops;
942 mr->opaque = opaque;
943 mr->terminates = true;
944 mr->destructor = memory_region_destructor_iomem;
945 mr->ram_addr = cpu_register_io_memory(mr);
946 }
947
948 void memory_region_init_ram(MemoryRegion *mr,
949 const char *name,
950 uint64_t size)
951 {
952 memory_region_init(mr, name, size);
953 mr->ram = true;
954 mr->terminates = true;
955 mr->destructor = memory_region_destructor_ram;
956 mr->ram_addr = qemu_ram_alloc(size, mr);
957 }
958
959 void memory_region_init_ram_ptr(MemoryRegion *mr,
960 const char *name,
961 uint64_t size,
962 void *ptr)
963 {
964 memory_region_init(mr, name, size);
965 mr->ram = true;
966 mr->terminates = true;
967 mr->destructor = memory_region_destructor_ram_from_ptr;
968 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
969 }
970
971 void memory_region_init_alias(MemoryRegion *mr,
972 const char *name,
973 MemoryRegion *orig,
974 target_phys_addr_t offset,
975 uint64_t size)
976 {
977 memory_region_init(mr, name, size);
978 mr->alias = orig;
979 mr->alias_offset = offset;
980 }
981
982 void memory_region_init_rom_device(MemoryRegion *mr,
983 const MemoryRegionOps *ops,
984 void *opaque,
985 const char *name,
986 uint64_t size)
987 {
988 memory_region_init(mr, name, size);
989 mr->ops = ops;
990 mr->opaque = opaque;
991 mr->terminates = true;
992 mr->rom_device = true;
993 mr->destructor = memory_region_destructor_rom_device;
994 mr->ram_addr = qemu_ram_alloc(size, mr);
995 mr->ram_addr |= cpu_register_io_memory(mr);
996 }
997
998 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
999 unsigned size)
1000 {
1001 MemoryRegion *mr = opaque;
1002
1003 if (!mr->warning_printed) {
1004 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
1005 mr->warning_printed = true;
1006 }
1007 return -1U;
1008 }
1009
1010 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
1011 unsigned size)
1012 {
1013 MemoryRegion *mr = opaque;
1014
1015 if (!mr->warning_printed) {
1016 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1017 mr->warning_printed = true;
1018 }
1019 }
1020
1021 static const MemoryRegionOps reservation_ops = {
1022 .read = invalid_read,
1023 .write = invalid_write,
1024 .endianness = DEVICE_NATIVE_ENDIAN,
1025 };
1026
1027 void memory_region_init_reservation(MemoryRegion *mr,
1028 const char *name,
1029 uint64_t size)
1030 {
1031 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1032 }
1033
1034 void memory_region_destroy(MemoryRegion *mr)
1035 {
1036 assert(QTAILQ_EMPTY(&mr->subregions));
1037 mr->destructor(mr);
1038 memory_region_clear_coalescing(mr);
1039 g_free((char *)mr->name);
1040 g_free(mr->ioeventfds);
1041 }
1042
1043 uint64_t memory_region_size(MemoryRegion *mr)
1044 {
1045 if (int128_eq(mr->size, int128_2_64())) {
1046 return UINT64_MAX;
1047 }
1048 return int128_get64(mr->size);
1049 }
1050
1051 const char *memory_region_name(MemoryRegion *mr)
1052 {
1053 return mr->name;
1054 }
1055
1056 bool memory_region_is_ram(MemoryRegion *mr)
1057 {
1058 return mr->ram;
1059 }
1060
1061 bool memory_region_is_logging(MemoryRegion *mr)
1062 {
1063 return mr->dirty_log_mask;
1064 }
1065
1066 bool memory_region_is_rom(MemoryRegion *mr)
1067 {
1068 return mr->ram && mr->readonly;
1069 }
1070
1071 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1072 {
1073 uint8_t mask = 1 << client;
1074
1075 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1076 memory_region_update_topology(mr);
1077 }
1078
1079 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1080 target_phys_addr_t size, unsigned client)
1081 {
1082 assert(mr->terminates);
1083 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1084 1 << client);
1085 }
1086
1087 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1088 target_phys_addr_t size)
1089 {
1090 assert(mr->terminates);
1091 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1092 }
1093
1094 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1095 {
1096 FlatRange *fr;
1097
1098 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1099 if (fr->mr == mr) {
1100 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory,
1101 Forward, log_sync);
1102 }
1103 }
1104 }
1105
1106 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1107 {
1108 if (mr->readonly != readonly) {
1109 mr->readonly = readonly;
1110 memory_region_update_topology(mr);
1111 }
1112 }
1113
1114 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1115 {
1116 if (mr->readable != readable) {
1117 mr->readable = readable;
1118 memory_region_update_topology(mr);
1119 }
1120 }
1121
1122 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1123 target_phys_addr_t size, unsigned client)
1124 {
1125 assert(mr->terminates);
1126 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1127 mr->ram_addr + addr + size,
1128 1 << client);
1129 }
1130
1131 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1132 {
1133 if (mr->alias) {
1134 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1135 }
1136
1137 assert(mr->terminates);
1138
1139 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1140 }
1141
1142 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1143 {
1144 FlatRange *fr;
1145 CoalescedMemoryRange *cmr;
1146 AddrRange tmp;
1147
1148 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1149 if (fr->mr == mr) {
1150 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1151 int128_get64(fr->addr.size));
1152 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1153 tmp = addrrange_shift(cmr->addr,
1154 int128_sub(fr->addr.start,
1155 int128_make64(fr->offset_in_region)));
1156 if (!addrrange_intersects(tmp, fr->addr)) {
1157 continue;
1158 }
1159 tmp = addrrange_intersection(tmp, fr->addr);
1160 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1161 int128_get64(tmp.size));
1162 }
1163 }
1164 }
1165 }
1166
1167 void memory_region_set_coalescing(MemoryRegion *mr)
1168 {
1169 memory_region_clear_coalescing(mr);
1170 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1171 }
1172
1173 void memory_region_add_coalescing(MemoryRegion *mr,
1174 target_phys_addr_t offset,
1175 uint64_t size)
1176 {
1177 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1178
1179 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1180 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1181 memory_region_update_coalesced_range(mr);
1182 }
1183
1184 void memory_region_clear_coalescing(MemoryRegion *mr)
1185 {
1186 CoalescedMemoryRange *cmr;
1187
1188 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1189 cmr = QTAILQ_FIRST(&mr->coalesced);
1190 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1191 g_free(cmr);
1192 }
1193 memory_region_update_coalesced_range(mr);
1194 }
1195
1196 void memory_region_add_eventfd(MemoryRegion *mr,
1197 target_phys_addr_t addr,
1198 unsigned size,
1199 bool match_data,
1200 uint64_t data,
1201 int fd)
1202 {
1203 MemoryRegionIoeventfd mrfd = {
1204 .addr.start = int128_make64(addr),
1205 .addr.size = int128_make64(size),
1206 .match_data = match_data,
1207 .data = data,
1208 .fd = fd,
1209 };
1210 unsigned i;
1211
1212 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1213 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1214 break;
1215 }
1216 }
1217 ++mr->ioeventfd_nb;
1218 mr->ioeventfds = g_realloc(mr->ioeventfds,
1219 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1220 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1221 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1222 mr->ioeventfds[i] = mrfd;
1223 memory_region_update_topology(mr);
1224 }
1225
1226 void memory_region_del_eventfd(MemoryRegion *mr,
1227 target_phys_addr_t addr,
1228 unsigned size,
1229 bool match_data,
1230 uint64_t data,
1231 int fd)
1232 {
1233 MemoryRegionIoeventfd mrfd = {
1234 .addr.start = int128_make64(addr),
1235 .addr.size = int128_make64(size),
1236 .match_data = match_data,
1237 .data = data,
1238 .fd = fd,
1239 };
1240 unsigned i;
1241
1242 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1243 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1244 break;
1245 }
1246 }
1247 assert(i != mr->ioeventfd_nb);
1248 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1249 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1250 --mr->ioeventfd_nb;
1251 mr->ioeventfds = g_realloc(mr->ioeventfds,
1252 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1253 memory_region_update_topology(mr);
1254 }
1255
1256 static void memory_region_add_subregion_common(MemoryRegion *mr,
1257 target_phys_addr_t offset,
1258 MemoryRegion *subregion)
1259 {
1260 MemoryRegion *other;
1261
1262 assert(!subregion->parent);
1263 subregion->parent = mr;
1264 subregion->addr = offset;
1265 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1266 if (subregion->may_overlap || other->may_overlap) {
1267 continue;
1268 }
1269 if (int128_gt(int128_make64(offset),
1270 int128_add(int128_make64(other->addr), other->size))
1271 || int128_le(int128_add(int128_make64(offset), subregion->size),
1272 int128_make64(other->addr))) {
1273 continue;
1274 }
1275 #if 0
1276 printf("warning: subregion collision %llx/%llx (%s) "
1277 "vs %llx/%llx (%s)\n",
1278 (unsigned long long)offset,
1279 (unsigned long long)int128_get64(subregion->size),
1280 subregion->name,
1281 (unsigned long long)other->addr,
1282 (unsigned long long)int128_get64(other->size),
1283 other->name);
1284 #endif
1285 }
1286 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1287 if (subregion->priority >= other->priority) {
1288 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1289 goto done;
1290 }
1291 }
1292 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1293 done:
1294 memory_region_update_topology(mr);
1295 }
1296
1297
1298 void memory_region_add_subregion(MemoryRegion *mr,
1299 target_phys_addr_t offset,
1300 MemoryRegion *subregion)
1301 {
1302 subregion->may_overlap = false;
1303 subregion->priority = 0;
1304 memory_region_add_subregion_common(mr, offset, subregion);
1305 }
1306
1307 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1308 target_phys_addr_t offset,
1309 MemoryRegion *subregion,
1310 unsigned priority)
1311 {
1312 subregion->may_overlap = true;
1313 subregion->priority = priority;
1314 memory_region_add_subregion_common(mr, offset, subregion);
1315 }
1316
1317 void memory_region_del_subregion(MemoryRegion *mr,
1318 MemoryRegion *subregion)
1319 {
1320 assert(subregion->parent == mr);
1321 subregion->parent = NULL;
1322 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1323 memory_region_update_topology(mr);
1324 }
1325
1326 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1327 {
1328 if (enabled == mr->enabled) {
1329 return;
1330 }
1331 mr->enabled = enabled;
1332 memory_region_update_topology(NULL);
1333 }
1334
1335 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1336 {
1337 MemoryRegion *parent = mr->parent;
1338 unsigned priority = mr->priority;
1339 bool may_overlap = mr->may_overlap;
1340
1341 if (addr == mr->addr || !parent) {
1342 mr->addr = addr;
1343 return;
1344 }
1345
1346 memory_region_transaction_begin();
1347 memory_region_del_subregion(parent, mr);
1348 if (may_overlap) {
1349 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1350 } else {
1351 memory_region_add_subregion(parent, addr, mr);
1352 }
1353 memory_region_transaction_commit();
1354 }
1355
1356 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1357 {
1358 target_phys_addr_t old_offset = mr->alias_offset;
1359
1360 assert(mr->alias);
1361 mr->alias_offset = offset;
1362
1363 if (offset == old_offset || !mr->parent) {
1364 return;
1365 }
1366
1367 memory_region_update_topology(mr);
1368 }
1369
1370 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1371 {
1372 return mr->ram_addr;
1373 }
1374
1375 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1376 {
1377 const AddrRange *addr = addr_;
1378 const FlatRange *fr = fr_;
1379
1380 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1381 return -1;
1382 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1383 return 1;
1384 }
1385 return 0;
1386 }
1387
1388 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1389 {
1390 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1391 sizeof(FlatRange), cmp_flatrange_addr);
1392 }
1393
1394 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1395 target_phys_addr_t addr, uint64_t size)
1396 {
1397 AddressSpace *as = memory_region_to_address_space(address_space);
1398 AddrRange range = addrrange_make(int128_make64(addr),
1399 int128_make64(size));
1400 FlatRange *fr = address_space_lookup(as, range);
1401 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1402
1403 if (!fr) {
1404 return ret;
1405 }
1406
1407 while (fr > as->current_map.ranges
1408 && addrrange_intersects(fr[-1].addr, range)) {
1409 --fr;
1410 }
1411
1412 ret.mr = fr->mr;
1413 range = addrrange_intersection(range, fr->addr);
1414 ret.offset_within_region = fr->offset_in_region;
1415 ret.offset_within_region += int128_get64(int128_sub(range.start,
1416 fr->addr.start));
1417 ret.size = int128_get64(range.size);
1418 ret.offset_within_address_space = int128_get64(range.start);
1419 ret.readonly = fr->readonly;
1420 return ret;
1421 }
1422
1423 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1424 {
1425 AddressSpace *as = memory_region_to_address_space(address_space);
1426 FlatRange *fr;
1427
1428 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1429 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1430 }
1431 }
1432
1433 void memory_global_dirty_log_start(void)
1434 {
1435 global_dirty_log = true;
1436 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1437 }
1438
1439 void memory_global_dirty_log_stop(void)
1440 {
1441 global_dirty_log = false;
1442 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1443 }
1444
1445 static void listener_add_address_space(MemoryListener *listener,
1446 AddressSpace *as)
1447 {
1448 FlatRange *fr;
1449
1450 if (global_dirty_log) {
1451 listener->log_global_start(listener);
1452 }
1453 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1454 MemoryRegionSection section = {
1455 .mr = fr->mr,
1456 .address_space = as->root,
1457 .offset_within_region = fr->offset_in_region,
1458 .size = int128_get64(fr->addr.size),
1459 .offset_within_address_space = int128_get64(fr->addr.start),
1460 .readonly = fr->readonly,
1461 };
1462 listener->region_add(listener, &section);
1463 }
1464 }
1465
1466 void memory_listener_register(MemoryListener *listener, MemoryRegion *filter)
1467 {
1468 MemoryListener *other = NULL;
1469
1470 listener->address_space_filter = filter;
1471 if (QTAILQ_EMPTY(&memory_listeners)
1472 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1473 memory_listeners)->priority) {
1474 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1475 } else {
1476 QTAILQ_FOREACH(other, &memory_listeners, link) {
1477 if (listener->priority < other->priority) {
1478 break;
1479 }
1480 }
1481 QTAILQ_INSERT_BEFORE(other, listener, link);
1482 }
1483 listener_add_address_space(listener, &address_space_memory);
1484 listener_add_address_space(listener, &address_space_io);
1485 }
1486
1487 void memory_listener_unregister(MemoryListener *listener)
1488 {
1489 QTAILQ_REMOVE(&memory_listeners, listener, link);
1490 }
1491
1492 void set_system_memory_map(MemoryRegion *mr)
1493 {
1494 address_space_memory.root = mr;
1495 memory_region_update_topology(NULL);
1496 }
1497
1498 void set_system_io_map(MemoryRegion *mr)
1499 {
1500 address_space_io.root = mr;
1501 memory_region_update_topology(NULL);
1502 }
1503
1504 uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size)
1505 {
1506 return memory_region_dispatch_read(mr, addr, size);
1507 }
1508
1509 void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr,
1510 uint64_t val, unsigned size)
1511 {
1512 memory_region_dispatch_write(mr, addr, val, size);
1513 }
1514
1515 typedef struct MemoryRegionList MemoryRegionList;
1516
1517 struct MemoryRegionList {
1518 const MemoryRegion *mr;
1519 bool printed;
1520 QTAILQ_ENTRY(MemoryRegionList) queue;
1521 };
1522
1523 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1524
1525 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1526 const MemoryRegion *mr, unsigned int level,
1527 target_phys_addr_t base,
1528 MemoryRegionListHead *alias_print_queue)
1529 {
1530 MemoryRegionList *new_ml, *ml, *next_ml;
1531 MemoryRegionListHead submr_print_queue;
1532 const MemoryRegion *submr;
1533 unsigned int i;
1534
1535 if (!mr) {
1536 return;
1537 }
1538
1539 for (i = 0; i < level; i++) {
1540 mon_printf(f, " ");
1541 }
1542
1543 if (mr->alias) {
1544 MemoryRegionList *ml;
1545 bool found = false;
1546
1547 /* check if the alias is already in the queue */
1548 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1549 if (ml->mr == mr->alias && !ml->printed) {
1550 found = true;
1551 }
1552 }
1553
1554 if (!found) {
1555 ml = g_new(MemoryRegionList, 1);
1556 ml->mr = mr->alias;
1557 ml->printed = false;
1558 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1559 }
1560 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1561 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1562 "-" TARGET_FMT_plx "\n",
1563 base + mr->addr,
1564 base + mr->addr
1565 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1566 mr->priority,
1567 mr->readable ? 'R' : '-',
1568 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1569 : '-',
1570 mr->name,
1571 mr->alias->name,
1572 mr->alias_offset,
1573 mr->alias_offset
1574 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1575 } else {
1576 mon_printf(f,
1577 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1578 base + mr->addr,
1579 base + mr->addr
1580 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1581 mr->priority,
1582 mr->readable ? 'R' : '-',
1583 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1584 : '-',
1585 mr->name);
1586 }
1587
1588 QTAILQ_INIT(&submr_print_queue);
1589
1590 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1591 new_ml = g_new(MemoryRegionList, 1);
1592 new_ml->mr = submr;
1593 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1594 if (new_ml->mr->addr < ml->mr->addr ||
1595 (new_ml->mr->addr == ml->mr->addr &&
1596 new_ml->mr->priority > ml->mr->priority)) {
1597 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1598 new_ml = NULL;
1599 break;
1600 }
1601 }
1602 if (new_ml) {
1603 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1604 }
1605 }
1606
1607 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1608 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1609 alias_print_queue);
1610 }
1611
1612 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1613 g_free(ml);
1614 }
1615 }
1616
1617 void mtree_info(fprintf_function mon_printf, void *f)
1618 {
1619 MemoryRegionListHead ml_head;
1620 MemoryRegionList *ml, *ml2;
1621
1622 QTAILQ_INIT(&ml_head);
1623
1624 mon_printf(f, "memory\n");
1625 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1626
1627 /* print aliased regions */
1628 QTAILQ_FOREACH(ml, &ml_head, queue) {
1629 if (!ml->printed) {
1630 mon_printf(f, "%s\n", ml->mr->name);
1631 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1632 }
1633 }
1634
1635 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1636 g_free(ml);
1637 }
1638
1639 if (address_space_io.root &&
1640 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1641 QTAILQ_INIT(&ml_head);
1642 mon_printf(f, "I/O\n");
1643 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1644 }
1645 }
Qemu copy for testing