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Merge remote-tracking branch 'qemu-kvm/memory/urgent' into staging
[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #include "memory-internal.h"
24
25 unsigned memory_region_transaction_depth = 0;
26 static bool global_dirty_log = false;
27
28 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
29 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
30
31 static QTAILQ_HEAD(, AddressSpace) address_spaces
32 = QTAILQ_HEAD_INITIALIZER(address_spaces);
33
34 typedef struct AddrRange AddrRange;
35
36 /*
37 * Note using signed integers limits us to physical addresses at most
38 * 63 bits wide. They are needed for negative offsetting in aliases
39 * (large MemoryRegion::alias_offset).
40 */
41 struct AddrRange {
42 Int128 start;
43 Int128 size;
44 };
45
46 static AddrRange addrrange_make(Int128 start, Int128 size)
47 {
48 return (AddrRange) { start, size };
49 }
50
51 static bool addrrange_equal(AddrRange r1, AddrRange r2)
52 {
53 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
54 }
55
56 static Int128 addrrange_end(AddrRange r)
57 {
58 return int128_add(r.start, r.size);
59 }
60
61 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
62 {
63 int128_addto(&range.start, delta);
64 return range;
65 }
66
67 static bool addrrange_contains(AddrRange range, Int128 addr)
68 {
69 return int128_ge(addr, range.start)
70 && int128_lt(addr, addrrange_end(range));
71 }
72
73 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
74 {
75 return addrrange_contains(r1, r2.start)
76 || addrrange_contains(r2, r1.start);
77 }
78
79 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
80 {
81 Int128 start = int128_max(r1.start, r2.start);
82 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
83 return addrrange_make(start, int128_sub(end, start));
84 }
85
86 enum ListenerDirection { Forward, Reverse };
87
88 static bool memory_listener_match(MemoryListener *listener,
89 MemoryRegionSection *section)
90 {
91 return !listener->address_space_filter
92 || listener->address_space_filter == section->address_space;
93 }
94
95 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
96 do { \
97 MemoryListener *_listener; \
98 \
99 switch (_direction) { \
100 case Forward: \
101 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
102 if (_listener->_callback) { \
103 _listener->_callback(_listener, ##_args); \
104 } \
105 } \
106 break; \
107 case Reverse: \
108 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
109 memory_listeners, link) { \
110 if (_listener->_callback) { \
111 _listener->_callback(_listener, ##_args); \
112 } \
113 } \
114 break; \
115 default: \
116 abort(); \
117 } \
118 } while (0)
119
120 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
121 do { \
122 MemoryListener *_listener; \
123 \
124 switch (_direction) { \
125 case Forward: \
126 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
127 if (_listener->_callback \
128 && memory_listener_match(_listener, _section)) { \
129 _listener->_callback(_listener, _section, ##_args); \
130 } \
131 } \
132 break; \
133 case Reverse: \
134 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
135 memory_listeners, link) { \
136 if (_listener->_callback \
137 && memory_listener_match(_listener, _section)) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 default: \
143 abort(); \
144 } \
145 } while (0)
146
147 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
148 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
149 .mr = (fr)->mr, \
150 .address_space = (as), \
151 .offset_within_region = (fr)->offset_in_region, \
152 .size = int128_get64((fr)->addr.size), \
153 .offset_within_address_space = int128_get64((fr)->addr.start), \
154 .readonly = (fr)->readonly, \
155 }))
156
157 struct CoalescedMemoryRange {
158 AddrRange addr;
159 QTAILQ_ENTRY(CoalescedMemoryRange) link;
160 };
161
162 struct MemoryRegionIoeventfd {
163 AddrRange addr;
164 bool match_data;
165 uint64_t data;
166 EventNotifier *e;
167 };
168
169 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
170 MemoryRegionIoeventfd b)
171 {
172 if (int128_lt(a.addr.start, b.addr.start)) {
173 return true;
174 } else if (int128_gt(a.addr.start, b.addr.start)) {
175 return false;
176 } else if (int128_lt(a.addr.size, b.addr.size)) {
177 return true;
178 } else if (int128_gt(a.addr.size, b.addr.size)) {
179 return false;
180 } else if (a.match_data < b.match_data) {
181 return true;
182 } else if (a.match_data > b.match_data) {
183 return false;
184 } else if (a.match_data) {
185 if (a.data < b.data) {
186 return true;
187 } else if (a.data > b.data) {
188 return false;
189 }
190 }
191 if (a.e < b.e) {
192 return true;
193 } else if (a.e > b.e) {
194 return false;
195 }
196 return false;
197 }
198
199 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
200 MemoryRegionIoeventfd b)
201 {
202 return !memory_region_ioeventfd_before(a, b)
203 && !memory_region_ioeventfd_before(b, a);
204 }
205
206 typedef struct FlatRange FlatRange;
207 typedef struct FlatView FlatView;
208
209 /* Range of memory in the global map. Addresses are absolute. */
210 struct FlatRange {
211 MemoryRegion *mr;
212 target_phys_addr_t offset_in_region;
213 AddrRange addr;
214 uint8_t dirty_log_mask;
215 bool readable;
216 bool readonly;
217 };
218
219 /* Flattened global view of current active memory hierarchy. Kept in sorted
220 * order.
221 */
222 struct FlatView {
223 FlatRange *ranges;
224 unsigned nr;
225 unsigned nr_allocated;
226 };
227
228 typedef struct AddressSpaceOps AddressSpaceOps;
229
230 #define FOR_EACH_FLAT_RANGE(var, view) \
231 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
232
233 static bool flatrange_equal(FlatRange *a, FlatRange *b)
234 {
235 return a->mr == b->mr
236 && addrrange_equal(a->addr, b->addr)
237 && a->offset_in_region == b->offset_in_region
238 && a->readable == b->readable
239 && a->readonly == b->readonly;
240 }
241
242 static void flatview_init(FlatView *view)
243 {
244 view->ranges = NULL;
245 view->nr = 0;
246 view->nr_allocated = 0;
247 }
248
249 /* Insert a range into a given position. Caller is responsible for maintaining
250 * sorting order.
251 */
252 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
253 {
254 if (view->nr == view->nr_allocated) {
255 view->nr_allocated = MAX(2 * view->nr, 10);
256 view->ranges = g_realloc(view->ranges,
257 view->nr_allocated * sizeof(*view->ranges));
258 }
259 memmove(view->ranges + pos + 1, view->ranges + pos,
260 (view->nr - pos) * sizeof(FlatRange));
261 view->ranges[pos] = *range;
262 ++view->nr;
263 }
264
265 static void flatview_destroy(FlatView *view)
266 {
267 g_free(view->ranges);
268 }
269
270 static bool can_merge(FlatRange *r1, FlatRange *r2)
271 {
272 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
273 && r1->mr == r2->mr
274 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
275 r1->addr.size),
276 int128_make64(r2->offset_in_region))
277 && r1->dirty_log_mask == r2->dirty_log_mask
278 && r1->readable == r2->readable
279 && r1->readonly == r2->readonly;
280 }
281
282 /* Attempt to simplify a view by merging ajacent ranges */
283 static void flatview_simplify(FlatView *view)
284 {
285 unsigned i, j;
286
287 i = 0;
288 while (i < view->nr) {
289 j = i + 1;
290 while (j < view->nr
291 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
292 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
293 ++j;
294 }
295 ++i;
296 memmove(&view->ranges[i], &view->ranges[j],
297 (view->nr - j) * sizeof(view->ranges[j]));
298 view->nr -= j - i;
299 }
300 }
301
302 static void memory_region_read_accessor(void *opaque,
303 target_phys_addr_t addr,
304 uint64_t *value,
305 unsigned size,
306 unsigned shift,
307 uint64_t mask)
308 {
309 MemoryRegion *mr = opaque;
310 uint64_t tmp;
311
312 if (mr->flush_coalesced_mmio) {
313 qemu_flush_coalesced_mmio_buffer();
314 }
315 tmp = mr->ops->read(mr->opaque, addr, size);
316 *value |= (tmp & mask) << shift;
317 }
318
319 static void memory_region_write_accessor(void *opaque,
320 target_phys_addr_t addr,
321 uint64_t *value,
322 unsigned size,
323 unsigned shift,
324 uint64_t mask)
325 {
326 MemoryRegion *mr = opaque;
327 uint64_t tmp;
328
329 if (mr->flush_coalesced_mmio) {
330 qemu_flush_coalesced_mmio_buffer();
331 }
332 tmp = (*value >> shift) & mask;
333 mr->ops->write(mr->opaque, addr, tmp, size);
334 }
335
336 static void access_with_adjusted_size(target_phys_addr_t addr,
337 uint64_t *value,
338 unsigned size,
339 unsigned access_size_min,
340 unsigned access_size_max,
341 void (*access)(void *opaque,
342 target_phys_addr_t addr,
343 uint64_t *value,
344 unsigned size,
345 unsigned shift,
346 uint64_t mask),
347 void *opaque)
348 {
349 uint64_t access_mask;
350 unsigned access_size;
351 unsigned i;
352
353 if (!access_size_min) {
354 access_size_min = 1;
355 }
356 if (!access_size_max) {
357 access_size_max = 4;
358 }
359 access_size = MAX(MIN(size, access_size_max), access_size_min);
360 access_mask = -1ULL >> (64 - access_size * 8);
361 for (i = 0; i < size; i += access_size) {
362 /* FIXME: big-endian support */
363 access(opaque, addr + i, value, access_size, i * 8, access_mask);
364 }
365 }
366
367 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
368 unsigned width, bool write)
369 {
370 const MemoryRegionPortio *mrp;
371
372 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
373 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
374 && width == mrp->size
375 && (write ? (bool)mrp->write : (bool)mrp->read)) {
376 return mrp;
377 }
378 }
379 return NULL;
380 }
381
382 static void memory_region_iorange_read(IORange *iorange,
383 uint64_t offset,
384 unsigned width,
385 uint64_t *data)
386 {
387 MemoryRegionIORange *mrio
388 = container_of(iorange, MemoryRegionIORange, iorange);
389 MemoryRegion *mr = mrio->mr;
390
391 offset += mrio->offset;
392 if (mr->ops->old_portio) {
393 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
394 width, false);
395
396 *data = ((uint64_t)1 << (width * 8)) - 1;
397 if (mrp) {
398 *data = mrp->read(mr->opaque, offset);
399 } else if (width == 2) {
400 mrp = find_portio(mr, offset - mrio->offset, 1, false);
401 assert(mrp);
402 *data = mrp->read(mr->opaque, offset) |
403 (mrp->read(mr->opaque, offset + 1) << 8);
404 }
405 return;
406 }
407 *data = 0;
408 access_with_adjusted_size(offset, data, width,
409 mr->ops->impl.min_access_size,
410 mr->ops->impl.max_access_size,
411 memory_region_read_accessor, mr);
412 }
413
414 static void memory_region_iorange_write(IORange *iorange,
415 uint64_t offset,
416 unsigned width,
417 uint64_t data)
418 {
419 MemoryRegionIORange *mrio
420 = container_of(iorange, MemoryRegionIORange, iorange);
421 MemoryRegion *mr = mrio->mr;
422
423 offset += mrio->offset;
424 if (mr->ops->old_portio) {
425 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
426 width, true);
427
428 if (mrp) {
429 mrp->write(mr->opaque, offset, data);
430 } else if (width == 2) {
431 mrp = find_portio(mr, offset - mrio->offset, 1, true);
432 assert(mrp);
433 mrp->write(mr->opaque, offset, data & 0xff);
434 mrp->write(mr->opaque, offset + 1, data >> 8);
435 }
436 return;
437 }
438 access_with_adjusted_size(offset, &data, width,
439 mr->ops->impl.min_access_size,
440 mr->ops->impl.max_access_size,
441 memory_region_write_accessor, mr);
442 }
443
444 static void memory_region_iorange_destructor(IORange *iorange)
445 {
446 g_free(container_of(iorange, MemoryRegionIORange, iorange));
447 }
448
449 const IORangeOps memory_region_iorange_ops = {
450 .read = memory_region_iorange_read,
451 .write = memory_region_iorange_write,
452 .destructor = memory_region_iorange_destructor,
453 };
454
455 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
456 {
457 AddressSpace *as;
458
459 while (mr->parent) {
460 mr = mr->parent;
461 }
462 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
463 if (mr == as->root) {
464 return as;
465 }
466 }
467 abort();
468 }
469
470 /* Render a memory region into the global view. Ranges in @view obscure
471 * ranges in @mr.
472 */
473 static void render_memory_region(FlatView *view,
474 MemoryRegion *mr,
475 Int128 base,
476 AddrRange clip,
477 bool readonly)
478 {
479 MemoryRegion *subregion;
480 unsigned i;
481 target_phys_addr_t offset_in_region;
482 Int128 remain;
483 Int128 now;
484 FlatRange fr;
485 AddrRange tmp;
486
487 if (!mr->enabled) {
488 return;
489 }
490
491 int128_addto(&base, int128_make64(mr->addr));
492 readonly |= mr->readonly;
493
494 tmp = addrrange_make(base, mr->size);
495
496 if (!addrrange_intersects(tmp, clip)) {
497 return;
498 }
499
500 clip = addrrange_intersection(tmp, clip);
501
502 if (mr->alias) {
503 int128_subfrom(&base, int128_make64(mr->alias->addr));
504 int128_subfrom(&base, int128_make64(mr->alias_offset));
505 render_memory_region(view, mr->alias, base, clip, readonly);
506 return;
507 }
508
509 /* Render subregions in priority order. */
510 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
511 render_memory_region(view, subregion, base, clip, readonly);
512 }
513
514 if (!mr->terminates) {
515 return;
516 }
517
518 offset_in_region = int128_get64(int128_sub(clip.start, base));
519 base = clip.start;
520 remain = clip.size;
521
522 /* Render the region itself into any gaps left by the current view. */
523 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
524 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
525 continue;
526 }
527 if (int128_lt(base, view->ranges[i].addr.start)) {
528 now = int128_min(remain,
529 int128_sub(view->ranges[i].addr.start, base));
530 fr.mr = mr;
531 fr.offset_in_region = offset_in_region;
532 fr.addr = addrrange_make(base, now);
533 fr.dirty_log_mask = mr->dirty_log_mask;
534 fr.readable = mr->readable;
535 fr.readonly = readonly;
536 flatview_insert(view, i, &fr);
537 ++i;
538 int128_addto(&base, now);
539 offset_in_region += int128_get64(now);
540 int128_subfrom(&remain, now);
541 }
542 if (int128_eq(base, view->ranges[i].addr.start)) {
543 now = int128_min(remain, view->ranges[i].addr.size);
544 int128_addto(&base, now);
545 offset_in_region += int128_get64(now);
546 int128_subfrom(&remain, now);
547 }
548 }
549 if (int128_nz(remain)) {
550 fr.mr = mr;
551 fr.offset_in_region = offset_in_region;
552 fr.addr = addrrange_make(base, remain);
553 fr.dirty_log_mask = mr->dirty_log_mask;
554 fr.readable = mr->readable;
555 fr.readonly = readonly;
556 flatview_insert(view, i, &fr);
557 }
558 }
559
560 /* Render a memory topology into a list of disjoint absolute ranges. */
561 static FlatView generate_memory_topology(MemoryRegion *mr)
562 {
563 FlatView view;
564
565 flatview_init(&view);
566
567 if (mr) {
568 render_memory_region(&view, mr, int128_zero(),
569 addrrange_make(int128_zero(), int128_2_64()), false);
570 }
571 flatview_simplify(&view);
572
573 return view;
574 }
575
576 static void address_space_add_del_ioeventfds(AddressSpace *as,
577 MemoryRegionIoeventfd *fds_new,
578 unsigned fds_new_nb,
579 MemoryRegionIoeventfd *fds_old,
580 unsigned fds_old_nb)
581 {
582 unsigned iold, inew;
583 MemoryRegionIoeventfd *fd;
584 MemoryRegionSection section;
585
586 /* Generate a symmetric difference of the old and new fd sets, adding
587 * and deleting as necessary.
588 */
589
590 iold = inew = 0;
591 while (iold < fds_old_nb || inew < fds_new_nb) {
592 if (iold < fds_old_nb
593 && (inew == fds_new_nb
594 || memory_region_ioeventfd_before(fds_old[iold],
595 fds_new[inew]))) {
596 fd = &fds_old[iold];
597 section = (MemoryRegionSection) {
598 .address_space = as,
599 .offset_within_address_space = int128_get64(fd->addr.start),
600 .size = int128_get64(fd->addr.size),
601 };
602 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
603 fd->match_data, fd->data, fd->e);
604 ++iold;
605 } else if (inew < fds_new_nb
606 && (iold == fds_old_nb
607 || memory_region_ioeventfd_before(fds_new[inew],
608 fds_old[iold]))) {
609 fd = &fds_new[inew];
610 section = (MemoryRegionSection) {
611 .address_space = as,
612 .offset_within_address_space = int128_get64(fd->addr.start),
613 .size = int128_get64(fd->addr.size),
614 };
615 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
616 fd->match_data, fd->data, fd->e);
617 ++inew;
618 } else {
619 ++iold;
620 ++inew;
621 }
622 }
623 }
624
625 static void address_space_update_ioeventfds(AddressSpace *as)
626 {
627 FlatRange *fr;
628 unsigned ioeventfd_nb = 0;
629 MemoryRegionIoeventfd *ioeventfds = NULL;
630 AddrRange tmp;
631 unsigned i;
632
633 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
634 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
635 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
636 int128_sub(fr->addr.start,
637 int128_make64(fr->offset_in_region)));
638 if (addrrange_intersects(fr->addr, tmp)) {
639 ++ioeventfd_nb;
640 ioeventfds = g_realloc(ioeventfds,
641 ioeventfd_nb * sizeof(*ioeventfds));
642 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
643 ioeventfds[ioeventfd_nb-1].addr = tmp;
644 }
645 }
646 }
647
648 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
649 as->ioeventfds, as->ioeventfd_nb);
650
651 g_free(as->ioeventfds);
652 as->ioeventfds = ioeventfds;
653 as->ioeventfd_nb = ioeventfd_nb;
654 }
655
656 static void address_space_update_topology_pass(AddressSpace *as,
657 FlatView old_view,
658 FlatView new_view,
659 bool adding)
660 {
661 unsigned iold, inew;
662 FlatRange *frold, *frnew;
663
664 /* Generate a symmetric difference of the old and new memory maps.
665 * Kill ranges in the old map, and instantiate ranges in the new map.
666 */
667 iold = inew = 0;
668 while (iold < old_view.nr || inew < new_view.nr) {
669 if (iold < old_view.nr) {
670 frold = &old_view.ranges[iold];
671 } else {
672 frold = NULL;
673 }
674 if (inew < new_view.nr) {
675 frnew = &new_view.ranges[inew];
676 } else {
677 frnew = NULL;
678 }
679
680 if (frold
681 && (!frnew
682 || int128_lt(frold->addr.start, frnew->addr.start)
683 || (int128_eq(frold->addr.start, frnew->addr.start)
684 && !flatrange_equal(frold, frnew)))) {
685 /* In old, but (not in new, or in new but attributes changed). */
686
687 if (!adding) {
688 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
689 }
690
691 ++iold;
692 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
693 /* In both (logging may have changed) */
694
695 if (adding) {
696 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
697 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
698 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
699 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
700 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
701 }
702 }
703
704 ++iold;
705 ++inew;
706 } else {
707 /* In new */
708
709 if (adding) {
710 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
711 }
712
713 ++inew;
714 }
715 }
716 }
717
718
719 static void address_space_update_topology(AddressSpace *as)
720 {
721 FlatView old_view = *as->current_map;
722 FlatView new_view = generate_memory_topology(as->root);
723
724 address_space_update_topology_pass(as, old_view, new_view, false);
725 address_space_update_topology_pass(as, old_view, new_view, true);
726
727 *as->current_map = new_view;
728 flatview_destroy(&old_view);
729 address_space_update_ioeventfds(as);
730 }
731
732 void memory_region_transaction_begin(void)
733 {
734 qemu_flush_coalesced_mmio_buffer();
735 ++memory_region_transaction_depth;
736 }
737
738 void memory_region_transaction_commit(void)
739 {
740 AddressSpace *as;
741
742 assert(memory_region_transaction_depth);
743 --memory_region_transaction_depth;
744 if (!memory_region_transaction_depth) {
745 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
746
747 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
748 address_space_update_topology(as);
749 }
750
751 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
752 }
753 }
754
755 static void memory_region_destructor_none(MemoryRegion *mr)
756 {
757 }
758
759 static void memory_region_destructor_ram(MemoryRegion *mr)
760 {
761 qemu_ram_free(mr->ram_addr);
762 }
763
764 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
765 {
766 qemu_ram_free_from_ptr(mr->ram_addr);
767 }
768
769 static void memory_region_destructor_iomem(MemoryRegion *mr)
770 {
771 }
772
773 static void memory_region_destructor_rom_device(MemoryRegion *mr)
774 {
775 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
776 }
777
778 static bool memory_region_wrong_endianness(MemoryRegion *mr)
779 {
780 #ifdef TARGET_WORDS_BIGENDIAN
781 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
782 #else
783 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
784 #endif
785 }
786
787 void memory_region_init(MemoryRegion *mr,
788 const char *name,
789 uint64_t size)
790 {
791 mr->ops = NULL;
792 mr->parent = NULL;
793 mr->size = int128_make64(size);
794 if (size == UINT64_MAX) {
795 mr->size = int128_2_64();
796 }
797 mr->addr = 0;
798 mr->subpage = false;
799 mr->enabled = true;
800 mr->terminates = false;
801 mr->ram = false;
802 mr->readable = true;
803 mr->readonly = false;
804 mr->rom_device = false;
805 mr->destructor = memory_region_destructor_none;
806 mr->priority = 0;
807 mr->may_overlap = false;
808 mr->alias = NULL;
809 QTAILQ_INIT(&mr->subregions);
810 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
811 QTAILQ_INIT(&mr->coalesced);
812 mr->name = g_strdup(name);
813 mr->dirty_log_mask = 0;
814 mr->ioeventfd_nb = 0;
815 mr->ioeventfds = NULL;
816 mr->flush_coalesced_mmio = false;
817 }
818
819 static bool memory_region_access_valid(MemoryRegion *mr,
820 target_phys_addr_t addr,
821 unsigned size,
822 bool is_write)
823 {
824 if (mr->ops->valid.accepts
825 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
826 return false;
827 }
828
829 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
830 return false;
831 }
832
833 /* Treat zero as compatibility all valid */
834 if (!mr->ops->valid.max_access_size) {
835 return true;
836 }
837
838 if (size > mr->ops->valid.max_access_size
839 || size < mr->ops->valid.min_access_size) {
840 return false;
841 }
842 return true;
843 }
844
845 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
846 target_phys_addr_t addr,
847 unsigned size)
848 {
849 uint64_t data = 0;
850
851 if (!memory_region_access_valid(mr, addr, size, false)) {
852 return -1U; /* FIXME: better signalling */
853 }
854
855 if (!mr->ops->read) {
856 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
857 }
858
859 /* FIXME: support unaligned access */
860 access_with_adjusted_size(addr, &data, size,
861 mr->ops->impl.min_access_size,
862 mr->ops->impl.max_access_size,
863 memory_region_read_accessor, mr);
864
865 return data;
866 }
867
868 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
869 {
870 if (memory_region_wrong_endianness(mr)) {
871 switch (size) {
872 case 1:
873 break;
874 case 2:
875 *data = bswap16(*data);
876 break;
877 case 4:
878 *data = bswap32(*data);
879 break;
880 default:
881 abort();
882 }
883 }
884 }
885
886 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
887 target_phys_addr_t addr,
888 unsigned size)
889 {
890 uint64_t ret;
891
892 ret = memory_region_dispatch_read1(mr, addr, size);
893 adjust_endianness(mr, &ret, size);
894 return ret;
895 }
896
897 static void memory_region_dispatch_write(MemoryRegion *mr,
898 target_phys_addr_t addr,
899 uint64_t data,
900 unsigned size)
901 {
902 if (!memory_region_access_valid(mr, addr, size, true)) {
903 return; /* FIXME: better signalling */
904 }
905
906 adjust_endianness(mr, &data, size);
907
908 if (!mr->ops->write) {
909 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
910 return;
911 }
912
913 /* FIXME: support unaligned access */
914 access_with_adjusted_size(addr, &data, size,
915 mr->ops->impl.min_access_size,
916 mr->ops->impl.max_access_size,
917 memory_region_write_accessor, mr);
918 }
919
920 void memory_region_init_io(MemoryRegion *mr,
921 const MemoryRegionOps *ops,
922 void *opaque,
923 const char *name,
924 uint64_t size)
925 {
926 memory_region_init(mr, name, size);
927 mr->ops = ops;
928 mr->opaque = opaque;
929 mr->terminates = true;
930 mr->destructor = memory_region_destructor_iomem;
931 mr->ram_addr = ~(ram_addr_t)0;
932 }
933
934 void memory_region_init_ram(MemoryRegion *mr,
935 const char *name,
936 uint64_t size)
937 {
938 memory_region_init(mr, name, size);
939 mr->ram = true;
940 mr->terminates = true;
941 mr->destructor = memory_region_destructor_ram;
942 mr->ram_addr = qemu_ram_alloc(size, mr);
943 }
944
945 void memory_region_init_ram_ptr(MemoryRegion *mr,
946 const char *name,
947 uint64_t size,
948 void *ptr)
949 {
950 memory_region_init(mr, name, size);
951 mr->ram = true;
952 mr->terminates = true;
953 mr->destructor = memory_region_destructor_ram_from_ptr;
954 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
955 }
956
957 void memory_region_init_alias(MemoryRegion *mr,
958 const char *name,
959 MemoryRegion *orig,
960 target_phys_addr_t offset,
961 uint64_t size)
962 {
963 memory_region_init(mr, name, size);
964 mr->alias = orig;
965 mr->alias_offset = offset;
966 }
967
968 void memory_region_init_rom_device(MemoryRegion *mr,
969 const MemoryRegionOps *ops,
970 void *opaque,
971 const char *name,
972 uint64_t size)
973 {
974 memory_region_init(mr, name, size);
975 mr->ops = ops;
976 mr->opaque = opaque;
977 mr->terminates = true;
978 mr->rom_device = true;
979 mr->destructor = memory_region_destructor_rom_device;
980 mr->ram_addr = qemu_ram_alloc(size, mr);
981 }
982
983 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
984 unsigned size)
985 {
986 MemoryRegion *mr = opaque;
987
988 if (!mr->warning_printed) {
989 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
990 mr->warning_printed = true;
991 }
992 return -1U;
993 }
994
995 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
996 unsigned size)
997 {
998 MemoryRegion *mr = opaque;
999
1000 if (!mr->warning_printed) {
1001 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1002 mr->warning_printed = true;
1003 }
1004 }
1005
1006 static const MemoryRegionOps reservation_ops = {
1007 .read = invalid_read,
1008 .write = invalid_write,
1009 .endianness = DEVICE_NATIVE_ENDIAN,
1010 };
1011
1012 void memory_region_init_reservation(MemoryRegion *mr,
1013 const char *name,
1014 uint64_t size)
1015 {
1016 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1017 }
1018
1019 void memory_region_destroy(MemoryRegion *mr)
1020 {
1021 assert(QTAILQ_EMPTY(&mr->subregions));
1022 assert(memory_region_transaction_depth == 0);
1023 mr->destructor(mr);
1024 memory_region_clear_coalescing(mr);
1025 g_free((char *)mr->name);
1026 g_free(mr->ioeventfds);
1027 }
1028
1029 uint64_t memory_region_size(MemoryRegion *mr)
1030 {
1031 if (int128_eq(mr->size, int128_2_64())) {
1032 return UINT64_MAX;
1033 }
1034 return int128_get64(mr->size);
1035 }
1036
1037 const char *memory_region_name(MemoryRegion *mr)
1038 {
1039 return mr->name;
1040 }
1041
1042 bool memory_region_is_ram(MemoryRegion *mr)
1043 {
1044 return mr->ram;
1045 }
1046
1047 bool memory_region_is_logging(MemoryRegion *mr)
1048 {
1049 return mr->dirty_log_mask;
1050 }
1051
1052 bool memory_region_is_rom(MemoryRegion *mr)
1053 {
1054 return mr->ram && mr->readonly;
1055 }
1056
1057 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1058 {
1059 uint8_t mask = 1 << client;
1060
1061 memory_region_transaction_begin();
1062 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1063 memory_region_transaction_commit();
1064 }
1065
1066 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1067 target_phys_addr_t size, unsigned client)
1068 {
1069 assert(mr->terminates);
1070 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1071 1 << client);
1072 }
1073
1074 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1075 target_phys_addr_t size)
1076 {
1077 assert(mr->terminates);
1078 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1079 }
1080
1081 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1082 {
1083 AddressSpace *as;
1084 FlatRange *fr;
1085
1086 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1087 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1088 if (fr->mr == mr) {
1089 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1090 }
1091 }
1092 }
1093 }
1094
1095 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1096 {
1097 if (mr->readonly != readonly) {
1098 memory_region_transaction_begin();
1099 mr->readonly = readonly;
1100 memory_region_transaction_commit();
1101 }
1102 }
1103
1104 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1105 {
1106 if (mr->readable != readable) {
1107 memory_region_transaction_begin();
1108 mr->readable = readable;
1109 memory_region_transaction_commit();
1110 }
1111 }
1112
1113 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1114 target_phys_addr_t size, unsigned client)
1115 {
1116 assert(mr->terminates);
1117 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1118 mr->ram_addr + addr + size,
1119 1 << client);
1120 }
1121
1122 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1123 {
1124 if (mr->alias) {
1125 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1126 }
1127
1128 assert(mr->terminates);
1129
1130 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1131 }
1132
1133 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1134 {
1135 FlatRange *fr;
1136 CoalescedMemoryRange *cmr;
1137 AddrRange tmp;
1138 MemoryRegionSection section;
1139
1140 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1141 if (fr->mr == mr) {
1142 section = (MemoryRegionSection) {
1143 .address_space = as,
1144 .offset_within_address_space = int128_get64(fr->addr.start),
1145 .size = int128_get64(fr->addr.size),
1146 };
1147
1148 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1149 int128_get64(fr->addr.start),
1150 int128_get64(fr->addr.size));
1151 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1152 tmp = addrrange_shift(cmr->addr,
1153 int128_sub(fr->addr.start,
1154 int128_make64(fr->offset_in_region)));
1155 if (!addrrange_intersects(tmp, fr->addr)) {
1156 continue;
1157 }
1158 tmp = addrrange_intersection(tmp, fr->addr);
1159 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1160 int128_get64(tmp.start),
1161 int128_get64(tmp.size));
1162 }
1163 }
1164 }
1165 }
1166
1167 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1168 {
1169 AddressSpace *as;
1170
1171 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1172 memory_region_update_coalesced_range_as(mr, as);
1173 }
1174 }
1175
1176 void memory_region_set_coalescing(MemoryRegion *mr)
1177 {
1178 memory_region_clear_coalescing(mr);
1179 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1180 }
1181
1182 void memory_region_add_coalescing(MemoryRegion *mr,
1183 target_phys_addr_t offset,
1184 uint64_t size)
1185 {
1186 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1187
1188 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1189 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1190 memory_region_update_coalesced_range(mr);
1191 memory_region_set_flush_coalesced(mr);
1192 }
1193
1194 void memory_region_clear_coalescing(MemoryRegion *mr)
1195 {
1196 CoalescedMemoryRange *cmr;
1197
1198 qemu_flush_coalesced_mmio_buffer();
1199 mr->flush_coalesced_mmio = false;
1200
1201 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1202 cmr = QTAILQ_FIRST(&mr->coalesced);
1203 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1204 g_free(cmr);
1205 }
1206 memory_region_update_coalesced_range(mr);
1207 }
1208
1209 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1210 {
1211 mr->flush_coalesced_mmio = true;
1212 }
1213
1214 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1215 {
1216 qemu_flush_coalesced_mmio_buffer();
1217 if (QTAILQ_EMPTY(&mr->coalesced)) {
1218 mr->flush_coalesced_mmio = false;
1219 }
1220 }
1221
1222 void memory_region_add_eventfd(MemoryRegion *mr,
1223 target_phys_addr_t addr,
1224 unsigned size,
1225 bool match_data,
1226 uint64_t data,
1227 EventNotifier *e)
1228 {
1229 MemoryRegionIoeventfd mrfd = {
1230 .addr.start = int128_make64(addr),
1231 .addr.size = int128_make64(size),
1232 .match_data = match_data,
1233 .data = data,
1234 .e = e,
1235 };
1236 unsigned i;
1237
1238 adjust_endianness(mr, &mrfd.data, size);
1239 memory_region_transaction_begin();
1240 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1241 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1242 break;
1243 }
1244 }
1245 ++mr->ioeventfd_nb;
1246 mr->ioeventfds = g_realloc(mr->ioeventfds,
1247 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1248 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1249 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1250 mr->ioeventfds[i] = mrfd;
1251 memory_region_transaction_commit();
1252 }
1253
1254 void memory_region_del_eventfd(MemoryRegion *mr,
1255 target_phys_addr_t addr,
1256 unsigned size,
1257 bool match_data,
1258 uint64_t data,
1259 EventNotifier *e)
1260 {
1261 MemoryRegionIoeventfd mrfd = {
1262 .addr.start = int128_make64(addr),
1263 .addr.size = int128_make64(size),
1264 .match_data = match_data,
1265 .data = data,
1266 .e = e,
1267 };
1268 unsigned i;
1269
1270 adjust_endianness(mr, &mrfd.data, size);
1271 memory_region_transaction_begin();
1272 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1273 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1274 break;
1275 }
1276 }
1277 assert(i != mr->ioeventfd_nb);
1278 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1279 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1280 --mr->ioeventfd_nb;
1281 mr->ioeventfds = g_realloc(mr->ioeventfds,
1282 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1283 memory_region_transaction_commit();
1284 }
1285
1286 static void memory_region_add_subregion_common(MemoryRegion *mr,
1287 target_phys_addr_t offset,
1288 MemoryRegion *subregion)
1289 {
1290 MemoryRegion *other;
1291
1292 memory_region_transaction_begin();
1293
1294 assert(!subregion->parent);
1295 subregion->parent = mr;
1296 subregion->addr = offset;
1297 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1298 if (subregion->may_overlap || other->may_overlap) {
1299 continue;
1300 }
1301 if (int128_gt(int128_make64(offset),
1302 int128_add(int128_make64(other->addr), other->size))
1303 || int128_le(int128_add(int128_make64(offset), subregion->size),
1304 int128_make64(other->addr))) {
1305 continue;
1306 }
1307 #if 0
1308 printf("warning: subregion collision %llx/%llx (%s) "
1309 "vs %llx/%llx (%s)\n",
1310 (unsigned long long)offset,
1311 (unsigned long long)int128_get64(subregion->size),
1312 subregion->name,
1313 (unsigned long long)other->addr,
1314 (unsigned long long)int128_get64(other->size),
1315 other->name);
1316 #endif
1317 }
1318 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1319 if (subregion->priority >= other->priority) {
1320 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1321 goto done;
1322 }
1323 }
1324 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1325 done:
1326 memory_region_transaction_commit();
1327 }
1328
1329
1330 void memory_region_add_subregion(MemoryRegion *mr,
1331 target_phys_addr_t offset,
1332 MemoryRegion *subregion)
1333 {
1334 subregion->may_overlap = false;
1335 subregion->priority = 0;
1336 memory_region_add_subregion_common(mr, offset, subregion);
1337 }
1338
1339 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1340 target_phys_addr_t offset,
1341 MemoryRegion *subregion,
1342 unsigned priority)
1343 {
1344 subregion->may_overlap = true;
1345 subregion->priority = priority;
1346 memory_region_add_subregion_common(mr, offset, subregion);
1347 }
1348
1349 void memory_region_del_subregion(MemoryRegion *mr,
1350 MemoryRegion *subregion)
1351 {
1352 memory_region_transaction_begin();
1353 assert(subregion->parent == mr);
1354 subregion->parent = NULL;
1355 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1356 memory_region_transaction_commit();
1357 }
1358
1359 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1360 {
1361 if (enabled == mr->enabled) {
1362 return;
1363 }
1364 memory_region_transaction_begin();
1365 mr->enabled = enabled;
1366 memory_region_transaction_commit();
1367 }
1368
1369 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1370 {
1371 MemoryRegion *parent = mr->parent;
1372 unsigned priority = mr->priority;
1373 bool may_overlap = mr->may_overlap;
1374
1375 if (addr == mr->addr || !parent) {
1376 mr->addr = addr;
1377 return;
1378 }
1379
1380 memory_region_transaction_begin();
1381 memory_region_del_subregion(parent, mr);
1382 if (may_overlap) {
1383 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1384 } else {
1385 memory_region_add_subregion(parent, addr, mr);
1386 }
1387 memory_region_transaction_commit();
1388 }
1389
1390 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1391 {
1392 assert(mr->alias);
1393
1394 if (offset == mr->alias_offset) {
1395 return;
1396 }
1397
1398 memory_region_transaction_begin();
1399 mr->alias_offset = offset;
1400 memory_region_transaction_commit();
1401 }
1402
1403 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1404 {
1405 return mr->ram_addr;
1406 }
1407
1408 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1409 {
1410 const AddrRange *addr = addr_;
1411 const FlatRange *fr = fr_;
1412
1413 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1414 return -1;
1415 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1416 return 1;
1417 }
1418 return 0;
1419 }
1420
1421 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1422 {
1423 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1424 sizeof(FlatRange), cmp_flatrange_addr);
1425 }
1426
1427 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1428 target_phys_addr_t addr, uint64_t size)
1429 {
1430 AddressSpace *as = memory_region_to_address_space(address_space);
1431 AddrRange range = addrrange_make(int128_make64(addr),
1432 int128_make64(size));
1433 FlatRange *fr = address_space_lookup(as, range);
1434 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1435
1436 if (!fr) {
1437 return ret;
1438 }
1439
1440 while (fr > as->current_map->ranges
1441 && addrrange_intersects(fr[-1].addr, range)) {
1442 --fr;
1443 }
1444
1445 ret.mr = fr->mr;
1446 range = addrrange_intersection(range, fr->addr);
1447 ret.offset_within_region = fr->offset_in_region;
1448 ret.offset_within_region += int128_get64(int128_sub(range.start,
1449 fr->addr.start));
1450 ret.size = int128_get64(range.size);
1451 ret.offset_within_address_space = int128_get64(range.start);
1452 ret.readonly = fr->readonly;
1453 return ret;
1454 }
1455
1456 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1457 {
1458 AddressSpace *as = memory_region_to_address_space(address_space);
1459 FlatRange *fr;
1460
1461 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1462 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1463 }
1464 }
1465
1466 void memory_global_dirty_log_start(void)
1467 {
1468 global_dirty_log = true;
1469 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1470 }
1471
1472 void memory_global_dirty_log_stop(void)
1473 {
1474 global_dirty_log = false;
1475 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1476 }
1477
1478 static void listener_add_address_space(MemoryListener *listener,
1479 AddressSpace *as)
1480 {
1481 FlatRange *fr;
1482
1483 if (listener->address_space_filter
1484 && listener->address_space_filter != as) {
1485 return;
1486 }
1487
1488 if (global_dirty_log) {
1489 if (listener->log_global_start) {
1490 listener->log_global_start(listener);
1491 }
1492 }
1493
1494 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1495 MemoryRegionSection section = {
1496 .mr = fr->mr,
1497 .address_space = as,
1498 .offset_within_region = fr->offset_in_region,
1499 .size = int128_get64(fr->addr.size),
1500 .offset_within_address_space = int128_get64(fr->addr.start),
1501 .readonly = fr->readonly,
1502 };
1503 if (listener->region_add) {
1504 listener->region_add(listener, &section);
1505 }
1506 }
1507 }
1508
1509 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1510 {
1511 MemoryListener *other = NULL;
1512 AddressSpace *as;
1513
1514 listener->address_space_filter = filter;
1515 if (QTAILQ_EMPTY(&memory_listeners)
1516 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1517 memory_listeners)->priority) {
1518 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1519 } else {
1520 QTAILQ_FOREACH(other, &memory_listeners, link) {
1521 if (listener->priority < other->priority) {
1522 break;
1523 }
1524 }
1525 QTAILQ_INSERT_BEFORE(other, listener, link);
1526 }
1527
1528 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1529 listener_add_address_space(listener, as);
1530 }
1531 }
1532
1533 void memory_listener_unregister(MemoryListener *listener)
1534 {
1535 QTAILQ_REMOVE(&memory_listeners, listener, link);
1536 }
1537
1538 void address_space_init(AddressSpace *as, MemoryRegion *root)
1539 {
1540 memory_region_transaction_begin();
1541 as->root = root;
1542 as->current_map = g_new(FlatView, 1);
1543 flatview_init(as->current_map);
1544 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1545 as->name = NULL;
1546 memory_region_transaction_commit();
1547 address_space_init_dispatch(as);
1548 }
1549
1550 void address_space_destroy(AddressSpace *as)
1551 {
1552 /* Flush out anything from MemoryListeners listening in on this */
1553 memory_region_transaction_begin();
1554 as->root = NULL;
1555 memory_region_transaction_commit();
1556 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1557 address_space_destroy_dispatch(as);
1558 flatview_destroy(as->current_map);
1559 g_free(as->current_map);
1560 }
1561
1562 uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size)
1563 {
1564 return memory_region_dispatch_read(mr, addr, size);
1565 }
1566
1567 void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr,
1568 uint64_t val, unsigned size)
1569 {
1570 memory_region_dispatch_write(mr, addr, val, size);
1571 }
1572
1573 typedef struct MemoryRegionList MemoryRegionList;
1574
1575 struct MemoryRegionList {
1576 const MemoryRegion *mr;
1577 bool printed;
1578 QTAILQ_ENTRY(MemoryRegionList) queue;
1579 };
1580
1581 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1582
1583 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1584 const MemoryRegion *mr, unsigned int level,
1585 target_phys_addr_t base,
1586 MemoryRegionListHead *alias_print_queue)
1587 {
1588 MemoryRegionList *new_ml, *ml, *next_ml;
1589 MemoryRegionListHead submr_print_queue;
1590 const MemoryRegion *submr;
1591 unsigned int i;
1592
1593 if (!mr) {
1594 return;
1595 }
1596
1597 for (i = 0; i < level; i++) {
1598 mon_printf(f, " ");
1599 }
1600
1601 if (mr->alias) {
1602 MemoryRegionList *ml;
1603 bool found = false;
1604
1605 /* check if the alias is already in the queue */
1606 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1607 if (ml->mr == mr->alias && !ml->printed) {
1608 found = true;
1609 }
1610 }
1611
1612 if (!found) {
1613 ml = g_new(MemoryRegionList, 1);
1614 ml->mr = mr->alias;
1615 ml->printed = false;
1616 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1617 }
1618 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1619 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1620 "-" TARGET_FMT_plx "\n",
1621 base + mr->addr,
1622 base + mr->addr
1623 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1624 mr->priority,
1625 mr->readable ? 'R' : '-',
1626 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1627 : '-',
1628 mr->name,
1629 mr->alias->name,
1630 mr->alias_offset,
1631 mr->alias_offset
1632 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1633 } else {
1634 mon_printf(f,
1635 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1636 base + mr->addr,
1637 base + mr->addr
1638 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1639 mr->priority,
1640 mr->readable ? 'R' : '-',
1641 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1642 : '-',
1643 mr->name);
1644 }
1645
1646 QTAILQ_INIT(&submr_print_queue);
1647
1648 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1649 new_ml = g_new(MemoryRegionList, 1);
1650 new_ml->mr = submr;
1651 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1652 if (new_ml->mr->addr < ml->mr->addr ||
1653 (new_ml->mr->addr == ml->mr->addr &&
1654 new_ml->mr->priority > ml->mr->priority)) {
1655 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1656 new_ml = NULL;
1657 break;
1658 }
1659 }
1660 if (new_ml) {
1661 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1662 }
1663 }
1664
1665 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1666 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1667 alias_print_queue);
1668 }
1669
1670 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1671 g_free(ml);
1672 }
1673 }
1674
1675 void mtree_info(fprintf_function mon_printf, void *f)
1676 {
1677 MemoryRegionListHead ml_head;
1678 MemoryRegionList *ml, *ml2;
1679 AddressSpace *as;
1680
1681 QTAILQ_INIT(&ml_head);
1682
1683 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1684 if (!as->name) {
1685 continue;
1686 }
1687 mon_printf(f, "%s\n", as->name);
1688 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1689 }
1690
1691 mon_printf(f, "aliases\n");
1692 /* print aliased regions */
1693 QTAILQ_FOREACH(ml, &ml_head, queue) {
1694 if (!ml->printed) {
1695 mon_printf(f, "%s\n", ml->mr->name);
1696 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1697 }
1698 }
1699
1700 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1701 g_free(ml);
1702 }
1703 }
Qemu copy for testing