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memory: Use transaction_begin/commit also for single-step operations
[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #define WANT_EXEC_OBSOLETE
24 #include "exec-obsolete.h"
25
26 unsigned memory_region_transaction_depth = 0;
27 static bool memory_region_update_pending = false;
28 static bool global_dirty_log = false;
29
30 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
31 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
32
33 typedef struct AddrRange AddrRange;
34
35 /*
36 * Note using signed integers limits us to physical addresses at most
37 * 63 bits wide. They are needed for negative offsetting in aliases
38 * (large MemoryRegion::alias_offset).
39 */
40 struct AddrRange {
41 Int128 start;
42 Int128 size;
43 };
44
45 static AddrRange addrrange_make(Int128 start, Int128 size)
46 {
47 return (AddrRange) { start, size };
48 }
49
50 static bool addrrange_equal(AddrRange r1, AddrRange r2)
51 {
52 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
53 }
54
55 static Int128 addrrange_end(AddrRange r)
56 {
57 return int128_add(r.start, r.size);
58 }
59
60 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
61 {
62 int128_addto(&range.start, delta);
63 return range;
64 }
65
66 static bool addrrange_contains(AddrRange range, Int128 addr)
67 {
68 return int128_ge(addr, range.start)
69 && int128_lt(addr, addrrange_end(range));
70 }
71
72 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
73 {
74 return addrrange_contains(r1, r2.start)
75 || addrrange_contains(r2, r1.start);
76 }
77
78 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
79 {
80 Int128 start = int128_max(r1.start, r2.start);
81 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
82 return addrrange_make(start, int128_sub(end, start));
83 }
84
85 enum ListenerDirection { Forward, Reverse };
86
87 static bool memory_listener_match(MemoryListener *listener,
88 MemoryRegionSection *section)
89 {
90 return !listener->address_space_filter
91 || listener->address_space_filter == section->address_space;
92 }
93
94 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
95 do { \
96 MemoryListener *_listener; \
97 \
98 switch (_direction) { \
99 case Forward: \
100 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
101 _listener->_callback(_listener, ##_args); \
102 } \
103 break; \
104 case Reverse: \
105 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
106 memory_listeners, link) { \
107 _listener->_callback(_listener, ##_args); \
108 } \
109 break; \
110 default: \
111 abort(); \
112 } \
113 } while (0)
114
115 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
116 do { \
117 MemoryListener *_listener; \
118 \
119 switch (_direction) { \
120 case Forward: \
121 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
122 if (memory_listener_match(_listener, _section)) { \
123 _listener->_callback(_listener, _section, ##_args); \
124 } \
125 } \
126 break; \
127 case Reverse: \
128 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
129 memory_listeners, link) { \
130 if (memory_listener_match(_listener, _section)) { \
131 _listener->_callback(_listener, _section, ##_args); \
132 } \
133 } \
134 break; \
135 default: \
136 abort(); \
137 } \
138 } while (0)
139
140 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
141 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
142 .mr = (fr)->mr, \
143 .address_space = (as)->root, \
144 .offset_within_region = (fr)->offset_in_region, \
145 .size = int128_get64((fr)->addr.size), \
146 .offset_within_address_space = int128_get64((fr)->addr.start), \
147 .readonly = (fr)->readonly, \
148 }))
149
150 struct CoalescedMemoryRange {
151 AddrRange addr;
152 QTAILQ_ENTRY(CoalescedMemoryRange) link;
153 };
154
155 struct MemoryRegionIoeventfd {
156 AddrRange addr;
157 bool match_data;
158 uint64_t data;
159 EventNotifier *e;
160 };
161
162 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
163 MemoryRegionIoeventfd b)
164 {
165 if (int128_lt(a.addr.start, b.addr.start)) {
166 return true;
167 } else if (int128_gt(a.addr.start, b.addr.start)) {
168 return false;
169 } else if (int128_lt(a.addr.size, b.addr.size)) {
170 return true;
171 } else if (int128_gt(a.addr.size, b.addr.size)) {
172 return false;
173 } else if (a.match_data < b.match_data) {
174 return true;
175 } else if (a.match_data > b.match_data) {
176 return false;
177 } else if (a.match_data) {
178 if (a.data < b.data) {
179 return true;
180 } else if (a.data > b.data) {
181 return false;
182 }
183 }
184 if (a.e < b.e) {
185 return true;
186 } else if (a.e > b.e) {
187 return false;
188 }
189 return false;
190 }
191
192 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
193 MemoryRegionIoeventfd b)
194 {
195 return !memory_region_ioeventfd_before(a, b)
196 && !memory_region_ioeventfd_before(b, a);
197 }
198
199 typedef struct FlatRange FlatRange;
200 typedef struct FlatView FlatView;
201
202 /* Range of memory in the global map. Addresses are absolute. */
203 struct FlatRange {
204 MemoryRegion *mr;
205 target_phys_addr_t offset_in_region;
206 AddrRange addr;
207 uint8_t dirty_log_mask;
208 bool readable;
209 bool readonly;
210 };
211
212 /* Flattened global view of current active memory hierarchy. Kept in sorted
213 * order.
214 */
215 struct FlatView {
216 FlatRange *ranges;
217 unsigned nr;
218 unsigned nr_allocated;
219 };
220
221 typedef struct AddressSpace AddressSpace;
222 typedef struct AddressSpaceOps AddressSpaceOps;
223
224 /* A system address space - I/O, memory, etc. */
225 struct AddressSpace {
226 MemoryRegion *root;
227 FlatView current_map;
228 int ioeventfd_nb;
229 MemoryRegionIoeventfd *ioeventfds;
230 };
231
232 #define FOR_EACH_FLAT_RANGE(var, view) \
233 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
234
235 static bool flatrange_equal(FlatRange *a, FlatRange *b)
236 {
237 return a->mr == b->mr
238 && addrrange_equal(a->addr, b->addr)
239 && a->offset_in_region == b->offset_in_region
240 && a->readable == b->readable
241 && a->readonly == b->readonly;
242 }
243
244 static void flatview_init(FlatView *view)
245 {
246 view->ranges = NULL;
247 view->nr = 0;
248 view->nr_allocated = 0;
249 }
250
251 /* Insert a range into a given position. Caller is responsible for maintaining
252 * sorting order.
253 */
254 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
255 {
256 if (view->nr == view->nr_allocated) {
257 view->nr_allocated = MAX(2 * view->nr, 10);
258 view->ranges = g_realloc(view->ranges,
259 view->nr_allocated * sizeof(*view->ranges));
260 }
261 memmove(view->ranges + pos + 1, view->ranges + pos,
262 (view->nr - pos) * sizeof(FlatRange));
263 view->ranges[pos] = *range;
264 ++view->nr;
265 }
266
267 static void flatview_destroy(FlatView *view)
268 {
269 g_free(view->ranges);
270 }
271
272 static bool can_merge(FlatRange *r1, FlatRange *r2)
273 {
274 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
275 && r1->mr == r2->mr
276 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
277 r1->addr.size),
278 int128_make64(r2->offset_in_region))
279 && r1->dirty_log_mask == r2->dirty_log_mask
280 && r1->readable == r2->readable
281 && r1->readonly == r2->readonly;
282 }
283
284 /* Attempt to simplify a view by merging ajacent ranges */
285 static void flatview_simplify(FlatView *view)
286 {
287 unsigned i, j;
288
289 i = 0;
290 while (i < view->nr) {
291 j = i + 1;
292 while (j < view->nr
293 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
294 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
295 ++j;
296 }
297 ++i;
298 memmove(&view->ranges[i], &view->ranges[j],
299 (view->nr - j) * sizeof(view->ranges[j]));
300 view->nr -= j - i;
301 }
302 }
303
304 static void memory_region_read_accessor(void *opaque,
305 target_phys_addr_t addr,
306 uint64_t *value,
307 unsigned size,
308 unsigned shift,
309 uint64_t mask)
310 {
311 MemoryRegion *mr = opaque;
312 uint64_t tmp;
313
314 if (mr->flush_coalesced_mmio) {
315 qemu_flush_coalesced_mmio_buffer();
316 }
317 tmp = mr->ops->read(mr->opaque, addr, size);
318 *value |= (tmp & mask) << shift;
319 }
320
321 static void memory_region_write_accessor(void *opaque,
322 target_phys_addr_t addr,
323 uint64_t *value,
324 unsigned size,
325 unsigned shift,
326 uint64_t mask)
327 {
328 MemoryRegion *mr = opaque;
329 uint64_t tmp;
330
331 if (mr->flush_coalesced_mmio) {
332 qemu_flush_coalesced_mmio_buffer();
333 }
334 tmp = (*value >> shift) & mask;
335 mr->ops->write(mr->opaque, addr, tmp, size);
336 }
337
338 static void access_with_adjusted_size(target_phys_addr_t addr,
339 uint64_t *value,
340 unsigned size,
341 unsigned access_size_min,
342 unsigned access_size_max,
343 void (*access)(void *opaque,
344 target_phys_addr_t addr,
345 uint64_t *value,
346 unsigned size,
347 unsigned shift,
348 uint64_t mask),
349 void *opaque)
350 {
351 uint64_t access_mask;
352 unsigned access_size;
353 unsigned i;
354
355 if (!access_size_min) {
356 access_size_min = 1;
357 }
358 if (!access_size_max) {
359 access_size_max = 4;
360 }
361 access_size = MAX(MIN(size, access_size_max), access_size_min);
362 access_mask = -1ULL >> (64 - access_size * 8);
363 for (i = 0; i < size; i += access_size) {
364 /* FIXME: big-endian support */
365 access(opaque, addr + i, value, access_size, i * 8, access_mask);
366 }
367 }
368
369 static AddressSpace address_space_memory;
370
371 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
372 unsigned width, bool write)
373 {
374 const MemoryRegionPortio *mrp;
375
376 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
377 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
378 && width == mrp->size
379 && (write ? (bool)mrp->write : (bool)mrp->read)) {
380 return mrp;
381 }
382 }
383 return NULL;
384 }
385
386 static void memory_region_iorange_read(IORange *iorange,
387 uint64_t offset,
388 unsigned width,
389 uint64_t *data)
390 {
391 MemoryRegionIORange *mrio
392 = container_of(iorange, MemoryRegionIORange, iorange);
393 MemoryRegion *mr = mrio->mr;
394
395 offset += mrio->offset;
396 if (mr->ops->old_portio) {
397 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
398 width, false);
399
400 *data = ((uint64_t)1 << (width * 8)) - 1;
401 if (mrp) {
402 *data = mrp->read(mr->opaque, offset);
403 } else if (width == 2) {
404 mrp = find_portio(mr, offset - mrio->offset, 1, false);
405 assert(mrp);
406 *data = mrp->read(mr->opaque, offset) |
407 (mrp->read(mr->opaque, offset + 1) << 8);
408 }
409 return;
410 }
411 *data = 0;
412 access_with_adjusted_size(offset, data, width,
413 mr->ops->impl.min_access_size,
414 mr->ops->impl.max_access_size,
415 memory_region_read_accessor, mr);
416 }
417
418 static void memory_region_iorange_write(IORange *iorange,
419 uint64_t offset,
420 unsigned width,
421 uint64_t data)
422 {
423 MemoryRegionIORange *mrio
424 = container_of(iorange, MemoryRegionIORange, iorange);
425 MemoryRegion *mr = mrio->mr;
426
427 offset += mrio->offset;
428 if (mr->ops->old_portio) {
429 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
430 width, true);
431
432 if (mrp) {
433 mrp->write(mr->opaque, offset, data);
434 } else if (width == 2) {
435 mrp = find_portio(mr, offset - mrio->offset, 1, true);
436 assert(mrp);
437 mrp->write(mr->opaque, offset, data & 0xff);
438 mrp->write(mr->opaque, offset + 1, data >> 8);
439 }
440 return;
441 }
442 access_with_adjusted_size(offset, &data, width,
443 mr->ops->impl.min_access_size,
444 mr->ops->impl.max_access_size,
445 memory_region_write_accessor, mr);
446 }
447
448 static void memory_region_iorange_destructor(IORange *iorange)
449 {
450 g_free(container_of(iorange, MemoryRegionIORange, iorange));
451 }
452
453 const IORangeOps memory_region_iorange_ops = {
454 .read = memory_region_iorange_read,
455 .write = memory_region_iorange_write,
456 .destructor = memory_region_iorange_destructor,
457 };
458
459 static AddressSpace address_space_io;
460
461 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
462 {
463 while (mr->parent) {
464 mr = mr->parent;
465 }
466 if (mr == address_space_memory.root) {
467 return &address_space_memory;
468 }
469 if (mr == address_space_io.root) {
470 return &address_space_io;
471 }
472 abort();
473 }
474
475 /* Render a memory region into the global view. Ranges in @view obscure
476 * ranges in @mr.
477 */
478 static void render_memory_region(FlatView *view,
479 MemoryRegion *mr,
480 Int128 base,
481 AddrRange clip,
482 bool readonly)
483 {
484 MemoryRegion *subregion;
485 unsigned i;
486 target_phys_addr_t offset_in_region;
487 Int128 remain;
488 Int128 now;
489 FlatRange fr;
490 AddrRange tmp;
491
492 if (!mr->enabled) {
493 return;
494 }
495
496 int128_addto(&base, int128_make64(mr->addr));
497 readonly |= mr->readonly;
498
499 tmp = addrrange_make(base, mr->size);
500
501 if (!addrrange_intersects(tmp, clip)) {
502 return;
503 }
504
505 clip = addrrange_intersection(tmp, clip);
506
507 if (mr->alias) {
508 int128_subfrom(&base, int128_make64(mr->alias->addr));
509 int128_subfrom(&base, int128_make64(mr->alias_offset));
510 render_memory_region(view, mr->alias, base, clip, readonly);
511 return;
512 }
513
514 /* Render subregions in priority order. */
515 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
516 render_memory_region(view, subregion, base, clip, readonly);
517 }
518
519 if (!mr->terminates) {
520 return;
521 }
522
523 offset_in_region = int128_get64(int128_sub(clip.start, base));
524 base = clip.start;
525 remain = clip.size;
526
527 /* Render the region itself into any gaps left by the current view. */
528 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
529 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
530 continue;
531 }
532 if (int128_lt(base, view->ranges[i].addr.start)) {
533 now = int128_min(remain,
534 int128_sub(view->ranges[i].addr.start, base));
535 fr.mr = mr;
536 fr.offset_in_region = offset_in_region;
537 fr.addr = addrrange_make(base, now);
538 fr.dirty_log_mask = mr->dirty_log_mask;
539 fr.readable = mr->readable;
540 fr.readonly = readonly;
541 flatview_insert(view, i, &fr);
542 ++i;
543 int128_addto(&base, now);
544 offset_in_region += int128_get64(now);
545 int128_subfrom(&remain, now);
546 }
547 if (int128_eq(base, view->ranges[i].addr.start)) {
548 now = int128_min(remain, view->ranges[i].addr.size);
549 int128_addto(&base, now);
550 offset_in_region += int128_get64(now);
551 int128_subfrom(&remain, now);
552 }
553 }
554 if (int128_nz(remain)) {
555 fr.mr = mr;
556 fr.offset_in_region = offset_in_region;
557 fr.addr = addrrange_make(base, remain);
558 fr.dirty_log_mask = mr->dirty_log_mask;
559 fr.readable = mr->readable;
560 fr.readonly = readonly;
561 flatview_insert(view, i, &fr);
562 }
563 }
564
565 /* Render a memory topology into a list of disjoint absolute ranges. */
566 static FlatView generate_memory_topology(MemoryRegion *mr)
567 {
568 FlatView view;
569
570 flatview_init(&view);
571
572 render_memory_region(&view, mr, int128_zero(),
573 addrrange_make(int128_zero(), int128_2_64()), false);
574 flatview_simplify(&view);
575
576 return view;
577 }
578
579 static void address_space_add_del_ioeventfds(AddressSpace *as,
580 MemoryRegionIoeventfd *fds_new,
581 unsigned fds_new_nb,
582 MemoryRegionIoeventfd *fds_old,
583 unsigned fds_old_nb)
584 {
585 unsigned iold, inew;
586 MemoryRegionIoeventfd *fd;
587 MemoryRegionSection section;
588
589 /* Generate a symmetric difference of the old and new fd sets, adding
590 * and deleting as necessary.
591 */
592
593 iold = inew = 0;
594 while (iold < fds_old_nb || inew < fds_new_nb) {
595 if (iold < fds_old_nb
596 && (inew == fds_new_nb
597 || memory_region_ioeventfd_before(fds_old[iold],
598 fds_new[inew]))) {
599 fd = &fds_old[iold];
600 section = (MemoryRegionSection) {
601 .address_space = as->root,
602 .offset_within_address_space = int128_get64(fd->addr.start),
603 .size = int128_get64(fd->addr.size),
604 };
605 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
606 fd->match_data, fd->data, fd->e);
607 ++iold;
608 } else if (inew < fds_new_nb
609 && (iold == fds_old_nb
610 || memory_region_ioeventfd_before(fds_new[inew],
611 fds_old[iold]))) {
612 fd = &fds_new[inew];
613 section = (MemoryRegionSection) {
614 .address_space = as->root,
615 .offset_within_address_space = int128_get64(fd->addr.start),
616 .size = int128_get64(fd->addr.size),
617 };
618 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
619 fd->match_data, fd->data, fd->e);
620 ++inew;
621 } else {
622 ++iold;
623 ++inew;
624 }
625 }
626 }
627
628 static void address_space_update_ioeventfds(AddressSpace *as)
629 {
630 FlatRange *fr;
631 unsigned ioeventfd_nb = 0;
632 MemoryRegionIoeventfd *ioeventfds = NULL;
633 AddrRange tmp;
634 unsigned i;
635
636 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
637 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
638 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
639 int128_sub(fr->addr.start,
640 int128_make64(fr->offset_in_region)));
641 if (addrrange_intersects(fr->addr, tmp)) {
642 ++ioeventfd_nb;
643 ioeventfds = g_realloc(ioeventfds,
644 ioeventfd_nb * sizeof(*ioeventfds));
645 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
646 ioeventfds[ioeventfd_nb-1].addr = tmp;
647 }
648 }
649 }
650
651 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
652 as->ioeventfds, as->ioeventfd_nb);
653
654 g_free(as->ioeventfds);
655 as->ioeventfds = ioeventfds;
656 as->ioeventfd_nb = ioeventfd_nb;
657 }
658
659 static void address_space_update_topology_pass(AddressSpace *as,
660 FlatView old_view,
661 FlatView new_view,
662 bool adding)
663 {
664 unsigned iold, inew;
665 FlatRange *frold, *frnew;
666
667 /* Generate a symmetric difference of the old and new memory maps.
668 * Kill ranges in the old map, and instantiate ranges in the new map.
669 */
670 iold = inew = 0;
671 while (iold < old_view.nr || inew < new_view.nr) {
672 if (iold < old_view.nr) {
673 frold = &old_view.ranges[iold];
674 } else {
675 frold = NULL;
676 }
677 if (inew < new_view.nr) {
678 frnew = &new_view.ranges[inew];
679 } else {
680 frnew = NULL;
681 }
682
683 if (frold
684 && (!frnew
685 || int128_lt(frold->addr.start, frnew->addr.start)
686 || (int128_eq(frold->addr.start, frnew->addr.start)
687 && !flatrange_equal(frold, frnew)))) {
688 /* In old, but (not in new, or in new but attributes changed). */
689
690 if (!adding) {
691 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
692 }
693
694 ++iold;
695 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
696 /* In both (logging may have changed) */
697
698 if (adding) {
699 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
700 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
701 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
702 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
703 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
704 }
705 }
706
707 ++iold;
708 ++inew;
709 } else {
710 /* In new */
711
712 if (adding) {
713 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
714 }
715
716 ++inew;
717 }
718 }
719 }
720
721
722 static void address_space_update_topology(AddressSpace *as)
723 {
724 FlatView old_view = as->current_map;
725 FlatView new_view = generate_memory_topology(as->root);
726
727 address_space_update_topology_pass(as, old_view, new_view, false);
728 address_space_update_topology_pass(as, old_view, new_view, true);
729
730 as->current_map = new_view;
731 flatview_destroy(&old_view);
732 address_space_update_ioeventfds(as);
733 }
734
735 static void memory_region_update_topology(MemoryRegion *mr)
736 {
737 if (memory_region_transaction_depth) {
738 memory_region_update_pending |= !mr || mr->enabled;
739 return;
740 }
741
742 if (mr && !mr->enabled) {
743 return;
744 }
745
746 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
747
748 if (address_space_memory.root) {
749 address_space_update_topology(&address_space_memory);
750 }
751 if (address_space_io.root) {
752 address_space_update_topology(&address_space_io);
753 }
754
755 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
756
757 memory_region_update_pending = false;
758 }
759
760 void memory_region_transaction_begin(void)
761 {
762 ++memory_region_transaction_depth;
763 }
764
765 void memory_region_transaction_commit(void)
766 {
767 assert(memory_region_transaction_depth);
768 --memory_region_transaction_depth;
769 if (!memory_region_transaction_depth && memory_region_update_pending) {
770 memory_region_update_topology(NULL);
771 }
772 }
773
774 static void memory_region_destructor_none(MemoryRegion *mr)
775 {
776 }
777
778 static void memory_region_destructor_ram(MemoryRegion *mr)
779 {
780 qemu_ram_free(mr->ram_addr);
781 }
782
783 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
784 {
785 qemu_ram_free_from_ptr(mr->ram_addr);
786 }
787
788 static void memory_region_destructor_iomem(MemoryRegion *mr)
789 {
790 }
791
792 static void memory_region_destructor_rom_device(MemoryRegion *mr)
793 {
794 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
795 }
796
797 static bool memory_region_wrong_endianness(MemoryRegion *mr)
798 {
799 #ifdef TARGET_WORDS_BIGENDIAN
800 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
801 #else
802 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
803 #endif
804 }
805
806 void memory_region_init(MemoryRegion *mr,
807 const char *name,
808 uint64_t size)
809 {
810 mr->ops = NULL;
811 mr->parent = NULL;
812 mr->size = int128_make64(size);
813 if (size == UINT64_MAX) {
814 mr->size = int128_2_64();
815 }
816 mr->addr = 0;
817 mr->subpage = false;
818 mr->enabled = true;
819 mr->terminates = false;
820 mr->ram = false;
821 mr->readable = true;
822 mr->readonly = false;
823 mr->rom_device = false;
824 mr->destructor = memory_region_destructor_none;
825 mr->priority = 0;
826 mr->may_overlap = false;
827 mr->alias = NULL;
828 QTAILQ_INIT(&mr->subregions);
829 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
830 QTAILQ_INIT(&mr->coalesced);
831 mr->name = g_strdup(name);
832 mr->dirty_log_mask = 0;
833 mr->ioeventfd_nb = 0;
834 mr->ioeventfds = NULL;
835 mr->flush_coalesced_mmio = false;
836 }
837
838 static bool memory_region_access_valid(MemoryRegion *mr,
839 target_phys_addr_t addr,
840 unsigned size,
841 bool is_write)
842 {
843 if (mr->ops->valid.accepts
844 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
845 return false;
846 }
847
848 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
849 return false;
850 }
851
852 /* Treat zero as compatibility all valid */
853 if (!mr->ops->valid.max_access_size) {
854 return true;
855 }
856
857 if (size > mr->ops->valid.max_access_size
858 || size < mr->ops->valid.min_access_size) {
859 return false;
860 }
861 return true;
862 }
863
864 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
865 target_phys_addr_t addr,
866 unsigned size)
867 {
868 uint64_t data = 0;
869
870 if (!memory_region_access_valid(mr, addr, size, false)) {
871 return -1U; /* FIXME: better signalling */
872 }
873
874 if (!mr->ops->read) {
875 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
876 }
877
878 /* FIXME: support unaligned access */
879 access_with_adjusted_size(addr, &data, size,
880 mr->ops->impl.min_access_size,
881 mr->ops->impl.max_access_size,
882 memory_region_read_accessor, mr);
883
884 return data;
885 }
886
887 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
888 {
889 if (memory_region_wrong_endianness(mr)) {
890 switch (size) {
891 case 1:
892 break;
893 case 2:
894 *data = bswap16(*data);
895 break;
896 case 4:
897 *data = bswap32(*data);
898 break;
899 default:
900 abort();
901 }
902 }
903 }
904
905 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
906 target_phys_addr_t addr,
907 unsigned size)
908 {
909 uint64_t ret;
910
911 ret = memory_region_dispatch_read1(mr, addr, size);
912 adjust_endianness(mr, &ret, size);
913 return ret;
914 }
915
916 static void memory_region_dispatch_write(MemoryRegion *mr,
917 target_phys_addr_t addr,
918 uint64_t data,
919 unsigned size)
920 {
921 if (!memory_region_access_valid(mr, addr, size, true)) {
922 return; /* FIXME: better signalling */
923 }
924
925 adjust_endianness(mr, &data, size);
926
927 if (!mr->ops->write) {
928 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
929 return;
930 }
931
932 /* FIXME: support unaligned access */
933 access_with_adjusted_size(addr, &data, size,
934 mr->ops->impl.min_access_size,
935 mr->ops->impl.max_access_size,
936 memory_region_write_accessor, mr);
937 }
938
939 void memory_region_init_io(MemoryRegion *mr,
940 const MemoryRegionOps *ops,
941 void *opaque,
942 const char *name,
943 uint64_t size)
944 {
945 memory_region_init(mr, name, size);
946 mr->ops = ops;
947 mr->opaque = opaque;
948 mr->terminates = true;
949 mr->destructor = memory_region_destructor_iomem;
950 mr->ram_addr = ~(ram_addr_t)0;
951 }
952
953 void memory_region_init_ram(MemoryRegion *mr,
954 const char *name,
955 uint64_t size)
956 {
957 memory_region_init(mr, name, size);
958 mr->ram = true;
959 mr->terminates = true;
960 mr->destructor = memory_region_destructor_ram;
961 mr->ram_addr = qemu_ram_alloc(size, mr);
962 }
963
964 void memory_region_init_ram_ptr(MemoryRegion *mr,
965 const char *name,
966 uint64_t size,
967 void *ptr)
968 {
969 memory_region_init(mr, name, size);
970 mr->ram = true;
971 mr->terminates = true;
972 mr->destructor = memory_region_destructor_ram_from_ptr;
973 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
974 }
975
976 void memory_region_init_alias(MemoryRegion *mr,
977 const char *name,
978 MemoryRegion *orig,
979 target_phys_addr_t offset,
980 uint64_t size)
981 {
982 memory_region_init(mr, name, size);
983 mr->alias = orig;
984 mr->alias_offset = offset;
985 }
986
987 void memory_region_init_rom_device(MemoryRegion *mr,
988 const MemoryRegionOps *ops,
989 void *opaque,
990 const char *name,
991 uint64_t size)
992 {
993 memory_region_init(mr, name, size);
994 mr->ops = ops;
995 mr->opaque = opaque;
996 mr->terminates = true;
997 mr->rom_device = true;
998 mr->destructor = memory_region_destructor_rom_device;
999 mr->ram_addr = qemu_ram_alloc(size, mr);
1000 }
1001
1002 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
1003 unsigned size)
1004 {
1005 MemoryRegion *mr = opaque;
1006
1007 if (!mr->warning_printed) {
1008 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
1009 mr->warning_printed = true;
1010 }
1011 return -1U;
1012 }
1013
1014 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
1015 unsigned size)
1016 {
1017 MemoryRegion *mr = opaque;
1018
1019 if (!mr->warning_printed) {
1020 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1021 mr->warning_printed = true;
1022 }
1023 }
1024
1025 static const MemoryRegionOps reservation_ops = {
1026 .read = invalid_read,
1027 .write = invalid_write,
1028 .endianness = DEVICE_NATIVE_ENDIAN,
1029 };
1030
1031 void memory_region_init_reservation(MemoryRegion *mr,
1032 const char *name,
1033 uint64_t size)
1034 {
1035 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1036 }
1037
1038 void memory_region_destroy(MemoryRegion *mr)
1039 {
1040 assert(QTAILQ_EMPTY(&mr->subregions));
1041 mr->destructor(mr);
1042 memory_region_clear_coalescing(mr);
1043 g_free((char *)mr->name);
1044 g_free(mr->ioeventfds);
1045 }
1046
1047 uint64_t memory_region_size(MemoryRegion *mr)
1048 {
1049 if (int128_eq(mr->size, int128_2_64())) {
1050 return UINT64_MAX;
1051 }
1052 return int128_get64(mr->size);
1053 }
1054
1055 const char *memory_region_name(MemoryRegion *mr)
1056 {
1057 return mr->name;
1058 }
1059
1060 bool memory_region_is_ram(MemoryRegion *mr)
1061 {
1062 return mr->ram;
1063 }
1064
1065 bool memory_region_is_logging(MemoryRegion *mr)
1066 {
1067 return mr->dirty_log_mask;
1068 }
1069
1070 bool memory_region_is_rom(MemoryRegion *mr)
1071 {
1072 return mr->ram && mr->readonly;
1073 }
1074
1075 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1076 {
1077 uint8_t mask = 1 << client;
1078
1079 memory_region_transaction_begin();
1080 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1081 memory_region_transaction_commit();
1082 }
1083
1084 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1085 target_phys_addr_t size, unsigned client)
1086 {
1087 assert(mr->terminates);
1088 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1089 1 << client);
1090 }
1091
1092 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1093 target_phys_addr_t size)
1094 {
1095 assert(mr->terminates);
1096 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1097 }
1098
1099 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1100 {
1101 FlatRange *fr;
1102
1103 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1104 if (fr->mr == mr) {
1105 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory,
1106 Forward, log_sync);
1107 }
1108 }
1109 }
1110
1111 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1112 {
1113 if (mr->readonly != readonly) {
1114 memory_region_transaction_begin();
1115 mr->readonly = readonly;
1116 memory_region_transaction_commit();
1117 }
1118 }
1119
1120 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1121 {
1122 if (mr->readable != readable) {
1123 memory_region_transaction_begin();
1124 mr->readable = readable;
1125 memory_region_transaction_commit();
1126 }
1127 }
1128
1129 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1130 target_phys_addr_t size, unsigned client)
1131 {
1132 assert(mr->terminates);
1133 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1134 mr->ram_addr + addr + size,
1135 1 << client);
1136 }
1137
1138 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1139 {
1140 if (mr->alias) {
1141 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1142 }
1143
1144 assert(mr->terminates);
1145
1146 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1147 }
1148
1149 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1150 {
1151 FlatRange *fr;
1152 CoalescedMemoryRange *cmr;
1153 AddrRange tmp;
1154
1155 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1156 if (fr->mr == mr) {
1157 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1158 int128_get64(fr->addr.size));
1159 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1160 tmp = addrrange_shift(cmr->addr,
1161 int128_sub(fr->addr.start,
1162 int128_make64(fr->offset_in_region)));
1163 if (!addrrange_intersects(tmp, fr->addr)) {
1164 continue;
1165 }
1166 tmp = addrrange_intersection(tmp, fr->addr);
1167 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1168 int128_get64(tmp.size));
1169 }
1170 }
1171 }
1172 }
1173
1174 void memory_region_set_coalescing(MemoryRegion *mr)
1175 {
1176 memory_region_clear_coalescing(mr);
1177 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1178 }
1179
1180 void memory_region_add_coalescing(MemoryRegion *mr,
1181 target_phys_addr_t offset,
1182 uint64_t size)
1183 {
1184 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1185
1186 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1187 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1188 memory_region_update_coalesced_range(mr);
1189 memory_region_set_flush_coalesced(mr);
1190 }
1191
1192 void memory_region_clear_coalescing(MemoryRegion *mr)
1193 {
1194 CoalescedMemoryRange *cmr;
1195
1196 qemu_flush_coalesced_mmio_buffer();
1197 mr->flush_coalesced_mmio = false;
1198
1199 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1200 cmr = QTAILQ_FIRST(&mr->coalesced);
1201 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1202 g_free(cmr);
1203 }
1204 memory_region_update_coalesced_range(mr);
1205 }
1206
1207 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1208 {
1209 mr->flush_coalesced_mmio = true;
1210 }
1211
1212 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1213 {
1214 qemu_flush_coalesced_mmio_buffer();
1215 if (QTAILQ_EMPTY(&mr->coalesced)) {
1216 mr->flush_coalesced_mmio = false;
1217 }
1218 }
1219
1220 void memory_region_add_eventfd(MemoryRegion *mr,
1221 target_phys_addr_t addr,
1222 unsigned size,
1223 bool match_data,
1224 uint64_t data,
1225 EventNotifier *e)
1226 {
1227 MemoryRegionIoeventfd mrfd = {
1228 .addr.start = int128_make64(addr),
1229 .addr.size = int128_make64(size),
1230 .match_data = match_data,
1231 .data = data,
1232 .e = e,
1233 };
1234 unsigned i;
1235
1236 memory_region_transaction_begin();
1237 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1238 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1239 break;
1240 }
1241 }
1242 ++mr->ioeventfd_nb;
1243 mr->ioeventfds = g_realloc(mr->ioeventfds,
1244 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1245 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1246 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1247 mr->ioeventfds[i] = mrfd;
1248 memory_region_transaction_commit();
1249 }
1250
1251 void memory_region_del_eventfd(MemoryRegion *mr,
1252 target_phys_addr_t addr,
1253 unsigned size,
1254 bool match_data,
1255 uint64_t data,
1256 EventNotifier *e)
1257 {
1258 MemoryRegionIoeventfd mrfd = {
1259 .addr.start = int128_make64(addr),
1260 .addr.size = int128_make64(size),
1261 .match_data = match_data,
1262 .data = data,
1263 .e = e,
1264 };
1265 unsigned i;
1266
1267 memory_region_transaction_begin();
1268 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1269 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1270 break;
1271 }
1272 }
1273 assert(i != mr->ioeventfd_nb);
1274 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1275 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1276 --mr->ioeventfd_nb;
1277 mr->ioeventfds = g_realloc(mr->ioeventfds,
1278 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1279 memory_region_transaction_commit();
1280 }
1281
1282 static void memory_region_add_subregion_common(MemoryRegion *mr,
1283 target_phys_addr_t offset,
1284 MemoryRegion *subregion)
1285 {
1286 MemoryRegion *other;
1287
1288 memory_region_transaction_begin();
1289
1290 assert(!subregion->parent);
1291 subregion->parent = mr;
1292 subregion->addr = offset;
1293 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1294 if (subregion->may_overlap || other->may_overlap) {
1295 continue;
1296 }
1297 if (int128_gt(int128_make64(offset),
1298 int128_add(int128_make64(other->addr), other->size))
1299 || int128_le(int128_add(int128_make64(offset), subregion->size),
1300 int128_make64(other->addr))) {
1301 continue;
1302 }
1303 #if 0
1304 printf("warning: subregion collision %llx/%llx (%s) "
1305 "vs %llx/%llx (%s)\n",
1306 (unsigned long long)offset,
1307 (unsigned long long)int128_get64(subregion->size),
1308 subregion->name,
1309 (unsigned long long)other->addr,
1310 (unsigned long long)int128_get64(other->size),
1311 other->name);
1312 #endif
1313 }
1314 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1315 if (subregion->priority >= other->priority) {
1316 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1317 goto done;
1318 }
1319 }
1320 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1321 done:
1322 memory_region_transaction_commit();
1323 }
1324
1325
1326 void memory_region_add_subregion(MemoryRegion *mr,
1327 target_phys_addr_t offset,
1328 MemoryRegion *subregion)
1329 {
1330 subregion->may_overlap = false;
1331 subregion->priority = 0;
1332 memory_region_add_subregion_common(mr, offset, subregion);
1333 }
1334
1335 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1336 target_phys_addr_t offset,
1337 MemoryRegion *subregion,
1338 unsigned priority)
1339 {
1340 subregion->may_overlap = true;
1341 subregion->priority = priority;
1342 memory_region_add_subregion_common(mr, offset, subregion);
1343 }
1344
1345 void memory_region_del_subregion(MemoryRegion *mr,
1346 MemoryRegion *subregion)
1347 {
1348 memory_region_transaction_begin();
1349 assert(subregion->parent == mr);
1350 subregion->parent = NULL;
1351 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1352 memory_region_transaction_commit();
1353 }
1354
1355 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1356 {
1357 if (enabled == mr->enabled) {
1358 return;
1359 }
1360 memory_region_transaction_begin();
1361 mr->enabled = enabled;
1362 memory_region_transaction_commit();
1363 }
1364
1365 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1366 {
1367 MemoryRegion *parent = mr->parent;
1368 unsigned priority = mr->priority;
1369 bool may_overlap = mr->may_overlap;
1370
1371 if (addr == mr->addr || !parent) {
1372 mr->addr = addr;
1373 return;
1374 }
1375
1376 memory_region_transaction_begin();
1377 memory_region_del_subregion(parent, mr);
1378 if (may_overlap) {
1379 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1380 } else {
1381 memory_region_add_subregion(parent, addr, mr);
1382 }
1383 memory_region_transaction_commit();
1384 }
1385
1386 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1387 {
1388 assert(mr->alias);
1389
1390 if (offset == mr->alias_offset) {
1391 return;
1392 }
1393
1394 memory_region_transaction_begin();
1395 mr->alias_offset = offset;
1396 memory_region_transaction_commit();
1397 }
1398
1399 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1400 {
1401 return mr->ram_addr;
1402 }
1403
1404 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1405 {
1406 const AddrRange *addr = addr_;
1407 const FlatRange *fr = fr_;
1408
1409 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1410 return -1;
1411 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1412 return 1;
1413 }
1414 return 0;
1415 }
1416
1417 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1418 {
1419 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1420 sizeof(FlatRange), cmp_flatrange_addr);
1421 }
1422
1423 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1424 target_phys_addr_t addr, uint64_t size)
1425 {
1426 AddressSpace *as = memory_region_to_address_space(address_space);
1427 AddrRange range = addrrange_make(int128_make64(addr),
1428 int128_make64(size));
1429 FlatRange *fr = address_space_lookup(as, range);
1430 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1431
1432 if (!fr) {
1433 return ret;
1434 }
1435
1436 while (fr > as->current_map.ranges
1437 && addrrange_intersects(fr[-1].addr, range)) {
1438 --fr;
1439 }
1440
1441 ret.mr = fr->mr;
1442 range = addrrange_intersection(range, fr->addr);
1443 ret.offset_within_region = fr->offset_in_region;
1444 ret.offset_within_region += int128_get64(int128_sub(range.start,
1445 fr->addr.start));
1446 ret.size = int128_get64(range.size);
1447 ret.offset_within_address_space = int128_get64(range.start);
1448 ret.readonly = fr->readonly;
1449 return ret;
1450 }
1451
1452 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1453 {
1454 AddressSpace *as = memory_region_to_address_space(address_space);
1455 FlatRange *fr;
1456
1457 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1458 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1459 }
1460 }
1461
1462 void memory_global_dirty_log_start(void)
1463 {
1464 global_dirty_log = true;
1465 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1466 }
1467
1468 void memory_global_dirty_log_stop(void)
1469 {
1470 global_dirty_log = false;
1471 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1472 }
1473
1474 static void listener_add_address_space(MemoryListener *listener,
1475 AddressSpace *as)
1476 {
1477 FlatRange *fr;
1478
1479 if (listener->address_space_filter
1480 && listener->address_space_filter != as->root) {
1481 return;
1482 }
1483
1484 if (global_dirty_log) {
1485 listener->log_global_start(listener);
1486 }
1487 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1488 MemoryRegionSection section = {
1489 .mr = fr->mr,
1490 .address_space = as->root,
1491 .offset_within_region = fr->offset_in_region,
1492 .size = int128_get64(fr->addr.size),
1493 .offset_within_address_space = int128_get64(fr->addr.start),
1494 .readonly = fr->readonly,
1495 };
1496 listener->region_add(listener, &section);
1497 }
1498 }
1499
1500 void memory_listener_register(MemoryListener *listener, MemoryRegion *filter)
1501 {
1502 MemoryListener *other = NULL;
1503
1504 listener->address_space_filter = filter;
1505 if (QTAILQ_EMPTY(&memory_listeners)
1506 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1507 memory_listeners)->priority) {
1508 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1509 } else {
1510 QTAILQ_FOREACH(other, &memory_listeners, link) {
1511 if (listener->priority < other->priority) {
1512 break;
1513 }
1514 }
1515 QTAILQ_INSERT_BEFORE(other, listener, link);
1516 }
1517 listener_add_address_space(listener, &address_space_memory);
1518 listener_add_address_space(listener, &address_space_io);
1519 }
1520
1521 void memory_listener_unregister(MemoryListener *listener)
1522 {
1523 QTAILQ_REMOVE(&memory_listeners, listener, link);
1524 }
1525
1526 void set_system_memory_map(MemoryRegion *mr)
1527 {
1528 memory_region_transaction_begin();
1529 address_space_memory.root = mr;
1530 memory_region_transaction_commit();
1531 }
1532
1533 void set_system_io_map(MemoryRegion *mr)
1534 {
1535 memory_region_transaction_begin();
1536 address_space_io.root = mr;
1537 memory_region_transaction_commit();
1538 }
1539
1540 uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size)
1541 {
1542 return memory_region_dispatch_read(mr, addr, size);
1543 }
1544
1545 void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr,
1546 uint64_t val, unsigned size)
1547 {
1548 memory_region_dispatch_write(mr, addr, val, size);
1549 }
1550
1551 typedef struct MemoryRegionList MemoryRegionList;
1552
1553 struct MemoryRegionList {
1554 const MemoryRegion *mr;
1555 bool printed;
1556 QTAILQ_ENTRY(MemoryRegionList) queue;
1557 };
1558
1559 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1560
1561 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1562 const MemoryRegion *mr, unsigned int level,
1563 target_phys_addr_t base,
1564 MemoryRegionListHead *alias_print_queue)
1565 {
1566 MemoryRegionList *new_ml, *ml, *next_ml;
1567 MemoryRegionListHead submr_print_queue;
1568 const MemoryRegion *submr;
1569 unsigned int i;
1570
1571 if (!mr) {
1572 return;
1573 }
1574
1575 for (i = 0; i < level; i++) {
1576 mon_printf(f, " ");
1577 }
1578
1579 if (mr->alias) {
1580 MemoryRegionList *ml;
1581 bool found = false;
1582
1583 /* check if the alias is already in the queue */
1584 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1585 if (ml->mr == mr->alias && !ml->printed) {
1586 found = true;
1587 }
1588 }
1589
1590 if (!found) {
1591 ml = g_new(MemoryRegionList, 1);
1592 ml->mr = mr->alias;
1593 ml->printed = false;
1594 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1595 }
1596 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1597 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1598 "-" TARGET_FMT_plx "\n",
1599 base + mr->addr,
1600 base + mr->addr
1601 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1602 mr->priority,
1603 mr->readable ? 'R' : '-',
1604 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1605 : '-',
1606 mr->name,
1607 mr->alias->name,
1608 mr->alias_offset,
1609 mr->alias_offset
1610 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1611 } else {
1612 mon_printf(f,
1613 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1614 base + mr->addr,
1615 base + mr->addr
1616 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1617 mr->priority,
1618 mr->readable ? 'R' : '-',
1619 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1620 : '-',
1621 mr->name);
1622 }
1623
1624 QTAILQ_INIT(&submr_print_queue);
1625
1626 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1627 new_ml = g_new(MemoryRegionList, 1);
1628 new_ml->mr = submr;
1629 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1630 if (new_ml->mr->addr < ml->mr->addr ||
1631 (new_ml->mr->addr == ml->mr->addr &&
1632 new_ml->mr->priority > ml->mr->priority)) {
1633 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1634 new_ml = NULL;
1635 break;
1636 }
1637 }
1638 if (new_ml) {
1639 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1640 }
1641 }
1642
1643 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1644 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1645 alias_print_queue);
1646 }
1647
1648 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1649 g_free(ml);
1650 }
1651 }
1652
1653 void mtree_info(fprintf_function mon_printf, void *f)
1654 {
1655 MemoryRegionListHead ml_head;
1656 MemoryRegionList *ml, *ml2;
1657
1658 QTAILQ_INIT(&ml_head);
1659
1660 mon_printf(f, "memory\n");
1661 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1662
1663 if (address_space_io.root &&
1664 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1665 mon_printf(f, "I/O\n");
1666 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1667 }
1668
1669 mon_printf(f, "aliases\n");
1670 /* print aliased regions */
1671 QTAILQ_FOREACH(ml, &ml_head, queue) {
1672 if (!ml->printed) {
1673 mon_printf(f, "%s\n", ml->mr->name);
1674 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1675 }
1676 }
1677
1678 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1679 g_free(ml);
1680 }
1681 }
Qemu copy for testing