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memory: add API for observing updates to the physical memory map
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1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 */
13
14 #include "memory.h"
15 #include "exec-memory.h"
16 #include "ioport.h"
17 #include "bitops.h"
18 #include "kvm.h"
19 #include <assert.h>
20
21 #define WANT_EXEC_OBSOLETE
22 #include "exec-obsolete.h"
23
24 unsigned memory_region_transaction_depth = 0;
25 static bool memory_region_update_pending = false;
26 static bool global_dirty_log = false;
27
28 static QLIST_HEAD(, MemoryListener) memory_listeners
29 = QLIST_HEAD_INITIALIZER(memory_listeners);
30
31 typedef struct AddrRange AddrRange;
32
33 /*
34 * Note using signed integers limits us to physical addresses at most
35 * 63 bits wide. They are needed for negative offsetting in aliases
36 * (large MemoryRegion::alias_offset).
37 */
38 struct AddrRange {
39 Int128 start;
40 Int128 size;
41 };
42
43 static AddrRange addrrange_make(Int128 start, Int128 size)
44 {
45 return (AddrRange) { start, size };
46 }
47
48 static bool addrrange_equal(AddrRange r1, AddrRange r2)
49 {
50 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
51 }
52
53 static Int128 addrrange_end(AddrRange r)
54 {
55 return int128_add(r.start, r.size);
56 }
57
58 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
59 {
60 int128_addto(&range.start, delta);
61 return range;
62 }
63
64 static bool addrrange_contains(AddrRange range, Int128 addr)
65 {
66 return int128_ge(addr, range.start)
67 && int128_lt(addr, addrrange_end(range));
68 }
69
70 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
71 {
72 return addrrange_contains(r1, r2.start)
73 || addrrange_contains(r2, r1.start);
74 }
75
76 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
77 {
78 Int128 start = int128_max(r1.start, r2.start);
79 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
80 return addrrange_make(start, int128_sub(end, start));
81 }
82
83 struct CoalescedMemoryRange {
84 AddrRange addr;
85 QTAILQ_ENTRY(CoalescedMemoryRange) link;
86 };
87
88 struct MemoryRegionIoeventfd {
89 AddrRange addr;
90 bool match_data;
91 uint64_t data;
92 int fd;
93 };
94
95 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
96 MemoryRegionIoeventfd b)
97 {
98 if (int128_lt(a.addr.start, b.addr.start)) {
99 return true;
100 } else if (int128_gt(a.addr.start, b.addr.start)) {
101 return false;
102 } else if (int128_lt(a.addr.size, b.addr.size)) {
103 return true;
104 } else if (int128_gt(a.addr.size, b.addr.size)) {
105 return false;
106 } else if (a.match_data < b.match_data) {
107 return true;
108 } else if (a.match_data > b.match_data) {
109 return false;
110 } else if (a.match_data) {
111 if (a.data < b.data) {
112 return true;
113 } else if (a.data > b.data) {
114 return false;
115 }
116 }
117 if (a.fd < b.fd) {
118 return true;
119 } else if (a.fd > b.fd) {
120 return false;
121 }
122 return false;
123 }
124
125 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
126 MemoryRegionIoeventfd b)
127 {
128 return !memory_region_ioeventfd_before(a, b)
129 && !memory_region_ioeventfd_before(b, a);
130 }
131
132 typedef struct FlatRange FlatRange;
133 typedef struct FlatView FlatView;
134
135 /* Range of memory in the global map. Addresses are absolute. */
136 struct FlatRange {
137 MemoryRegion *mr;
138 target_phys_addr_t offset_in_region;
139 AddrRange addr;
140 uint8_t dirty_log_mask;
141 bool readable;
142 bool readonly;
143 };
144
145 /* Flattened global view of current active memory hierarchy. Kept in sorted
146 * order.
147 */
148 struct FlatView {
149 FlatRange *ranges;
150 unsigned nr;
151 unsigned nr_allocated;
152 };
153
154 typedef struct AddressSpace AddressSpace;
155 typedef struct AddressSpaceOps AddressSpaceOps;
156
157 /* A system address space - I/O, memory, etc. */
158 struct AddressSpace {
159 const AddressSpaceOps *ops;
160 MemoryRegion *root;
161 FlatView current_map;
162 int ioeventfd_nb;
163 MemoryRegionIoeventfd *ioeventfds;
164 };
165
166 struct AddressSpaceOps {
167 void (*range_add)(AddressSpace *as, FlatRange *fr);
168 void (*range_del)(AddressSpace *as, FlatRange *fr);
169 void (*log_start)(AddressSpace *as, FlatRange *fr);
170 void (*log_stop)(AddressSpace *as, FlatRange *fr);
171 void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
172 void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
173 };
174
175 #define FOR_EACH_FLAT_RANGE(var, view) \
176 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
177
178 static bool flatrange_equal(FlatRange *a, FlatRange *b)
179 {
180 return a->mr == b->mr
181 && addrrange_equal(a->addr, b->addr)
182 && a->offset_in_region == b->offset_in_region
183 && a->readable == b->readable
184 && a->readonly == b->readonly;
185 }
186
187 static void flatview_init(FlatView *view)
188 {
189 view->ranges = NULL;
190 view->nr = 0;
191 view->nr_allocated = 0;
192 }
193
194 /* Insert a range into a given position. Caller is responsible for maintaining
195 * sorting order.
196 */
197 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
198 {
199 if (view->nr == view->nr_allocated) {
200 view->nr_allocated = MAX(2 * view->nr, 10);
201 view->ranges = g_realloc(view->ranges,
202 view->nr_allocated * sizeof(*view->ranges));
203 }
204 memmove(view->ranges + pos + 1, view->ranges + pos,
205 (view->nr - pos) * sizeof(FlatRange));
206 view->ranges[pos] = *range;
207 ++view->nr;
208 }
209
210 static void flatview_destroy(FlatView *view)
211 {
212 g_free(view->ranges);
213 }
214
215 static bool can_merge(FlatRange *r1, FlatRange *r2)
216 {
217 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
218 && r1->mr == r2->mr
219 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
220 r1->addr.size),
221 int128_make64(r2->offset_in_region))
222 && r1->dirty_log_mask == r2->dirty_log_mask
223 && r1->readable == r2->readable
224 && r1->readonly == r2->readonly;
225 }
226
227 /* Attempt to simplify a view by merging ajacent ranges */
228 static void flatview_simplify(FlatView *view)
229 {
230 unsigned i, j;
231
232 i = 0;
233 while (i < view->nr) {
234 j = i + 1;
235 while (j < view->nr
236 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
237 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
238 ++j;
239 }
240 ++i;
241 memmove(&view->ranges[i], &view->ranges[j],
242 (view->nr - j) * sizeof(view->ranges[j]));
243 view->nr -= j - i;
244 }
245 }
246
247 static void memory_region_read_accessor(void *opaque,
248 target_phys_addr_t addr,
249 uint64_t *value,
250 unsigned size,
251 unsigned shift,
252 uint64_t mask)
253 {
254 MemoryRegion *mr = opaque;
255 uint64_t tmp;
256
257 tmp = mr->ops->read(mr->opaque, addr, size);
258 *value |= (tmp & mask) << shift;
259 }
260
261 static void memory_region_write_accessor(void *opaque,
262 target_phys_addr_t addr,
263 uint64_t *value,
264 unsigned size,
265 unsigned shift,
266 uint64_t mask)
267 {
268 MemoryRegion *mr = opaque;
269 uint64_t tmp;
270
271 tmp = (*value >> shift) & mask;
272 mr->ops->write(mr->opaque, addr, tmp, size);
273 }
274
275 static void access_with_adjusted_size(target_phys_addr_t addr,
276 uint64_t *value,
277 unsigned size,
278 unsigned access_size_min,
279 unsigned access_size_max,
280 void (*access)(void *opaque,
281 target_phys_addr_t addr,
282 uint64_t *value,
283 unsigned size,
284 unsigned shift,
285 uint64_t mask),
286 void *opaque)
287 {
288 uint64_t access_mask;
289 unsigned access_size;
290 unsigned i;
291
292 if (!access_size_min) {
293 access_size_min = 1;
294 }
295 if (!access_size_max) {
296 access_size_max = 4;
297 }
298 access_size = MAX(MIN(size, access_size_max), access_size_min);
299 access_mask = -1ULL >> (64 - access_size * 8);
300 for (i = 0; i < size; i += access_size) {
301 /* FIXME: big-endian support */
302 access(opaque, addr + i, value, access_size, i * 8, access_mask);
303 }
304 }
305
306 static void memory_region_prepare_ram_addr(MemoryRegion *mr);
307
308 static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
309 {
310 ram_addr_t phys_offset, region_offset;
311
312 memory_region_prepare_ram_addr(fr->mr);
313
314 phys_offset = fr->mr->ram_addr;
315 region_offset = fr->offset_in_region;
316 /* cpu_register_physical_memory_log() wants region_offset for
317 * mmio, but prefers offseting phys_offset for RAM. Humour it.
318 */
319 if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {
320 phys_offset += region_offset;
321 region_offset = 0;
322 }
323
324 if (!fr->readable) {
325 phys_offset &= ~TARGET_PAGE_MASK & ~IO_MEM_ROMD;
326 }
327
328 if (fr->readonly) {
329 phys_offset |= IO_MEM_ROM;
330 }
331
332 cpu_register_physical_memory_log(int128_get64(fr->addr.start),
333 int128_get64(fr->addr.size),
334 phys_offset,
335 region_offset,
336 fr->dirty_log_mask);
337 }
338
339 static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
340 {
341 if (fr->dirty_log_mask) {
342 Int128 end = addrrange_end(fr->addr);
343 cpu_physical_sync_dirty_bitmap(int128_get64(fr->addr.start),
344 int128_get64(end));
345 }
346 cpu_register_physical_memory(int128_get64(fr->addr.start),
347 int128_get64(fr->addr.size),
348 IO_MEM_UNASSIGNED);
349 }
350
351 static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
352 {
353 cpu_physical_log_start(int128_get64(fr->addr.start),
354 int128_get64(fr->addr.size));
355 }
356
357 static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
358 {
359 cpu_physical_log_stop(int128_get64(fr->addr.start),
360 int128_get64(fr->addr.size));
361 }
362
363 static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
364 {
365 int r;
366
367 assert(fd->match_data && int128_get64(fd->addr.size) == 4);
368
369 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
370 fd->data, true);
371 if (r < 0) {
372 abort();
373 }
374 }
375
376 static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
377 {
378 int r;
379
380 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
381 fd->data, false);
382 if (r < 0) {
383 abort();
384 }
385 }
386
387 static const AddressSpaceOps address_space_ops_memory = {
388 .range_add = as_memory_range_add,
389 .range_del = as_memory_range_del,
390 .log_start = as_memory_log_start,
391 .log_stop = as_memory_log_stop,
392 .ioeventfd_add = as_memory_ioeventfd_add,
393 .ioeventfd_del = as_memory_ioeventfd_del,
394 };
395
396 static AddressSpace address_space_memory = {
397 .ops = &address_space_ops_memory,
398 };
399
400 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
401 unsigned width, bool write)
402 {
403 const MemoryRegionPortio *mrp;
404
405 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
406 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
407 && width == mrp->size
408 && (write ? (bool)mrp->write : (bool)mrp->read)) {
409 return mrp;
410 }
411 }
412 return NULL;
413 }
414
415 static void memory_region_iorange_read(IORange *iorange,
416 uint64_t offset,
417 unsigned width,
418 uint64_t *data)
419 {
420 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
421
422 if (mr->ops->old_portio) {
423 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
424
425 *data = ((uint64_t)1 << (width * 8)) - 1;
426 if (mrp) {
427 *data = mrp->read(mr->opaque, offset + mr->offset);
428 } else if (width == 2) {
429 mrp = find_portio(mr, offset, 1, false);
430 assert(mrp);
431 *data = mrp->read(mr->opaque, offset + mr->offset) |
432 (mrp->read(mr->opaque, offset + mr->offset + 1) << 8);
433 }
434 return;
435 }
436 *data = 0;
437 access_with_adjusted_size(offset + mr->offset, data, width,
438 mr->ops->impl.min_access_size,
439 mr->ops->impl.max_access_size,
440 memory_region_read_accessor, mr);
441 }
442
443 static void memory_region_iorange_write(IORange *iorange,
444 uint64_t offset,
445 unsigned width,
446 uint64_t data)
447 {
448 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
449
450 if (mr->ops->old_portio) {
451 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
452
453 if (mrp) {
454 mrp->write(mr->opaque, offset + mr->offset, data);
455 } else if (width == 2) {
456 mrp = find_portio(mr, offset, 1, false);
457 assert(mrp);
458 mrp->write(mr->opaque, offset + mr->offset, data & 0xff);
459 mrp->write(mr->opaque, offset + mr->offset + 1, data >> 8);
460 }
461 return;
462 }
463 access_with_adjusted_size(offset + mr->offset, &data, width,
464 mr->ops->impl.min_access_size,
465 mr->ops->impl.max_access_size,
466 memory_region_write_accessor, mr);
467 }
468
469 static const IORangeOps memory_region_iorange_ops = {
470 .read = memory_region_iorange_read,
471 .write = memory_region_iorange_write,
472 };
473
474 static void as_io_range_add(AddressSpace *as, FlatRange *fr)
475 {
476 iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
477 int128_get64(fr->addr.start), int128_get64(fr->addr.size));
478 ioport_register(&fr->mr->iorange);
479 }
480
481 static void as_io_range_del(AddressSpace *as, FlatRange *fr)
482 {
483 isa_unassign_ioport(int128_get64(fr->addr.start),
484 int128_get64(fr->addr.size));
485 }
486
487 static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
488 {
489 int r;
490
491 assert(fd->match_data && int128_get64(fd->addr.size) == 2);
492
493 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
494 fd->data, true);
495 if (r < 0) {
496 abort();
497 }
498 }
499
500 static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
501 {
502 int r;
503
504 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
505 fd->data, false);
506 if (r < 0) {
507 abort();
508 }
509 }
510
511 static const AddressSpaceOps address_space_ops_io = {
512 .range_add = as_io_range_add,
513 .range_del = as_io_range_del,
514 .ioeventfd_add = as_io_ioeventfd_add,
515 .ioeventfd_del = as_io_ioeventfd_del,
516 };
517
518 static AddressSpace address_space_io = {
519 .ops = &address_space_ops_io,
520 };
521
522 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
523 {
524 while (mr->parent) {
525 mr = mr->parent;
526 }
527 if (mr == address_space_memory.root) {
528 return &address_space_memory;
529 }
530 if (mr == address_space_io.root) {
531 return &address_space_io;
532 }
533 abort();
534 }
535
536 /* Render a memory region into the global view. Ranges in @view obscure
537 * ranges in @mr.
538 */
539 static void render_memory_region(FlatView *view,
540 MemoryRegion *mr,
541 Int128 base,
542 AddrRange clip,
543 bool readonly)
544 {
545 MemoryRegion *subregion;
546 unsigned i;
547 target_phys_addr_t offset_in_region;
548 Int128 remain;
549 Int128 now;
550 FlatRange fr;
551 AddrRange tmp;
552
553 if (!mr->enabled) {
554 return;
555 }
556
557 int128_addto(&base, int128_make64(mr->addr));
558 readonly |= mr->readonly;
559
560 tmp = addrrange_make(base, mr->size);
561
562 if (!addrrange_intersects(tmp, clip)) {
563 return;
564 }
565
566 clip = addrrange_intersection(tmp, clip);
567
568 if (mr->alias) {
569 int128_subfrom(&base, int128_make64(mr->alias->addr));
570 int128_subfrom(&base, int128_make64(mr->alias_offset));
571 render_memory_region(view, mr->alias, base, clip, readonly);
572 return;
573 }
574
575 /* Render subregions in priority order. */
576 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
577 render_memory_region(view, subregion, base, clip, readonly);
578 }
579
580 if (!mr->terminates) {
581 return;
582 }
583
584 offset_in_region = int128_get64(int128_sub(clip.start, base));
585 base = clip.start;
586 remain = clip.size;
587
588 /* Render the region itself into any gaps left by the current view. */
589 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
590 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
591 continue;
592 }
593 if (int128_lt(base, view->ranges[i].addr.start)) {
594 now = int128_min(remain,
595 int128_sub(view->ranges[i].addr.start, base));
596 fr.mr = mr;
597 fr.offset_in_region = offset_in_region;
598 fr.addr = addrrange_make(base, now);
599 fr.dirty_log_mask = mr->dirty_log_mask;
600 fr.readable = mr->readable;
601 fr.readonly = readonly;
602 flatview_insert(view, i, &fr);
603 ++i;
604 int128_addto(&base, now);
605 offset_in_region += int128_get64(now);
606 int128_subfrom(&remain, now);
607 }
608 if (int128_eq(base, view->ranges[i].addr.start)) {
609 now = int128_min(remain, view->ranges[i].addr.size);
610 int128_addto(&base, now);
611 offset_in_region += int128_get64(now);
612 int128_subfrom(&remain, now);
613 }
614 }
615 if (int128_nz(remain)) {
616 fr.mr = mr;
617 fr.offset_in_region = offset_in_region;
618 fr.addr = addrrange_make(base, remain);
619 fr.dirty_log_mask = mr->dirty_log_mask;
620 fr.readable = mr->readable;
621 fr.readonly = readonly;
622 flatview_insert(view, i, &fr);
623 }
624 }
625
626 /* Render a memory topology into a list of disjoint absolute ranges. */
627 static FlatView generate_memory_topology(MemoryRegion *mr)
628 {
629 FlatView view;
630
631 flatview_init(&view);
632
633 render_memory_region(&view, mr, int128_zero(),
634 addrrange_make(int128_zero(), int128_2_64()), false);
635 flatview_simplify(&view);
636
637 return view;
638 }
639
640 static void address_space_add_del_ioeventfds(AddressSpace *as,
641 MemoryRegionIoeventfd *fds_new,
642 unsigned fds_new_nb,
643 MemoryRegionIoeventfd *fds_old,
644 unsigned fds_old_nb)
645 {
646 unsigned iold, inew;
647
648 /* Generate a symmetric difference of the old and new fd sets, adding
649 * and deleting as necessary.
650 */
651
652 iold = inew = 0;
653 while (iold < fds_old_nb || inew < fds_new_nb) {
654 if (iold < fds_old_nb
655 && (inew == fds_new_nb
656 || memory_region_ioeventfd_before(fds_old[iold],
657 fds_new[inew]))) {
658 as->ops->ioeventfd_del(as, &fds_old[iold]);
659 ++iold;
660 } else if (inew < fds_new_nb
661 && (iold == fds_old_nb
662 || memory_region_ioeventfd_before(fds_new[inew],
663 fds_old[iold]))) {
664 as->ops->ioeventfd_add(as, &fds_new[inew]);
665 ++inew;
666 } else {
667 ++iold;
668 ++inew;
669 }
670 }
671 }
672
673 static void address_space_update_ioeventfds(AddressSpace *as)
674 {
675 FlatRange *fr;
676 unsigned ioeventfd_nb = 0;
677 MemoryRegionIoeventfd *ioeventfds = NULL;
678 AddrRange tmp;
679 unsigned i;
680
681 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
682 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
683 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
684 int128_sub(fr->addr.start,
685 int128_make64(fr->offset_in_region)));
686 if (addrrange_intersects(fr->addr, tmp)) {
687 ++ioeventfd_nb;
688 ioeventfds = g_realloc(ioeventfds,
689 ioeventfd_nb * sizeof(*ioeventfds));
690 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
691 ioeventfds[ioeventfd_nb-1].addr = tmp;
692 }
693 }
694 }
695
696 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
697 as->ioeventfds, as->ioeventfd_nb);
698
699 g_free(as->ioeventfds);
700 as->ioeventfds = ioeventfds;
701 as->ioeventfd_nb = ioeventfd_nb;
702 }
703
704 typedef void ListenerCallback(MemoryListener *listener,
705 MemoryRegionSection *mrs);
706
707 /* Want "void (&MemoryListener::*callback)(const MemoryRegionSection& s)" */
708 static void memory_listener_update_region(FlatRange *fr, AddressSpace *as,
709 size_t callback_offset)
710 {
711 MemoryRegionSection section = {
712 .mr = fr->mr,
713 .address_space = as->root,
714 .offset_within_region = fr->offset_in_region,
715 .size = int128_get64(fr->addr.size),
716 .offset_within_address_space = int128_get64(fr->addr.start),
717 };
718 MemoryListener *listener;
719
720 QLIST_FOREACH(listener, &memory_listeners, link) {
721 ListenerCallback *callback
722 = *(ListenerCallback **)((void *)listener + callback_offset);
723 callback(listener, &section);
724 }
725 }
726
727 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, callback) \
728 memory_listener_update_region(fr, as, offsetof(MemoryListener, callback))
729
730 static void address_space_update_topology_pass(AddressSpace *as,
731 FlatView old_view,
732 FlatView new_view,
733 bool adding)
734 {
735 unsigned iold, inew;
736 FlatRange *frold, *frnew;
737
738 /* Generate a symmetric difference of the old and new memory maps.
739 * Kill ranges in the old map, and instantiate ranges in the new map.
740 */
741 iold = inew = 0;
742 while (iold < old_view.nr || inew < new_view.nr) {
743 if (iold < old_view.nr) {
744 frold = &old_view.ranges[iold];
745 } else {
746 frold = NULL;
747 }
748 if (inew < new_view.nr) {
749 frnew = &new_view.ranges[inew];
750 } else {
751 frnew = NULL;
752 }
753
754 if (frold
755 && (!frnew
756 || int128_lt(frold->addr.start, frnew->addr.start)
757 || (int128_eq(frold->addr.start, frnew->addr.start)
758 && !flatrange_equal(frold, frnew)))) {
759 /* In old, but (not in new, or in new but attributes changed). */
760
761 if (!adding) {
762 MEMORY_LISTENER_UPDATE_REGION(frold, as, region_del);
763 as->ops->range_del(as, frold);
764 }
765
766 ++iold;
767 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
768 /* In both (logging may have changed) */
769
770 if (adding) {
771 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
772 MEMORY_LISTENER_UPDATE_REGION(frold, as, log_stop);
773 as->ops->log_stop(as, frnew);
774 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
775 as->ops->log_start(as, frnew);
776 MEMORY_LISTENER_UPDATE_REGION(frold, as, log_start);
777 }
778 }
779
780 ++iold;
781 ++inew;
782 } else {
783 /* In new */
784
785 if (adding) {
786 as->ops->range_add(as, frnew);
787 MEMORY_LISTENER_UPDATE_REGION(frold, as, region_add);
788 }
789
790 ++inew;
791 }
792 }
793 }
794
795
796 static void address_space_update_topology(AddressSpace *as)
797 {
798 FlatView old_view = as->current_map;
799 FlatView new_view = generate_memory_topology(as->root);
800
801 address_space_update_topology_pass(as, old_view, new_view, false);
802 address_space_update_topology_pass(as, old_view, new_view, true);
803
804 as->current_map = new_view;
805 flatview_destroy(&old_view);
806 address_space_update_ioeventfds(as);
807 }
808
809 static void memory_region_update_topology(MemoryRegion *mr)
810 {
811 if (memory_region_transaction_depth) {
812 memory_region_update_pending |= !mr || mr->enabled;
813 return;
814 }
815
816 if (mr && !mr->enabled) {
817 return;
818 }
819
820 if (address_space_memory.root) {
821 address_space_update_topology(&address_space_memory);
822 }
823 if (address_space_io.root) {
824 address_space_update_topology(&address_space_io);
825 }
826
827 memory_region_update_pending = false;
828 }
829
830 void memory_region_transaction_begin(void)
831 {
832 ++memory_region_transaction_depth;
833 }
834
835 void memory_region_transaction_commit(void)
836 {
837 assert(memory_region_transaction_depth);
838 --memory_region_transaction_depth;
839 if (!memory_region_transaction_depth && memory_region_update_pending) {
840 memory_region_update_topology(NULL);
841 }
842 }
843
844 static void memory_region_destructor_none(MemoryRegion *mr)
845 {
846 }
847
848 static void memory_region_destructor_ram(MemoryRegion *mr)
849 {
850 qemu_ram_free(mr->ram_addr);
851 }
852
853 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
854 {
855 qemu_ram_free_from_ptr(mr->ram_addr);
856 }
857
858 static void memory_region_destructor_iomem(MemoryRegion *mr)
859 {
860 cpu_unregister_io_memory(mr->ram_addr);
861 }
862
863 static void memory_region_destructor_rom_device(MemoryRegion *mr)
864 {
865 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
866 cpu_unregister_io_memory(mr->ram_addr & ~(TARGET_PAGE_MASK | IO_MEM_ROMD));
867 }
868
869 void memory_region_init(MemoryRegion *mr,
870 const char *name,
871 uint64_t size)
872 {
873 mr->ops = NULL;
874 mr->parent = NULL;
875 mr->size = int128_make64(size);
876 if (size == UINT64_MAX) {
877 mr->size = int128_2_64();
878 }
879 mr->addr = 0;
880 mr->offset = 0;
881 mr->enabled = true;
882 mr->terminates = false;
883 mr->ram = false;
884 mr->readable = true;
885 mr->readonly = false;
886 mr->destructor = memory_region_destructor_none;
887 mr->priority = 0;
888 mr->may_overlap = false;
889 mr->alias = NULL;
890 QTAILQ_INIT(&mr->subregions);
891 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
892 QTAILQ_INIT(&mr->coalesced);
893 mr->name = g_strdup(name);
894 mr->dirty_log_mask = 0;
895 mr->ioeventfd_nb = 0;
896 mr->ioeventfds = NULL;
897 }
898
899 static bool memory_region_access_valid(MemoryRegion *mr,
900 target_phys_addr_t addr,
901 unsigned size,
902 bool is_write)
903 {
904 if (mr->ops->valid.accepts
905 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
906 return false;
907 }
908
909 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
910 return false;
911 }
912
913 /* Treat zero as compatibility all valid */
914 if (!mr->ops->valid.max_access_size) {
915 return true;
916 }
917
918 if (size > mr->ops->valid.max_access_size
919 || size < mr->ops->valid.min_access_size) {
920 return false;
921 }
922 return true;
923 }
924
925 static uint32_t memory_region_read_thunk_n(void *_mr,
926 target_phys_addr_t addr,
927 unsigned size)
928 {
929 MemoryRegion *mr = _mr;
930 uint64_t data = 0;
931
932 if (!memory_region_access_valid(mr, addr, size, false)) {
933 return -1U; /* FIXME: better signalling */
934 }
935
936 if (!mr->ops->read) {
937 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
938 }
939
940 /* FIXME: support unaligned access */
941 access_with_adjusted_size(addr + mr->offset, &data, size,
942 mr->ops->impl.min_access_size,
943 mr->ops->impl.max_access_size,
944 memory_region_read_accessor, mr);
945
946 return data;
947 }
948
949 static void memory_region_write_thunk_n(void *_mr,
950 target_phys_addr_t addr,
951 unsigned size,
952 uint64_t data)
953 {
954 MemoryRegion *mr = _mr;
955
956 if (!memory_region_access_valid(mr, addr, size, true)) {
957 return; /* FIXME: better signalling */
958 }
959
960 if (!mr->ops->write) {
961 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
962 return;
963 }
964
965 /* FIXME: support unaligned access */
966 access_with_adjusted_size(addr + mr->offset, &data, size,
967 mr->ops->impl.min_access_size,
968 mr->ops->impl.max_access_size,
969 memory_region_write_accessor, mr);
970 }
971
972 static uint32_t memory_region_read_thunk_b(void *mr, target_phys_addr_t addr)
973 {
974 return memory_region_read_thunk_n(mr, addr, 1);
975 }
976
977 static uint32_t memory_region_read_thunk_w(void *mr, target_phys_addr_t addr)
978 {
979 return memory_region_read_thunk_n(mr, addr, 2);
980 }
981
982 static uint32_t memory_region_read_thunk_l(void *mr, target_phys_addr_t addr)
983 {
984 return memory_region_read_thunk_n(mr, addr, 4);
985 }
986
987 static void memory_region_write_thunk_b(void *mr, target_phys_addr_t addr,
988 uint32_t data)
989 {
990 memory_region_write_thunk_n(mr, addr, 1, data);
991 }
992
993 static void memory_region_write_thunk_w(void *mr, target_phys_addr_t addr,
994 uint32_t data)
995 {
996 memory_region_write_thunk_n(mr, addr, 2, data);
997 }
998
999 static void memory_region_write_thunk_l(void *mr, target_phys_addr_t addr,
1000 uint32_t data)
1001 {
1002 memory_region_write_thunk_n(mr, addr, 4, data);
1003 }
1004
1005 static CPUReadMemoryFunc * const memory_region_read_thunk[] = {
1006 memory_region_read_thunk_b,
1007 memory_region_read_thunk_w,
1008 memory_region_read_thunk_l,
1009 };
1010
1011 static CPUWriteMemoryFunc * const memory_region_write_thunk[] = {
1012 memory_region_write_thunk_b,
1013 memory_region_write_thunk_w,
1014 memory_region_write_thunk_l,
1015 };
1016
1017 static void memory_region_prepare_ram_addr(MemoryRegion *mr)
1018 {
1019 if (mr->backend_registered) {
1020 return;
1021 }
1022
1023 mr->destructor = memory_region_destructor_iomem;
1024 mr->ram_addr = cpu_register_io_memory(memory_region_read_thunk,
1025 memory_region_write_thunk,
1026 mr,
1027 mr->ops->endianness);
1028 mr->backend_registered = true;
1029 }
1030
1031 void memory_region_init_io(MemoryRegion *mr,
1032 const MemoryRegionOps *ops,
1033 void *opaque,
1034 const char *name,
1035 uint64_t size)
1036 {
1037 memory_region_init(mr, name, size);
1038 mr->ops = ops;
1039 mr->opaque = opaque;
1040 mr->terminates = true;
1041 mr->backend_registered = false;
1042 }
1043
1044 void memory_region_init_ram(MemoryRegion *mr,
1045 DeviceState *dev,
1046 const char *name,
1047 uint64_t size)
1048 {
1049 memory_region_init(mr, name, size);
1050 mr->ram = true;
1051 mr->terminates = true;
1052 mr->destructor = memory_region_destructor_ram;
1053 mr->ram_addr = qemu_ram_alloc(dev, name, size, mr);
1054 mr->backend_registered = true;
1055 }
1056
1057 void memory_region_init_ram_ptr(MemoryRegion *mr,
1058 DeviceState *dev,
1059 const char *name,
1060 uint64_t size,
1061 void *ptr)
1062 {
1063 memory_region_init(mr, name, size);
1064 mr->ram = true;
1065 mr->terminates = true;
1066 mr->destructor = memory_region_destructor_ram_from_ptr;
1067 mr->ram_addr = qemu_ram_alloc_from_ptr(dev, name, size, ptr, mr);
1068 mr->backend_registered = true;
1069 }
1070
1071 void memory_region_init_alias(MemoryRegion *mr,
1072 const char *name,
1073 MemoryRegion *orig,
1074 target_phys_addr_t offset,
1075 uint64_t size)
1076 {
1077 memory_region_init(mr, name, size);
1078 mr->alias = orig;
1079 mr->alias_offset = offset;
1080 }
1081
1082 void memory_region_init_rom_device(MemoryRegion *mr,
1083 const MemoryRegionOps *ops,
1084 void *opaque,
1085 DeviceState *dev,
1086 const char *name,
1087 uint64_t size)
1088 {
1089 memory_region_init(mr, name, size);
1090 mr->ops = ops;
1091 mr->opaque = opaque;
1092 mr->terminates = true;
1093 mr->destructor = memory_region_destructor_rom_device;
1094 mr->ram_addr = qemu_ram_alloc(dev, name, size, mr);
1095 mr->ram_addr |= cpu_register_io_memory(memory_region_read_thunk,
1096 memory_region_write_thunk,
1097 mr,
1098 mr->ops->endianness);
1099 mr->ram_addr |= IO_MEM_ROMD;
1100 mr->backend_registered = true;
1101 }
1102
1103 void memory_region_destroy(MemoryRegion *mr)
1104 {
1105 assert(QTAILQ_EMPTY(&mr->subregions));
1106 mr->destructor(mr);
1107 memory_region_clear_coalescing(mr);
1108 g_free((char *)mr->name);
1109 g_free(mr->ioeventfds);
1110 }
1111
1112 uint64_t memory_region_size(MemoryRegion *mr)
1113 {
1114 if (int128_eq(mr->size, int128_2_64())) {
1115 return UINT64_MAX;
1116 }
1117 return int128_get64(mr->size);
1118 }
1119
1120 bool memory_region_is_ram(MemoryRegion *mr)
1121 {
1122 return mr->ram;
1123 }
1124
1125 bool memory_region_is_logging(MemoryRegion *mr)
1126 {
1127 return mr->dirty_log_mask;
1128 }
1129
1130 bool memory_region_is_rom(MemoryRegion *mr)
1131 {
1132 return mr->ram && mr->readonly;
1133 }
1134
1135 void memory_region_set_offset(MemoryRegion *mr, target_phys_addr_t offset)
1136 {
1137 mr->offset = offset;
1138 }
1139
1140 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1141 {
1142 uint8_t mask = 1 << client;
1143
1144 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1145 memory_region_update_topology(mr);
1146 }
1147
1148 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1149 unsigned client)
1150 {
1151 assert(mr->terminates);
1152 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, 1 << client);
1153 }
1154
1155 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr)
1156 {
1157 assert(mr->terminates);
1158 return cpu_physical_memory_set_dirty(mr->ram_addr + addr);
1159 }
1160
1161 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1162 {
1163 FlatRange *fr;
1164
1165 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1166 if (fr->mr == mr) {
1167 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory, log_sync);
1168 cpu_physical_sync_dirty_bitmap(int128_get64(fr->addr.start),
1169 int128_get64(addrrange_end(fr->addr)));
1170 }
1171 }
1172 }
1173
1174 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1175 {
1176 if (mr->readonly != readonly) {
1177 mr->readonly = readonly;
1178 memory_region_update_topology(mr);
1179 }
1180 }
1181
1182 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1183 {
1184 if (mr->readable != readable) {
1185 mr->readable = readable;
1186 memory_region_update_topology(mr);
1187 }
1188 }
1189
1190 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1191 target_phys_addr_t size, unsigned client)
1192 {
1193 assert(mr->terminates);
1194 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1195 mr->ram_addr + addr + size,
1196 1 << client);
1197 }
1198
1199 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1200 {
1201 if (mr->alias) {
1202 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1203 }
1204
1205 assert(mr->terminates);
1206
1207 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1208 }
1209
1210 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1211 {
1212 FlatRange *fr;
1213 CoalescedMemoryRange *cmr;
1214 AddrRange tmp;
1215
1216 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1217 if (fr->mr == mr) {
1218 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1219 int128_get64(fr->addr.size));
1220 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1221 tmp = addrrange_shift(cmr->addr,
1222 int128_sub(fr->addr.start,
1223 int128_make64(fr->offset_in_region)));
1224 if (!addrrange_intersects(tmp, fr->addr)) {
1225 continue;
1226 }
1227 tmp = addrrange_intersection(tmp, fr->addr);
1228 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1229 int128_get64(tmp.size));
1230 }
1231 }
1232 }
1233 }
1234
1235 void memory_region_set_coalescing(MemoryRegion *mr)
1236 {
1237 memory_region_clear_coalescing(mr);
1238 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1239 }
1240
1241 void memory_region_add_coalescing(MemoryRegion *mr,
1242 target_phys_addr_t offset,
1243 uint64_t size)
1244 {
1245 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1246
1247 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1248 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1249 memory_region_update_coalesced_range(mr);
1250 }
1251
1252 void memory_region_clear_coalescing(MemoryRegion *mr)
1253 {
1254 CoalescedMemoryRange *cmr;
1255
1256 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1257 cmr = QTAILQ_FIRST(&mr->coalesced);
1258 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1259 g_free(cmr);
1260 }
1261 memory_region_update_coalesced_range(mr);
1262 }
1263
1264 void memory_region_add_eventfd(MemoryRegion *mr,
1265 target_phys_addr_t addr,
1266 unsigned size,
1267 bool match_data,
1268 uint64_t data,
1269 int fd)
1270 {
1271 MemoryRegionIoeventfd mrfd = {
1272 .addr.start = int128_make64(addr),
1273 .addr.size = int128_make64(size),
1274 .match_data = match_data,
1275 .data = data,
1276 .fd = fd,
1277 };
1278 unsigned i;
1279
1280 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1281 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1282 break;
1283 }
1284 }
1285 ++mr->ioeventfd_nb;
1286 mr->ioeventfds = g_realloc(mr->ioeventfds,
1287 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1288 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1289 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1290 mr->ioeventfds[i] = mrfd;
1291 memory_region_update_topology(mr);
1292 }
1293
1294 void memory_region_del_eventfd(MemoryRegion *mr,
1295 target_phys_addr_t addr,
1296 unsigned size,
1297 bool match_data,
1298 uint64_t data,
1299 int fd)
1300 {
1301 MemoryRegionIoeventfd mrfd = {
1302 .addr.start = int128_make64(addr),
1303 .addr.size = int128_make64(size),
1304 .match_data = match_data,
1305 .data = data,
1306 .fd = fd,
1307 };
1308 unsigned i;
1309
1310 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1311 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1312 break;
1313 }
1314 }
1315 assert(i != mr->ioeventfd_nb);
1316 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1317 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1318 --mr->ioeventfd_nb;
1319 mr->ioeventfds = g_realloc(mr->ioeventfds,
1320 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1321 memory_region_update_topology(mr);
1322 }
1323
1324 static void memory_region_add_subregion_common(MemoryRegion *mr,
1325 target_phys_addr_t offset,
1326 MemoryRegion *subregion)
1327 {
1328 MemoryRegion *other;
1329
1330 assert(!subregion->parent);
1331 subregion->parent = mr;
1332 subregion->addr = offset;
1333 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1334 if (subregion->may_overlap || other->may_overlap) {
1335 continue;
1336 }
1337 if (int128_gt(int128_make64(offset),
1338 int128_add(int128_make64(other->addr), other->size))
1339 || int128_le(int128_add(int128_make64(offset), subregion->size),
1340 int128_make64(other->addr))) {
1341 continue;
1342 }
1343 #if 0
1344 printf("warning: subregion collision %llx/%llx (%s) "
1345 "vs %llx/%llx (%s)\n",
1346 (unsigned long long)offset,
1347 (unsigned long long)int128_get64(subregion->size),
1348 subregion->name,
1349 (unsigned long long)other->addr,
1350 (unsigned long long)int128_get64(other->size),
1351 other->name);
1352 #endif
1353 }
1354 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1355 if (subregion->priority >= other->priority) {
1356 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1357 goto done;
1358 }
1359 }
1360 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1361 done:
1362 memory_region_update_topology(mr);
1363 }
1364
1365
1366 void memory_region_add_subregion(MemoryRegion *mr,
1367 target_phys_addr_t offset,
1368 MemoryRegion *subregion)
1369 {
1370 subregion->may_overlap = false;
1371 subregion->priority = 0;
1372 memory_region_add_subregion_common(mr, offset, subregion);
1373 }
1374
1375 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1376 target_phys_addr_t offset,
1377 MemoryRegion *subregion,
1378 unsigned priority)
1379 {
1380 subregion->may_overlap = true;
1381 subregion->priority = priority;
1382 memory_region_add_subregion_common(mr, offset, subregion);
1383 }
1384
1385 void memory_region_del_subregion(MemoryRegion *mr,
1386 MemoryRegion *subregion)
1387 {
1388 assert(subregion->parent == mr);
1389 subregion->parent = NULL;
1390 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1391 memory_region_update_topology(mr);
1392 }
1393
1394 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1395 {
1396 if (enabled == mr->enabled) {
1397 return;
1398 }
1399 mr->enabled = enabled;
1400 memory_region_update_topology(NULL);
1401 }
1402
1403 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1404 {
1405 MemoryRegion *parent = mr->parent;
1406 unsigned priority = mr->priority;
1407 bool may_overlap = mr->may_overlap;
1408
1409 if (addr == mr->addr || !parent) {
1410 mr->addr = addr;
1411 return;
1412 }
1413
1414 memory_region_transaction_begin();
1415 memory_region_del_subregion(parent, mr);
1416 if (may_overlap) {
1417 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1418 } else {
1419 memory_region_add_subregion(parent, addr, mr);
1420 }
1421 memory_region_transaction_commit();
1422 }
1423
1424 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1425 {
1426 target_phys_addr_t old_offset = mr->alias_offset;
1427
1428 assert(mr->alias);
1429 mr->alias_offset = offset;
1430
1431 if (offset == old_offset || !mr->parent) {
1432 return;
1433 }
1434
1435 memory_region_update_topology(mr);
1436 }
1437
1438 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1439 {
1440 const AddrRange *addr = addr_;
1441 const FlatRange *fr = fr_;
1442
1443 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1444 return -1;
1445 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1446 return 1;
1447 }
1448 return 0;
1449 }
1450
1451 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1452 {
1453 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1454 sizeof(FlatRange), cmp_flatrange_addr);
1455 }
1456
1457 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1458 target_phys_addr_t addr, uint64_t size)
1459 {
1460 AddressSpace *as = memory_region_to_address_space(address_space);
1461 AddrRange range = addrrange_make(int128_make64(addr),
1462 int128_make64(size));
1463 FlatRange *fr = address_space_lookup(as, range);
1464 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1465
1466 if (!fr) {
1467 return ret;
1468 }
1469
1470 while (fr > as->current_map.ranges
1471 && addrrange_intersects(fr[-1].addr, range)) {
1472 --fr;
1473 }
1474
1475 ret.mr = fr->mr;
1476 range = addrrange_intersection(range, fr->addr);
1477 ret.offset_within_region = fr->offset_in_region;
1478 ret.offset_within_region += int128_get64(int128_sub(range.start,
1479 fr->addr.start));
1480 ret.size = int128_get64(range.size);
1481 ret.offset_within_address_space = int128_get64(range.start);
1482 return ret;
1483 }
1484
1485 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1486 {
1487 AddressSpace *as = memory_region_to_address_space(address_space);
1488 FlatRange *fr;
1489
1490 cpu_physical_sync_dirty_bitmap(0, TARGET_PHYS_ADDR_MAX);
1491 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1492 MEMORY_LISTENER_UPDATE_REGION(fr, as, log_sync);
1493 }
1494 }
1495
1496 void memory_global_dirty_log_start(void)
1497 {
1498 MemoryListener *listener;
1499
1500 global_dirty_log = true;
1501 QLIST_FOREACH(listener, &memory_listeners, link) {
1502 listener->log_global_start(listener);
1503 }
1504 }
1505
1506 void memory_global_dirty_log_stop(void)
1507 {
1508 MemoryListener *listener;
1509
1510 global_dirty_log = false;
1511 QLIST_FOREACH(listener, &memory_listeners, link) {
1512 listener->log_global_stop(listener);
1513 }
1514 }
1515
1516 static void listener_add_address_space(MemoryListener *listener,
1517 AddressSpace *as)
1518 {
1519 FlatRange *fr;
1520
1521 if (global_dirty_log) {
1522 listener->log_global_start(listener);
1523 }
1524 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1525 MemoryRegionSection section = {
1526 .mr = fr->mr,
1527 .address_space = as->root,
1528 .offset_within_region = fr->offset_in_region,
1529 .size = int128_get64(fr->addr.size),
1530 .offset_within_address_space = int128_get64(fr->addr.start),
1531 };
1532 listener->region_add(listener, &section);
1533 }
1534 }
1535
1536 void memory_listener_register(MemoryListener *listener)
1537 {
1538 QLIST_INSERT_HEAD(&memory_listeners, listener, link);
1539 listener_add_address_space(listener, &address_space_memory);
1540 listener_add_address_space(listener, &address_space_io);
1541 }
1542
1543 void memory_listener_unregister(MemoryListener *listener)
1544 {
1545 QLIST_REMOVE(listener, link);
1546 }
1547
1548 void set_system_memory_map(MemoryRegion *mr)
1549 {
1550 address_space_memory.root = mr;
1551 memory_region_update_topology(NULL);
1552 }
1553
1554 void set_system_io_map(MemoryRegion *mr)
1555 {
1556 address_space_io.root = mr;
1557 memory_region_update_topology(NULL);
1558 }
1559
1560 typedef struct MemoryRegionList MemoryRegionList;
1561
1562 struct MemoryRegionList {
1563 const MemoryRegion *mr;
1564 bool printed;
1565 QTAILQ_ENTRY(MemoryRegionList) queue;
1566 };
1567
1568 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1569
1570 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1571 const MemoryRegion *mr, unsigned int level,
1572 target_phys_addr_t base,
1573 MemoryRegionListHead *alias_print_queue)
1574 {
1575 MemoryRegionList *new_ml, *ml, *next_ml;
1576 MemoryRegionListHead submr_print_queue;
1577 const MemoryRegion *submr;
1578 unsigned int i;
1579
1580 if (!mr) {
1581 return;
1582 }
1583
1584 for (i = 0; i < level; i++) {
1585 mon_printf(f, " ");
1586 }
1587
1588 if (mr->alias) {
1589 MemoryRegionList *ml;
1590 bool found = false;
1591
1592 /* check if the alias is already in the queue */
1593 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1594 if (ml->mr == mr->alias && !ml->printed) {
1595 found = true;
1596 }
1597 }
1598
1599 if (!found) {
1600 ml = g_new(MemoryRegionList, 1);
1601 ml->mr = mr->alias;
1602 ml->printed = false;
1603 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1604 }
1605 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d): alias %s @%s "
1606 TARGET_FMT_plx "-" TARGET_FMT_plx "\n",
1607 base + mr->addr,
1608 base + mr->addr
1609 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1610 mr->priority,
1611 mr->name,
1612 mr->alias->name,
1613 mr->alias_offset,
1614 mr->alias_offset
1615 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1616 } else {
1617 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d): %s\n",
1618 base + mr->addr,
1619 base + mr->addr
1620 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1621 mr->priority,
1622 mr->name);
1623 }
1624
1625 QTAILQ_INIT(&submr_print_queue);
1626
1627 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1628 new_ml = g_new(MemoryRegionList, 1);
1629 new_ml->mr = submr;
1630 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1631 if (new_ml->mr->addr < ml->mr->addr ||
1632 (new_ml->mr->addr == ml->mr->addr &&
1633 new_ml->mr->priority > ml->mr->priority)) {
1634 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1635 new_ml = NULL;
1636 break;
1637 }
1638 }
1639 if (new_ml) {
1640 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1641 }
1642 }
1643
1644 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1645 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1646 alias_print_queue);
1647 }
1648
1649 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1650 g_free(ml);
1651 }
1652 }
1653
1654 void mtree_info(fprintf_function mon_printf, void *f)
1655 {
1656 MemoryRegionListHead ml_head;
1657 MemoryRegionList *ml, *ml2;
1658
1659 QTAILQ_INIT(&ml_head);
1660
1661 mon_printf(f, "memory\n");
1662 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1663
1664 /* print aliased regions */
1665 QTAILQ_FOREACH(ml, &ml_head, queue) {
1666 if (!ml->printed) {
1667 mon_printf(f, "%s\n", ml->mr->name);
1668 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1669 }
1670 }
1671
1672 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1673 g_free(ml);
1674 }
1675
1676 if (address_space_io.root &&
1677 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1678 QTAILQ_INIT(&ml_head);
1679 mon_printf(f, "I/O\n");
1680 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1681 }
1682 }