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Merge remote-tracking branch 'qemu-kvm/memory/urgent' into staging
[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #define WANT_EXEC_OBSOLETE
24 #include "exec-obsolete.h"
25
26 unsigned memory_region_transaction_depth = 0;
27 static bool memory_region_update_pending = false;
28 static bool global_dirty_log = false;
29
30 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
31 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
32
33 typedef struct AddrRange AddrRange;
34
35 /*
36 * Note using signed integers limits us to physical addresses at most
37 * 63 bits wide. They are needed for negative offsetting in aliases
38 * (large MemoryRegion::alias_offset).
39 */
40 struct AddrRange {
41 Int128 start;
42 Int128 size;
43 };
44
45 static AddrRange addrrange_make(Int128 start, Int128 size)
46 {
47 return (AddrRange) { start, size };
48 }
49
50 static bool addrrange_equal(AddrRange r1, AddrRange r2)
51 {
52 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
53 }
54
55 static Int128 addrrange_end(AddrRange r)
56 {
57 return int128_add(r.start, r.size);
58 }
59
60 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
61 {
62 int128_addto(&range.start, delta);
63 return range;
64 }
65
66 static bool addrrange_contains(AddrRange range, Int128 addr)
67 {
68 return int128_ge(addr, range.start)
69 && int128_lt(addr, addrrange_end(range));
70 }
71
72 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
73 {
74 return addrrange_contains(r1, r2.start)
75 || addrrange_contains(r2, r1.start);
76 }
77
78 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
79 {
80 Int128 start = int128_max(r1.start, r2.start);
81 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
82 return addrrange_make(start, int128_sub(end, start));
83 }
84
85 enum ListenerDirection { Forward, Reverse };
86
87 static bool memory_listener_match(MemoryListener *listener,
88 MemoryRegionSection *section)
89 {
90 return !listener->address_space_filter
91 || listener->address_space_filter == section->address_space;
92 }
93
94 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
95 do { \
96 MemoryListener *_listener; \
97 \
98 switch (_direction) { \
99 case Forward: \
100 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
101 _listener->_callback(_listener, ##_args); \
102 } \
103 break; \
104 case Reverse: \
105 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
106 memory_listeners, link) { \
107 _listener->_callback(_listener, ##_args); \
108 } \
109 break; \
110 default: \
111 abort(); \
112 } \
113 } while (0)
114
115 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
116 do { \
117 MemoryListener *_listener; \
118 \
119 switch (_direction) { \
120 case Forward: \
121 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
122 if (memory_listener_match(_listener, _section)) { \
123 _listener->_callback(_listener, _section, ##_args); \
124 } \
125 } \
126 break; \
127 case Reverse: \
128 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
129 memory_listeners, link) { \
130 if (memory_listener_match(_listener, _section)) { \
131 _listener->_callback(_listener, _section, ##_args); \
132 } \
133 } \
134 break; \
135 default: \
136 abort(); \
137 } \
138 } while (0)
139
140 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
141 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
142 .mr = (fr)->mr, \
143 .address_space = (as)->root, \
144 .offset_within_region = (fr)->offset_in_region, \
145 .size = int128_get64((fr)->addr.size), \
146 .offset_within_address_space = int128_get64((fr)->addr.start), \
147 .readonly = (fr)->readonly, \
148 }))
149
150 struct CoalescedMemoryRange {
151 AddrRange addr;
152 QTAILQ_ENTRY(CoalescedMemoryRange) link;
153 };
154
155 struct MemoryRegionIoeventfd {
156 AddrRange addr;
157 bool match_data;
158 uint64_t data;
159 int fd;
160 };
161
162 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
163 MemoryRegionIoeventfd b)
164 {
165 if (int128_lt(a.addr.start, b.addr.start)) {
166 return true;
167 } else if (int128_gt(a.addr.start, b.addr.start)) {
168 return false;
169 } else if (int128_lt(a.addr.size, b.addr.size)) {
170 return true;
171 } else if (int128_gt(a.addr.size, b.addr.size)) {
172 return false;
173 } else if (a.match_data < b.match_data) {
174 return true;
175 } else if (a.match_data > b.match_data) {
176 return false;
177 } else if (a.match_data) {
178 if (a.data < b.data) {
179 return true;
180 } else if (a.data > b.data) {
181 return false;
182 }
183 }
184 if (a.fd < b.fd) {
185 return true;
186 } else if (a.fd > b.fd) {
187 return false;
188 }
189 return false;
190 }
191
192 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
193 MemoryRegionIoeventfd b)
194 {
195 return !memory_region_ioeventfd_before(a, b)
196 && !memory_region_ioeventfd_before(b, a);
197 }
198
199 typedef struct FlatRange FlatRange;
200 typedef struct FlatView FlatView;
201
202 /* Range of memory in the global map. Addresses are absolute. */
203 struct FlatRange {
204 MemoryRegion *mr;
205 target_phys_addr_t offset_in_region;
206 AddrRange addr;
207 uint8_t dirty_log_mask;
208 bool readable;
209 bool readonly;
210 };
211
212 /* Flattened global view of current active memory hierarchy. Kept in sorted
213 * order.
214 */
215 struct FlatView {
216 FlatRange *ranges;
217 unsigned nr;
218 unsigned nr_allocated;
219 };
220
221 typedef struct AddressSpace AddressSpace;
222 typedef struct AddressSpaceOps AddressSpaceOps;
223
224 /* A system address space - I/O, memory, etc. */
225 struct AddressSpace {
226 MemoryRegion *root;
227 FlatView current_map;
228 int ioeventfd_nb;
229 MemoryRegionIoeventfd *ioeventfds;
230 };
231
232 #define FOR_EACH_FLAT_RANGE(var, view) \
233 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
234
235 static bool flatrange_equal(FlatRange *a, FlatRange *b)
236 {
237 return a->mr == b->mr
238 && addrrange_equal(a->addr, b->addr)
239 && a->offset_in_region == b->offset_in_region
240 && a->readable == b->readable
241 && a->readonly == b->readonly;
242 }
243
244 static void flatview_init(FlatView *view)
245 {
246 view->ranges = NULL;
247 view->nr = 0;
248 view->nr_allocated = 0;
249 }
250
251 /* Insert a range into a given position. Caller is responsible for maintaining
252 * sorting order.
253 */
254 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
255 {
256 if (view->nr == view->nr_allocated) {
257 view->nr_allocated = MAX(2 * view->nr, 10);
258 view->ranges = g_realloc(view->ranges,
259 view->nr_allocated * sizeof(*view->ranges));
260 }
261 memmove(view->ranges + pos + 1, view->ranges + pos,
262 (view->nr - pos) * sizeof(FlatRange));
263 view->ranges[pos] = *range;
264 ++view->nr;
265 }
266
267 static void flatview_destroy(FlatView *view)
268 {
269 g_free(view->ranges);
270 }
271
272 static bool can_merge(FlatRange *r1, FlatRange *r2)
273 {
274 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
275 && r1->mr == r2->mr
276 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
277 r1->addr.size),
278 int128_make64(r2->offset_in_region))
279 && r1->dirty_log_mask == r2->dirty_log_mask
280 && r1->readable == r2->readable
281 && r1->readonly == r2->readonly;
282 }
283
284 /* Attempt to simplify a view by merging ajacent ranges */
285 static void flatview_simplify(FlatView *view)
286 {
287 unsigned i, j;
288
289 i = 0;
290 while (i < view->nr) {
291 j = i + 1;
292 while (j < view->nr
293 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
294 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
295 ++j;
296 }
297 ++i;
298 memmove(&view->ranges[i], &view->ranges[j],
299 (view->nr - j) * sizeof(view->ranges[j]));
300 view->nr -= j - i;
301 }
302 }
303
304 static void memory_region_read_accessor(void *opaque,
305 target_phys_addr_t addr,
306 uint64_t *value,
307 unsigned size,
308 unsigned shift,
309 uint64_t mask)
310 {
311 MemoryRegion *mr = opaque;
312 uint64_t tmp;
313
314 tmp = mr->ops->read(mr->opaque, addr, size);
315 *value |= (tmp & mask) << shift;
316 }
317
318 static void memory_region_write_accessor(void *opaque,
319 target_phys_addr_t addr,
320 uint64_t *value,
321 unsigned size,
322 unsigned shift,
323 uint64_t mask)
324 {
325 MemoryRegion *mr = opaque;
326 uint64_t tmp;
327
328 tmp = (*value >> shift) & mask;
329 mr->ops->write(mr->opaque, addr, tmp, size);
330 }
331
332 static void access_with_adjusted_size(target_phys_addr_t addr,
333 uint64_t *value,
334 unsigned size,
335 unsigned access_size_min,
336 unsigned access_size_max,
337 void (*access)(void *opaque,
338 target_phys_addr_t addr,
339 uint64_t *value,
340 unsigned size,
341 unsigned shift,
342 uint64_t mask),
343 void *opaque)
344 {
345 uint64_t access_mask;
346 unsigned access_size;
347 unsigned i;
348
349 if (!access_size_min) {
350 access_size_min = 1;
351 }
352 if (!access_size_max) {
353 access_size_max = 4;
354 }
355 access_size = MAX(MIN(size, access_size_max), access_size_min);
356 access_mask = -1ULL >> (64 - access_size * 8);
357 for (i = 0; i < size; i += access_size) {
358 /* FIXME: big-endian support */
359 access(opaque, addr + i, value, access_size, i * 8, access_mask);
360 }
361 }
362
363 static AddressSpace address_space_memory;
364
365 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
366 unsigned width, bool write)
367 {
368 const MemoryRegionPortio *mrp;
369
370 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
371 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
372 && width == mrp->size
373 && (write ? (bool)mrp->write : (bool)mrp->read)) {
374 return mrp;
375 }
376 }
377 return NULL;
378 }
379
380 static void memory_region_iorange_read(IORange *iorange,
381 uint64_t offset,
382 unsigned width,
383 uint64_t *data)
384 {
385 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
386
387 if (mr->ops->old_portio) {
388 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
389
390 *data = ((uint64_t)1 << (width * 8)) - 1;
391 if (mrp) {
392 *data = mrp->read(mr->opaque, offset);
393 } else if (width == 2) {
394 mrp = find_portio(mr, offset, 1, false);
395 assert(mrp);
396 *data = mrp->read(mr->opaque, offset) |
397 (mrp->read(mr->opaque, offset + 1) << 8);
398 }
399 return;
400 }
401 *data = 0;
402 access_with_adjusted_size(offset, data, width,
403 mr->ops->impl.min_access_size,
404 mr->ops->impl.max_access_size,
405 memory_region_read_accessor, mr);
406 }
407
408 static void memory_region_iorange_write(IORange *iorange,
409 uint64_t offset,
410 unsigned width,
411 uint64_t data)
412 {
413 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
414
415 if (mr->ops->old_portio) {
416 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
417
418 if (mrp) {
419 mrp->write(mr->opaque, offset, data);
420 } else if (width == 2) {
421 mrp = find_portio(mr, offset, 1, false);
422 assert(mrp);
423 mrp->write(mr->opaque, offset, data & 0xff);
424 mrp->write(mr->opaque, offset + 1, data >> 8);
425 }
426 return;
427 }
428 access_with_adjusted_size(offset, &data, width,
429 mr->ops->impl.min_access_size,
430 mr->ops->impl.max_access_size,
431 memory_region_write_accessor, mr);
432 }
433
434 const IORangeOps memory_region_iorange_ops = {
435 .read = memory_region_iorange_read,
436 .write = memory_region_iorange_write,
437 };
438
439 static AddressSpace address_space_io;
440
441 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
442 {
443 while (mr->parent) {
444 mr = mr->parent;
445 }
446 if (mr == address_space_memory.root) {
447 return &address_space_memory;
448 }
449 if (mr == address_space_io.root) {
450 return &address_space_io;
451 }
452 abort();
453 }
454
455 /* Render a memory region into the global view. Ranges in @view obscure
456 * ranges in @mr.
457 */
458 static void render_memory_region(FlatView *view,
459 MemoryRegion *mr,
460 Int128 base,
461 AddrRange clip,
462 bool readonly)
463 {
464 MemoryRegion *subregion;
465 unsigned i;
466 target_phys_addr_t offset_in_region;
467 Int128 remain;
468 Int128 now;
469 FlatRange fr;
470 AddrRange tmp;
471
472 if (!mr->enabled) {
473 return;
474 }
475
476 int128_addto(&base, int128_make64(mr->addr));
477 readonly |= mr->readonly;
478
479 tmp = addrrange_make(base, mr->size);
480
481 if (!addrrange_intersects(tmp, clip)) {
482 return;
483 }
484
485 clip = addrrange_intersection(tmp, clip);
486
487 if (mr->alias) {
488 int128_subfrom(&base, int128_make64(mr->alias->addr));
489 int128_subfrom(&base, int128_make64(mr->alias_offset));
490 render_memory_region(view, mr->alias, base, clip, readonly);
491 return;
492 }
493
494 /* Render subregions in priority order. */
495 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
496 render_memory_region(view, subregion, base, clip, readonly);
497 }
498
499 if (!mr->terminates) {
500 return;
501 }
502
503 offset_in_region = int128_get64(int128_sub(clip.start, base));
504 base = clip.start;
505 remain = clip.size;
506
507 /* Render the region itself into any gaps left by the current view. */
508 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
509 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
510 continue;
511 }
512 if (int128_lt(base, view->ranges[i].addr.start)) {
513 now = int128_min(remain,
514 int128_sub(view->ranges[i].addr.start, base));
515 fr.mr = mr;
516 fr.offset_in_region = offset_in_region;
517 fr.addr = addrrange_make(base, now);
518 fr.dirty_log_mask = mr->dirty_log_mask;
519 fr.readable = mr->readable;
520 fr.readonly = readonly;
521 flatview_insert(view, i, &fr);
522 ++i;
523 int128_addto(&base, now);
524 offset_in_region += int128_get64(now);
525 int128_subfrom(&remain, now);
526 }
527 if (int128_eq(base, view->ranges[i].addr.start)) {
528 now = int128_min(remain, view->ranges[i].addr.size);
529 int128_addto(&base, now);
530 offset_in_region += int128_get64(now);
531 int128_subfrom(&remain, now);
532 }
533 }
534 if (int128_nz(remain)) {
535 fr.mr = mr;
536 fr.offset_in_region = offset_in_region;
537 fr.addr = addrrange_make(base, remain);
538 fr.dirty_log_mask = mr->dirty_log_mask;
539 fr.readable = mr->readable;
540 fr.readonly = readonly;
541 flatview_insert(view, i, &fr);
542 }
543 }
544
545 /* Render a memory topology into a list of disjoint absolute ranges. */
546 static FlatView generate_memory_topology(MemoryRegion *mr)
547 {
548 FlatView view;
549
550 flatview_init(&view);
551
552 render_memory_region(&view, mr, int128_zero(),
553 addrrange_make(int128_zero(), int128_2_64()), false);
554 flatview_simplify(&view);
555
556 return view;
557 }
558
559 static void address_space_add_del_ioeventfds(AddressSpace *as,
560 MemoryRegionIoeventfd *fds_new,
561 unsigned fds_new_nb,
562 MemoryRegionIoeventfd *fds_old,
563 unsigned fds_old_nb)
564 {
565 unsigned iold, inew;
566 MemoryRegionIoeventfd *fd;
567 MemoryRegionSection section;
568
569 /* Generate a symmetric difference of the old and new fd sets, adding
570 * and deleting as necessary.
571 */
572
573 iold = inew = 0;
574 while (iold < fds_old_nb || inew < fds_new_nb) {
575 if (iold < fds_old_nb
576 && (inew == fds_new_nb
577 || memory_region_ioeventfd_before(fds_old[iold],
578 fds_new[inew]))) {
579 fd = &fds_old[iold];
580 section = (MemoryRegionSection) {
581 .address_space = as->root,
582 .offset_within_address_space = int128_get64(fd->addr.start),
583 .size = int128_get64(fd->addr.size),
584 };
585 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
586 fd->match_data, fd->data, fd->fd);
587 ++iold;
588 } else if (inew < fds_new_nb
589 && (iold == fds_old_nb
590 || memory_region_ioeventfd_before(fds_new[inew],
591 fds_old[iold]))) {
592 fd = &fds_new[inew];
593 section = (MemoryRegionSection) {
594 .address_space = as->root,
595 .offset_within_address_space = int128_get64(fd->addr.start),
596 .size = int128_get64(fd->addr.size),
597 };
598 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
599 fd->match_data, fd->data, fd->fd);
600 ++inew;
601 } else {
602 ++iold;
603 ++inew;
604 }
605 }
606 }
607
608 static void address_space_update_ioeventfds(AddressSpace *as)
609 {
610 FlatRange *fr;
611 unsigned ioeventfd_nb = 0;
612 MemoryRegionIoeventfd *ioeventfds = NULL;
613 AddrRange tmp;
614 unsigned i;
615
616 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
617 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
618 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
619 int128_sub(fr->addr.start,
620 int128_make64(fr->offset_in_region)));
621 if (addrrange_intersects(fr->addr, tmp)) {
622 ++ioeventfd_nb;
623 ioeventfds = g_realloc(ioeventfds,
624 ioeventfd_nb * sizeof(*ioeventfds));
625 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
626 ioeventfds[ioeventfd_nb-1].addr = tmp;
627 }
628 }
629 }
630
631 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
632 as->ioeventfds, as->ioeventfd_nb);
633
634 g_free(as->ioeventfds);
635 as->ioeventfds = ioeventfds;
636 as->ioeventfd_nb = ioeventfd_nb;
637 }
638
639 static void address_space_update_topology_pass(AddressSpace *as,
640 FlatView old_view,
641 FlatView new_view,
642 bool adding)
643 {
644 unsigned iold, inew;
645 FlatRange *frold, *frnew;
646
647 /* Generate a symmetric difference of the old and new memory maps.
648 * Kill ranges in the old map, and instantiate ranges in the new map.
649 */
650 iold = inew = 0;
651 while (iold < old_view.nr || inew < new_view.nr) {
652 if (iold < old_view.nr) {
653 frold = &old_view.ranges[iold];
654 } else {
655 frold = NULL;
656 }
657 if (inew < new_view.nr) {
658 frnew = &new_view.ranges[inew];
659 } else {
660 frnew = NULL;
661 }
662
663 if (frold
664 && (!frnew
665 || int128_lt(frold->addr.start, frnew->addr.start)
666 || (int128_eq(frold->addr.start, frnew->addr.start)
667 && !flatrange_equal(frold, frnew)))) {
668 /* In old, but (not in new, or in new but attributes changed). */
669
670 if (!adding) {
671 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
672 }
673
674 ++iold;
675 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
676 /* In both (logging may have changed) */
677
678 if (adding) {
679 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
680 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
681 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
682 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
683 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
684 }
685 }
686
687 ++iold;
688 ++inew;
689 } else {
690 /* In new */
691
692 if (adding) {
693 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
694 }
695
696 ++inew;
697 }
698 }
699 }
700
701
702 static void address_space_update_topology(AddressSpace *as)
703 {
704 FlatView old_view = as->current_map;
705 FlatView new_view = generate_memory_topology(as->root);
706
707 address_space_update_topology_pass(as, old_view, new_view, false);
708 address_space_update_topology_pass(as, old_view, new_view, true);
709
710 as->current_map = new_view;
711 flatview_destroy(&old_view);
712 address_space_update_ioeventfds(as);
713 }
714
715 static void memory_region_update_topology(MemoryRegion *mr)
716 {
717 if (memory_region_transaction_depth) {
718 memory_region_update_pending |= !mr || mr->enabled;
719 return;
720 }
721
722 if (mr && !mr->enabled) {
723 return;
724 }
725
726 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
727
728 if (address_space_memory.root) {
729 address_space_update_topology(&address_space_memory);
730 }
731 if (address_space_io.root) {
732 address_space_update_topology(&address_space_io);
733 }
734
735 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
736
737 memory_region_update_pending = false;
738 }
739
740 void memory_region_transaction_begin(void)
741 {
742 ++memory_region_transaction_depth;
743 }
744
745 void memory_region_transaction_commit(void)
746 {
747 assert(memory_region_transaction_depth);
748 --memory_region_transaction_depth;
749 if (!memory_region_transaction_depth && memory_region_update_pending) {
750 memory_region_update_topology(NULL);
751 }
752 }
753
754 static void memory_region_destructor_none(MemoryRegion *mr)
755 {
756 }
757
758 static void memory_region_destructor_ram(MemoryRegion *mr)
759 {
760 qemu_ram_free(mr->ram_addr);
761 }
762
763 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
764 {
765 qemu_ram_free_from_ptr(mr->ram_addr);
766 }
767
768 static void memory_region_destructor_iomem(MemoryRegion *mr)
769 {
770 cpu_unregister_io_memory(mr->ram_addr);
771 }
772
773 static void memory_region_destructor_rom_device(MemoryRegion *mr)
774 {
775 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
776 cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK);
777 }
778
779 static bool memory_region_wrong_endianness(MemoryRegion *mr)
780 {
781 #ifdef TARGET_WORDS_BIGENDIAN
782 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
783 #else
784 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
785 #endif
786 }
787
788 void memory_region_init(MemoryRegion *mr,
789 const char *name,
790 uint64_t size)
791 {
792 mr->ops = NULL;
793 mr->parent = NULL;
794 mr->size = int128_make64(size);
795 if (size == UINT64_MAX) {
796 mr->size = int128_2_64();
797 }
798 mr->addr = 0;
799 mr->subpage = false;
800 mr->enabled = true;
801 mr->terminates = false;
802 mr->ram = false;
803 mr->readable = true;
804 mr->readonly = false;
805 mr->rom_device = false;
806 mr->destructor = memory_region_destructor_none;
807 mr->priority = 0;
808 mr->may_overlap = false;
809 mr->alias = NULL;
810 QTAILQ_INIT(&mr->subregions);
811 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
812 QTAILQ_INIT(&mr->coalesced);
813 mr->name = g_strdup(name);
814 mr->dirty_log_mask = 0;
815 mr->ioeventfd_nb = 0;
816 mr->ioeventfds = NULL;
817 }
818
819 static bool memory_region_access_valid(MemoryRegion *mr,
820 target_phys_addr_t addr,
821 unsigned size,
822 bool is_write)
823 {
824 if (mr->ops->valid.accepts
825 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
826 return false;
827 }
828
829 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
830 return false;
831 }
832
833 /* Treat zero as compatibility all valid */
834 if (!mr->ops->valid.max_access_size) {
835 return true;
836 }
837
838 if (size > mr->ops->valid.max_access_size
839 || size < mr->ops->valid.min_access_size) {
840 return false;
841 }
842 return true;
843 }
844
845 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
846 target_phys_addr_t addr,
847 unsigned size)
848 {
849 uint64_t data = 0;
850
851 if (!memory_region_access_valid(mr, addr, size, false)) {
852 return -1U; /* FIXME: better signalling */
853 }
854
855 if (!mr->ops->read) {
856 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
857 }
858
859 /* FIXME: support unaligned access */
860 access_with_adjusted_size(addr, &data, size,
861 mr->ops->impl.min_access_size,
862 mr->ops->impl.max_access_size,
863 memory_region_read_accessor, mr);
864
865 return data;
866 }
867
868 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
869 {
870 if (memory_region_wrong_endianness(mr)) {
871 switch (size) {
872 case 1:
873 break;
874 case 2:
875 *data = bswap16(*data);
876 break;
877 case 4:
878 *data = bswap32(*data);
879 break;
880 default:
881 abort();
882 }
883 }
884 }
885
886 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
887 target_phys_addr_t addr,
888 unsigned size)
889 {
890 uint64_t ret;
891
892 ret = memory_region_dispatch_read1(mr, addr, size);
893 adjust_endianness(mr, &ret, size);
894 return ret;
895 }
896
897 static void memory_region_dispatch_write(MemoryRegion *mr,
898 target_phys_addr_t addr,
899 uint64_t data,
900 unsigned size)
901 {
902 if (!memory_region_access_valid(mr, addr, size, true)) {
903 return; /* FIXME: better signalling */
904 }
905
906 adjust_endianness(mr, &data, size);
907
908 if (!mr->ops->write) {
909 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
910 return;
911 }
912
913 /* FIXME: support unaligned access */
914 access_with_adjusted_size(addr, &data, size,
915 mr->ops->impl.min_access_size,
916 mr->ops->impl.max_access_size,
917 memory_region_write_accessor, mr);
918 }
919
920 void memory_region_init_io(MemoryRegion *mr,
921 const MemoryRegionOps *ops,
922 void *opaque,
923 const char *name,
924 uint64_t size)
925 {
926 memory_region_init(mr, name, size);
927 mr->ops = ops;
928 mr->opaque = opaque;
929 mr->terminates = true;
930 mr->destructor = memory_region_destructor_iomem;
931 mr->ram_addr = cpu_register_io_memory(mr);
932 }
933
934 void memory_region_init_ram(MemoryRegion *mr,
935 const char *name,
936 uint64_t size)
937 {
938 memory_region_init(mr, name, size);
939 mr->ram = true;
940 mr->terminates = true;
941 mr->destructor = memory_region_destructor_ram;
942 mr->ram_addr = qemu_ram_alloc(size, mr);
943 }
944
945 void memory_region_init_ram_ptr(MemoryRegion *mr,
946 const char *name,
947 uint64_t size,
948 void *ptr)
949 {
950 memory_region_init(mr, name, size);
951 mr->ram = true;
952 mr->terminates = true;
953 mr->destructor = memory_region_destructor_ram_from_ptr;
954 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
955 }
956
957 void memory_region_init_alias(MemoryRegion *mr,
958 const char *name,
959 MemoryRegion *orig,
960 target_phys_addr_t offset,
961 uint64_t size)
962 {
963 memory_region_init(mr, name, size);
964 mr->alias = orig;
965 mr->alias_offset = offset;
966 }
967
968 void memory_region_init_rom_device(MemoryRegion *mr,
969 const MemoryRegionOps *ops,
970 void *opaque,
971 const char *name,
972 uint64_t size)
973 {
974 memory_region_init(mr, name, size);
975 mr->ops = ops;
976 mr->opaque = opaque;
977 mr->terminates = true;
978 mr->rom_device = true;
979 mr->destructor = memory_region_destructor_rom_device;
980 mr->ram_addr = qemu_ram_alloc(size, mr);
981 mr->ram_addr |= cpu_register_io_memory(mr);
982 }
983
984 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
985 unsigned size)
986 {
987 MemoryRegion *mr = opaque;
988
989 if (!mr->warning_printed) {
990 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
991 mr->warning_printed = true;
992 }
993 return -1U;
994 }
995
996 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
997 unsigned size)
998 {
999 MemoryRegion *mr = opaque;
1000
1001 if (!mr->warning_printed) {
1002 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1003 mr->warning_printed = true;
1004 }
1005 }
1006
1007 static const MemoryRegionOps reservation_ops = {
1008 .read = invalid_read,
1009 .write = invalid_write,
1010 .endianness = DEVICE_NATIVE_ENDIAN,
1011 };
1012
1013 void memory_region_init_reservation(MemoryRegion *mr,
1014 const char *name,
1015 uint64_t size)
1016 {
1017 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1018 }
1019
1020 void memory_region_destroy(MemoryRegion *mr)
1021 {
1022 assert(QTAILQ_EMPTY(&mr->subregions));
1023 mr->destructor(mr);
1024 memory_region_clear_coalescing(mr);
1025 g_free((char *)mr->name);
1026 g_free(mr->ioeventfds);
1027 }
1028
1029 uint64_t memory_region_size(MemoryRegion *mr)
1030 {
1031 if (int128_eq(mr->size, int128_2_64())) {
1032 return UINT64_MAX;
1033 }
1034 return int128_get64(mr->size);
1035 }
1036
1037 const char *memory_region_name(MemoryRegion *mr)
1038 {
1039 return mr->name;
1040 }
1041
1042 bool memory_region_is_ram(MemoryRegion *mr)
1043 {
1044 return mr->ram;
1045 }
1046
1047 bool memory_region_is_logging(MemoryRegion *mr)
1048 {
1049 return mr->dirty_log_mask;
1050 }
1051
1052 bool memory_region_is_rom(MemoryRegion *mr)
1053 {
1054 return mr->ram && mr->readonly;
1055 }
1056
1057 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1058 {
1059 uint8_t mask = 1 << client;
1060
1061 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1062 memory_region_update_topology(mr);
1063 }
1064
1065 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1066 target_phys_addr_t size, unsigned client)
1067 {
1068 assert(mr->terminates);
1069 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1070 1 << client);
1071 }
1072
1073 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1074 target_phys_addr_t size)
1075 {
1076 assert(mr->terminates);
1077 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1078 }
1079
1080 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1081 {
1082 FlatRange *fr;
1083
1084 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1085 if (fr->mr == mr) {
1086 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory,
1087 Forward, log_sync);
1088 }
1089 }
1090 }
1091
1092 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1093 {
1094 if (mr->readonly != readonly) {
1095 mr->readonly = readonly;
1096 memory_region_update_topology(mr);
1097 }
1098 }
1099
1100 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1101 {
1102 if (mr->readable != readable) {
1103 mr->readable = readable;
1104 memory_region_update_topology(mr);
1105 }
1106 }
1107
1108 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1109 target_phys_addr_t size, unsigned client)
1110 {
1111 assert(mr->terminates);
1112 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1113 mr->ram_addr + addr + size,
1114 1 << client);
1115 }
1116
1117 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1118 {
1119 if (mr->alias) {
1120 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1121 }
1122
1123 assert(mr->terminates);
1124
1125 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1126 }
1127
1128 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1129 {
1130 FlatRange *fr;
1131 CoalescedMemoryRange *cmr;
1132 AddrRange tmp;
1133
1134 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1135 if (fr->mr == mr) {
1136 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1137 int128_get64(fr->addr.size));
1138 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1139 tmp = addrrange_shift(cmr->addr,
1140 int128_sub(fr->addr.start,
1141 int128_make64(fr->offset_in_region)));
1142 if (!addrrange_intersects(tmp, fr->addr)) {
1143 continue;
1144 }
1145 tmp = addrrange_intersection(tmp, fr->addr);
1146 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1147 int128_get64(tmp.size));
1148 }
1149 }
1150 }
1151 }
1152
1153 void memory_region_set_coalescing(MemoryRegion *mr)
1154 {
1155 memory_region_clear_coalescing(mr);
1156 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1157 }
1158
1159 void memory_region_add_coalescing(MemoryRegion *mr,
1160 target_phys_addr_t offset,
1161 uint64_t size)
1162 {
1163 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1164
1165 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1166 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1167 memory_region_update_coalesced_range(mr);
1168 }
1169
1170 void memory_region_clear_coalescing(MemoryRegion *mr)
1171 {
1172 CoalescedMemoryRange *cmr;
1173
1174 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1175 cmr = QTAILQ_FIRST(&mr->coalesced);
1176 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1177 g_free(cmr);
1178 }
1179 memory_region_update_coalesced_range(mr);
1180 }
1181
1182 void memory_region_add_eventfd(MemoryRegion *mr,
1183 target_phys_addr_t addr,
1184 unsigned size,
1185 bool match_data,
1186 uint64_t data,
1187 int fd)
1188 {
1189 MemoryRegionIoeventfd mrfd = {
1190 .addr.start = int128_make64(addr),
1191 .addr.size = int128_make64(size),
1192 .match_data = match_data,
1193 .data = data,
1194 .fd = fd,
1195 };
1196 unsigned i;
1197
1198 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1199 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1200 break;
1201 }
1202 }
1203 ++mr->ioeventfd_nb;
1204 mr->ioeventfds = g_realloc(mr->ioeventfds,
1205 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1206 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1207 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1208 mr->ioeventfds[i] = mrfd;
1209 memory_region_update_topology(mr);
1210 }
1211
1212 void memory_region_del_eventfd(MemoryRegion *mr,
1213 target_phys_addr_t addr,
1214 unsigned size,
1215 bool match_data,
1216 uint64_t data,
1217 int fd)
1218 {
1219 MemoryRegionIoeventfd mrfd = {
1220 .addr.start = int128_make64(addr),
1221 .addr.size = int128_make64(size),
1222 .match_data = match_data,
1223 .data = data,
1224 .fd = fd,
1225 };
1226 unsigned i;
1227
1228 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1229 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1230 break;
1231 }
1232 }
1233 assert(i != mr->ioeventfd_nb);
1234 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1235 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1236 --mr->ioeventfd_nb;
1237 mr->ioeventfds = g_realloc(mr->ioeventfds,
1238 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1239 memory_region_update_topology(mr);
1240 }
1241
1242 static void memory_region_add_subregion_common(MemoryRegion *mr,
1243 target_phys_addr_t offset,
1244 MemoryRegion *subregion)
1245 {
1246 MemoryRegion *other;
1247
1248 assert(!subregion->parent);
1249 subregion->parent = mr;
1250 subregion->addr = offset;
1251 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1252 if (subregion->may_overlap || other->may_overlap) {
1253 continue;
1254 }
1255 if (int128_gt(int128_make64(offset),
1256 int128_add(int128_make64(other->addr), other->size))
1257 || int128_le(int128_add(int128_make64(offset), subregion->size),
1258 int128_make64(other->addr))) {
1259 continue;
1260 }
1261 #if 0
1262 printf("warning: subregion collision %llx/%llx (%s) "
1263 "vs %llx/%llx (%s)\n",
1264 (unsigned long long)offset,
1265 (unsigned long long)int128_get64(subregion->size),
1266 subregion->name,
1267 (unsigned long long)other->addr,
1268 (unsigned long long)int128_get64(other->size),
1269 other->name);
1270 #endif
1271 }
1272 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1273 if (subregion->priority >= other->priority) {
1274 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1275 goto done;
1276 }
1277 }
1278 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1279 done:
1280 memory_region_update_topology(mr);
1281 }
1282
1283
1284 void memory_region_add_subregion(MemoryRegion *mr,
1285 target_phys_addr_t offset,
1286 MemoryRegion *subregion)
1287 {
1288 subregion->may_overlap = false;
1289 subregion->priority = 0;
1290 memory_region_add_subregion_common(mr, offset, subregion);
1291 }
1292
1293 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1294 target_phys_addr_t offset,
1295 MemoryRegion *subregion,
1296 unsigned priority)
1297 {
1298 subregion->may_overlap = true;
1299 subregion->priority = priority;
1300 memory_region_add_subregion_common(mr, offset, subregion);
1301 }
1302
1303 void memory_region_del_subregion(MemoryRegion *mr,
1304 MemoryRegion *subregion)
1305 {
1306 assert(subregion->parent == mr);
1307 subregion->parent = NULL;
1308 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1309 memory_region_update_topology(mr);
1310 }
1311
1312 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1313 {
1314 if (enabled == mr->enabled) {
1315 return;
1316 }
1317 mr->enabled = enabled;
1318 memory_region_update_topology(NULL);
1319 }
1320
1321 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1322 {
1323 MemoryRegion *parent = mr->parent;
1324 unsigned priority = mr->priority;
1325 bool may_overlap = mr->may_overlap;
1326
1327 if (addr == mr->addr || !parent) {
1328 mr->addr = addr;
1329 return;
1330 }
1331
1332 memory_region_transaction_begin();
1333 memory_region_del_subregion(parent, mr);
1334 if (may_overlap) {
1335 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1336 } else {
1337 memory_region_add_subregion(parent, addr, mr);
1338 }
1339 memory_region_transaction_commit();
1340 }
1341
1342 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1343 {
1344 target_phys_addr_t old_offset = mr->alias_offset;
1345
1346 assert(mr->alias);
1347 mr->alias_offset = offset;
1348
1349 if (offset == old_offset || !mr->parent) {
1350 return;
1351 }
1352
1353 memory_region_update_topology(mr);
1354 }
1355
1356 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1357 {
1358 return mr->ram_addr;
1359 }
1360
1361 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1362 {
1363 const AddrRange *addr = addr_;
1364 const FlatRange *fr = fr_;
1365
1366 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1367 return -1;
1368 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1369 return 1;
1370 }
1371 return 0;
1372 }
1373
1374 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1375 {
1376 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1377 sizeof(FlatRange), cmp_flatrange_addr);
1378 }
1379
1380 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1381 target_phys_addr_t addr, uint64_t size)
1382 {
1383 AddressSpace *as = memory_region_to_address_space(address_space);
1384 AddrRange range = addrrange_make(int128_make64(addr),
1385 int128_make64(size));
1386 FlatRange *fr = address_space_lookup(as, range);
1387 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1388
1389 if (!fr) {
1390 return ret;
1391 }
1392
1393 while (fr > as->current_map.ranges
1394 && addrrange_intersects(fr[-1].addr, range)) {
1395 --fr;
1396 }
1397
1398 ret.mr = fr->mr;
1399 range = addrrange_intersection(range, fr->addr);
1400 ret.offset_within_region = fr->offset_in_region;
1401 ret.offset_within_region += int128_get64(int128_sub(range.start,
1402 fr->addr.start));
1403 ret.size = int128_get64(range.size);
1404 ret.offset_within_address_space = int128_get64(range.start);
1405 ret.readonly = fr->readonly;
1406 return ret;
1407 }
1408
1409 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1410 {
1411 AddressSpace *as = memory_region_to_address_space(address_space);
1412 FlatRange *fr;
1413
1414 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1415 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1416 }
1417 }
1418
1419 void memory_global_dirty_log_start(void)
1420 {
1421 global_dirty_log = true;
1422 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1423 }
1424
1425 void memory_global_dirty_log_stop(void)
1426 {
1427 global_dirty_log = false;
1428 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1429 }
1430
1431 static void listener_add_address_space(MemoryListener *listener,
1432 AddressSpace *as)
1433 {
1434 FlatRange *fr;
1435
1436 if (global_dirty_log) {
1437 listener->log_global_start(listener);
1438 }
1439 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1440 MemoryRegionSection section = {
1441 .mr = fr->mr,
1442 .address_space = as->root,
1443 .offset_within_region = fr->offset_in_region,
1444 .size = int128_get64(fr->addr.size),
1445 .offset_within_address_space = int128_get64(fr->addr.start),
1446 .readonly = fr->readonly,
1447 };
1448 listener->region_add(listener, &section);
1449 }
1450 }
1451
1452 void memory_listener_register(MemoryListener *listener, MemoryRegion *filter)
1453 {
1454 MemoryListener *other = NULL;
1455
1456 listener->address_space_filter = filter;
1457 if (QTAILQ_EMPTY(&memory_listeners)
1458 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1459 memory_listeners)->priority) {
1460 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1461 } else {
1462 QTAILQ_FOREACH(other, &memory_listeners, link) {
1463 if (listener->priority < other->priority) {
1464 break;
1465 }
1466 }
1467 QTAILQ_INSERT_BEFORE(other, listener, link);
1468 }
1469 listener_add_address_space(listener, &address_space_memory);
1470 listener_add_address_space(listener, &address_space_io);
1471 }
1472
1473 void memory_listener_unregister(MemoryListener *listener)
1474 {
1475 QTAILQ_REMOVE(&memory_listeners, listener, link);
1476 }
1477
1478 void set_system_memory_map(MemoryRegion *mr)
1479 {
1480 address_space_memory.root = mr;
1481 memory_region_update_topology(NULL);
1482 }
1483
1484 void set_system_io_map(MemoryRegion *mr)
1485 {
1486 address_space_io.root = mr;
1487 memory_region_update_topology(NULL);
1488 }
1489
1490 uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size)
1491 {
1492 return memory_region_dispatch_read(io_mem_region[io_index], addr, size);
1493 }
1494
1495 void io_mem_write(int io_index, target_phys_addr_t addr,
1496 uint64_t val, unsigned size)
1497 {
1498 memory_region_dispatch_write(io_mem_region[io_index], addr, val, size);
1499 }
1500
1501 typedef struct MemoryRegionList MemoryRegionList;
1502
1503 struct MemoryRegionList {
1504 const MemoryRegion *mr;
1505 bool printed;
1506 QTAILQ_ENTRY(MemoryRegionList) queue;
1507 };
1508
1509 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1510
1511 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1512 const MemoryRegion *mr, unsigned int level,
1513 target_phys_addr_t base,
1514 MemoryRegionListHead *alias_print_queue)
1515 {
1516 MemoryRegionList *new_ml, *ml, *next_ml;
1517 MemoryRegionListHead submr_print_queue;
1518 const MemoryRegion *submr;
1519 unsigned int i;
1520
1521 if (!mr) {
1522 return;
1523 }
1524
1525 for (i = 0; i < level; i++) {
1526 mon_printf(f, " ");
1527 }
1528
1529 if (mr->alias) {
1530 MemoryRegionList *ml;
1531 bool found = false;
1532
1533 /* check if the alias is already in the queue */
1534 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1535 if (ml->mr == mr->alias && !ml->printed) {
1536 found = true;
1537 }
1538 }
1539
1540 if (!found) {
1541 ml = g_new(MemoryRegionList, 1);
1542 ml->mr = mr->alias;
1543 ml->printed = false;
1544 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1545 }
1546 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1547 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1548 "-" TARGET_FMT_plx "\n",
1549 base + mr->addr,
1550 base + mr->addr
1551 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1552 mr->priority,
1553 mr->readable ? 'R' : '-',
1554 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1555 : '-',
1556 mr->name,
1557 mr->alias->name,
1558 mr->alias_offset,
1559 mr->alias_offset
1560 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1561 } else {
1562 mon_printf(f,
1563 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1564 base + mr->addr,
1565 base + mr->addr
1566 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1567 mr->priority,
1568 mr->readable ? 'R' : '-',
1569 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1570 : '-',
1571 mr->name);
1572 }
1573
1574 QTAILQ_INIT(&submr_print_queue);
1575
1576 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1577 new_ml = g_new(MemoryRegionList, 1);
1578 new_ml->mr = submr;
1579 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1580 if (new_ml->mr->addr < ml->mr->addr ||
1581 (new_ml->mr->addr == ml->mr->addr &&
1582 new_ml->mr->priority > ml->mr->priority)) {
1583 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1584 new_ml = NULL;
1585 break;
1586 }
1587 }
1588 if (new_ml) {
1589 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1590 }
1591 }
1592
1593 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1594 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1595 alias_print_queue);
1596 }
1597
1598 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1599 g_free(ml);
1600 }
1601 }
1602
1603 void mtree_info(fprintf_function mon_printf, void *f)
1604 {
1605 MemoryRegionListHead ml_head;
1606 MemoryRegionList *ml, *ml2;
1607
1608 QTAILQ_INIT(&ml_head);
1609
1610 mon_printf(f, "memory\n");
1611 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1612
1613 /* print aliased regions */
1614 QTAILQ_FOREACH(ml, &ml_head, queue) {
1615 if (!ml->printed) {
1616 mon_printf(f, "%s\n", ml->mr->name);
1617 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1618 }
1619 }
1620
1621 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1622 g_free(ml);
1623 }
1624
1625 if (address_space_io.root &&
1626 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1627 QTAILQ_INIT(&ml_head);
1628 mon_printf(f, "I/O\n");
1629 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1630 }
1631 }
Qemu copy for testing