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memory: drop AddressSpaceOps
[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #define WANT_EXEC_OBSOLETE
24 #include "exec-obsolete.h"
25
26 unsigned memory_region_transaction_depth = 0;
27 static bool memory_region_update_pending = false;
28 static bool global_dirty_log = false;
29
30 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
31 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
32
33 typedef struct AddrRange AddrRange;
34
35 /*
36 * Note using signed integers limits us to physical addresses at most
37 * 63 bits wide. They are needed for negative offsetting in aliases
38 * (large MemoryRegion::alias_offset).
39 */
40 struct AddrRange {
41 Int128 start;
42 Int128 size;
43 };
44
45 static AddrRange addrrange_make(Int128 start, Int128 size)
46 {
47 return (AddrRange) { start, size };
48 }
49
50 static bool addrrange_equal(AddrRange r1, AddrRange r2)
51 {
52 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
53 }
54
55 static Int128 addrrange_end(AddrRange r)
56 {
57 return int128_add(r.start, r.size);
58 }
59
60 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
61 {
62 int128_addto(&range.start, delta);
63 return range;
64 }
65
66 static bool addrrange_contains(AddrRange range, Int128 addr)
67 {
68 return int128_ge(addr, range.start)
69 && int128_lt(addr, addrrange_end(range));
70 }
71
72 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
73 {
74 return addrrange_contains(r1, r2.start)
75 || addrrange_contains(r2, r1.start);
76 }
77
78 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
79 {
80 Int128 start = int128_max(r1.start, r2.start);
81 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
82 return addrrange_make(start, int128_sub(end, start));
83 }
84
85 enum ListenerDirection { Forward, Reverse };
86
87 #define MEMORY_LISTENER_CALL(_callback, _direction, _args...) \
88 do { \
89 MemoryListener *_listener; \
90 \
91 switch (_direction) { \
92 case Forward: \
93 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
94 _listener->_callback(_listener, ##_args); \
95 } \
96 break; \
97 case Reverse: \
98 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
99 memory_listeners, link) { \
100 _listener->_callback(_listener, ##_args); \
101 } \
102 break; \
103 default: \
104 abort(); \
105 } \
106 } while (0)
107
108 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
109 MEMORY_LISTENER_CALL(callback, dir, &(MemoryRegionSection) { \
110 .mr = (fr)->mr, \
111 .address_space = (as)->root, \
112 .offset_within_region = (fr)->offset_in_region, \
113 .size = int128_get64((fr)->addr.size), \
114 .offset_within_address_space = int128_get64((fr)->addr.start), \
115 .readonly = (fr)->readonly, \
116 })
117
118 struct CoalescedMemoryRange {
119 AddrRange addr;
120 QTAILQ_ENTRY(CoalescedMemoryRange) link;
121 };
122
123 struct MemoryRegionIoeventfd {
124 AddrRange addr;
125 bool match_data;
126 uint64_t data;
127 int fd;
128 };
129
130 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
131 MemoryRegionIoeventfd b)
132 {
133 if (int128_lt(a.addr.start, b.addr.start)) {
134 return true;
135 } else if (int128_gt(a.addr.start, b.addr.start)) {
136 return false;
137 } else if (int128_lt(a.addr.size, b.addr.size)) {
138 return true;
139 } else if (int128_gt(a.addr.size, b.addr.size)) {
140 return false;
141 } else if (a.match_data < b.match_data) {
142 return true;
143 } else if (a.match_data > b.match_data) {
144 return false;
145 } else if (a.match_data) {
146 if (a.data < b.data) {
147 return true;
148 } else if (a.data > b.data) {
149 return false;
150 }
151 }
152 if (a.fd < b.fd) {
153 return true;
154 } else if (a.fd > b.fd) {
155 return false;
156 }
157 return false;
158 }
159
160 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
161 MemoryRegionIoeventfd b)
162 {
163 return !memory_region_ioeventfd_before(a, b)
164 && !memory_region_ioeventfd_before(b, a);
165 }
166
167 typedef struct FlatRange FlatRange;
168 typedef struct FlatView FlatView;
169
170 /* Range of memory in the global map. Addresses are absolute. */
171 struct FlatRange {
172 MemoryRegion *mr;
173 target_phys_addr_t offset_in_region;
174 AddrRange addr;
175 uint8_t dirty_log_mask;
176 bool readable;
177 bool readonly;
178 };
179
180 /* Flattened global view of current active memory hierarchy. Kept in sorted
181 * order.
182 */
183 struct FlatView {
184 FlatRange *ranges;
185 unsigned nr;
186 unsigned nr_allocated;
187 };
188
189 typedef struct AddressSpace AddressSpace;
190 typedef struct AddressSpaceOps AddressSpaceOps;
191
192 /* A system address space - I/O, memory, etc. */
193 struct AddressSpace {
194 MemoryRegion *root;
195 FlatView current_map;
196 int ioeventfd_nb;
197 MemoryRegionIoeventfd *ioeventfds;
198 };
199
200 #define FOR_EACH_FLAT_RANGE(var, view) \
201 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
202
203 static bool flatrange_equal(FlatRange *a, FlatRange *b)
204 {
205 return a->mr == b->mr
206 && addrrange_equal(a->addr, b->addr)
207 && a->offset_in_region == b->offset_in_region
208 && a->readable == b->readable
209 && a->readonly == b->readonly;
210 }
211
212 static void flatview_init(FlatView *view)
213 {
214 view->ranges = NULL;
215 view->nr = 0;
216 view->nr_allocated = 0;
217 }
218
219 /* Insert a range into a given position. Caller is responsible for maintaining
220 * sorting order.
221 */
222 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
223 {
224 if (view->nr == view->nr_allocated) {
225 view->nr_allocated = MAX(2 * view->nr, 10);
226 view->ranges = g_realloc(view->ranges,
227 view->nr_allocated * sizeof(*view->ranges));
228 }
229 memmove(view->ranges + pos + 1, view->ranges + pos,
230 (view->nr - pos) * sizeof(FlatRange));
231 view->ranges[pos] = *range;
232 ++view->nr;
233 }
234
235 static void flatview_destroy(FlatView *view)
236 {
237 g_free(view->ranges);
238 }
239
240 static bool can_merge(FlatRange *r1, FlatRange *r2)
241 {
242 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
243 && r1->mr == r2->mr
244 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
245 r1->addr.size),
246 int128_make64(r2->offset_in_region))
247 && r1->dirty_log_mask == r2->dirty_log_mask
248 && r1->readable == r2->readable
249 && r1->readonly == r2->readonly;
250 }
251
252 /* Attempt to simplify a view by merging ajacent ranges */
253 static void flatview_simplify(FlatView *view)
254 {
255 unsigned i, j;
256
257 i = 0;
258 while (i < view->nr) {
259 j = i + 1;
260 while (j < view->nr
261 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
262 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
263 ++j;
264 }
265 ++i;
266 memmove(&view->ranges[i], &view->ranges[j],
267 (view->nr - j) * sizeof(view->ranges[j]));
268 view->nr -= j - i;
269 }
270 }
271
272 static void memory_region_read_accessor(void *opaque,
273 target_phys_addr_t addr,
274 uint64_t *value,
275 unsigned size,
276 unsigned shift,
277 uint64_t mask)
278 {
279 MemoryRegion *mr = opaque;
280 uint64_t tmp;
281
282 tmp = mr->ops->read(mr->opaque, addr, size);
283 *value |= (tmp & mask) << shift;
284 }
285
286 static void memory_region_write_accessor(void *opaque,
287 target_phys_addr_t addr,
288 uint64_t *value,
289 unsigned size,
290 unsigned shift,
291 uint64_t mask)
292 {
293 MemoryRegion *mr = opaque;
294 uint64_t tmp;
295
296 tmp = (*value >> shift) & mask;
297 mr->ops->write(mr->opaque, addr, tmp, size);
298 }
299
300 static void access_with_adjusted_size(target_phys_addr_t addr,
301 uint64_t *value,
302 unsigned size,
303 unsigned access_size_min,
304 unsigned access_size_max,
305 void (*access)(void *opaque,
306 target_phys_addr_t addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask),
311 void *opaque)
312 {
313 uint64_t access_mask;
314 unsigned access_size;
315 unsigned i;
316
317 if (!access_size_min) {
318 access_size_min = 1;
319 }
320 if (!access_size_max) {
321 access_size_max = 4;
322 }
323 access_size = MAX(MIN(size, access_size_max), access_size_min);
324 access_mask = -1ULL >> (64 - access_size * 8);
325 for (i = 0; i < size; i += access_size) {
326 /* FIXME: big-endian support */
327 access(opaque, addr + i, value, access_size, i * 8, access_mask);
328 }
329 }
330
331 static AddressSpace address_space_memory;
332
333 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
334 unsigned width, bool write)
335 {
336 const MemoryRegionPortio *mrp;
337
338 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
339 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
340 && width == mrp->size
341 && (write ? (bool)mrp->write : (bool)mrp->read)) {
342 return mrp;
343 }
344 }
345 return NULL;
346 }
347
348 static void memory_region_iorange_read(IORange *iorange,
349 uint64_t offset,
350 unsigned width,
351 uint64_t *data)
352 {
353 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
354
355 if (mr->ops->old_portio) {
356 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
357
358 *data = ((uint64_t)1 << (width * 8)) - 1;
359 if (mrp) {
360 *data = mrp->read(mr->opaque, offset);
361 } else if (width == 2) {
362 mrp = find_portio(mr, offset, 1, false);
363 assert(mrp);
364 *data = mrp->read(mr->opaque, offset) |
365 (mrp->read(mr->opaque, offset + 1) << 8);
366 }
367 return;
368 }
369 *data = 0;
370 access_with_adjusted_size(offset, data, width,
371 mr->ops->impl.min_access_size,
372 mr->ops->impl.max_access_size,
373 memory_region_read_accessor, mr);
374 }
375
376 static void memory_region_iorange_write(IORange *iorange,
377 uint64_t offset,
378 unsigned width,
379 uint64_t data)
380 {
381 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
382
383 if (mr->ops->old_portio) {
384 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
385
386 if (mrp) {
387 mrp->write(mr->opaque, offset, data);
388 } else if (width == 2) {
389 mrp = find_portio(mr, offset, 1, false);
390 assert(mrp);
391 mrp->write(mr->opaque, offset, data & 0xff);
392 mrp->write(mr->opaque, offset + 1, data >> 8);
393 }
394 return;
395 }
396 access_with_adjusted_size(offset, &data, width,
397 mr->ops->impl.min_access_size,
398 mr->ops->impl.max_access_size,
399 memory_region_write_accessor, mr);
400 }
401
402 const IORangeOps memory_region_iorange_ops = {
403 .read = memory_region_iorange_read,
404 .write = memory_region_iorange_write,
405 };
406
407 static AddressSpace address_space_io;
408
409 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
410 {
411 while (mr->parent) {
412 mr = mr->parent;
413 }
414 if (mr == address_space_memory.root) {
415 return &address_space_memory;
416 }
417 if (mr == address_space_io.root) {
418 return &address_space_io;
419 }
420 abort();
421 }
422
423 /* Render a memory region into the global view. Ranges in @view obscure
424 * ranges in @mr.
425 */
426 static void render_memory_region(FlatView *view,
427 MemoryRegion *mr,
428 Int128 base,
429 AddrRange clip,
430 bool readonly)
431 {
432 MemoryRegion *subregion;
433 unsigned i;
434 target_phys_addr_t offset_in_region;
435 Int128 remain;
436 Int128 now;
437 FlatRange fr;
438 AddrRange tmp;
439
440 if (!mr->enabled) {
441 return;
442 }
443
444 int128_addto(&base, int128_make64(mr->addr));
445 readonly |= mr->readonly;
446
447 tmp = addrrange_make(base, mr->size);
448
449 if (!addrrange_intersects(tmp, clip)) {
450 return;
451 }
452
453 clip = addrrange_intersection(tmp, clip);
454
455 if (mr->alias) {
456 int128_subfrom(&base, int128_make64(mr->alias->addr));
457 int128_subfrom(&base, int128_make64(mr->alias_offset));
458 render_memory_region(view, mr->alias, base, clip, readonly);
459 return;
460 }
461
462 /* Render subregions in priority order. */
463 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
464 render_memory_region(view, subregion, base, clip, readonly);
465 }
466
467 if (!mr->terminates) {
468 return;
469 }
470
471 offset_in_region = int128_get64(int128_sub(clip.start, base));
472 base = clip.start;
473 remain = clip.size;
474
475 /* Render the region itself into any gaps left by the current view. */
476 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
477 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
478 continue;
479 }
480 if (int128_lt(base, view->ranges[i].addr.start)) {
481 now = int128_min(remain,
482 int128_sub(view->ranges[i].addr.start, base));
483 fr.mr = mr;
484 fr.offset_in_region = offset_in_region;
485 fr.addr = addrrange_make(base, now);
486 fr.dirty_log_mask = mr->dirty_log_mask;
487 fr.readable = mr->readable;
488 fr.readonly = readonly;
489 flatview_insert(view, i, &fr);
490 ++i;
491 int128_addto(&base, now);
492 offset_in_region += int128_get64(now);
493 int128_subfrom(&remain, now);
494 }
495 if (int128_eq(base, view->ranges[i].addr.start)) {
496 now = int128_min(remain, view->ranges[i].addr.size);
497 int128_addto(&base, now);
498 offset_in_region += int128_get64(now);
499 int128_subfrom(&remain, now);
500 }
501 }
502 if (int128_nz(remain)) {
503 fr.mr = mr;
504 fr.offset_in_region = offset_in_region;
505 fr.addr = addrrange_make(base, remain);
506 fr.dirty_log_mask = mr->dirty_log_mask;
507 fr.readable = mr->readable;
508 fr.readonly = readonly;
509 flatview_insert(view, i, &fr);
510 }
511 }
512
513 /* Render a memory topology into a list of disjoint absolute ranges. */
514 static FlatView generate_memory_topology(MemoryRegion *mr)
515 {
516 FlatView view;
517
518 flatview_init(&view);
519
520 render_memory_region(&view, mr, int128_zero(),
521 addrrange_make(int128_zero(), int128_2_64()), false);
522 flatview_simplify(&view);
523
524 return view;
525 }
526
527 static void address_space_add_del_ioeventfds(AddressSpace *as,
528 MemoryRegionIoeventfd *fds_new,
529 unsigned fds_new_nb,
530 MemoryRegionIoeventfd *fds_old,
531 unsigned fds_old_nb)
532 {
533 unsigned iold, inew;
534 MemoryRegionIoeventfd *fd;
535 MemoryRegionSection section;
536
537 /* Generate a symmetric difference of the old and new fd sets, adding
538 * and deleting as necessary.
539 */
540
541 iold = inew = 0;
542 while (iold < fds_old_nb || inew < fds_new_nb) {
543 if (iold < fds_old_nb
544 && (inew == fds_new_nb
545 || memory_region_ioeventfd_before(fds_old[iold],
546 fds_new[inew]))) {
547 fd = &fds_old[iold];
548 section = (MemoryRegionSection) {
549 .address_space = as->root,
550 .offset_within_address_space = int128_get64(fd->addr.start),
551 .size = int128_get64(fd->addr.size),
552 };
553 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
554 fd->match_data, fd->data, fd->fd);
555 ++iold;
556 } else if (inew < fds_new_nb
557 && (iold == fds_old_nb
558 || memory_region_ioeventfd_before(fds_new[inew],
559 fds_old[iold]))) {
560 fd = &fds_new[inew];
561 section = (MemoryRegionSection) {
562 .address_space = as->root,
563 .offset_within_address_space = int128_get64(fd->addr.start),
564 .size = int128_get64(fd->addr.size),
565 };
566 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
567 fd->match_data, fd->data, fd->fd);
568 ++inew;
569 } else {
570 ++iold;
571 ++inew;
572 }
573 }
574 }
575
576 static void address_space_update_ioeventfds(AddressSpace *as)
577 {
578 FlatRange *fr;
579 unsigned ioeventfd_nb = 0;
580 MemoryRegionIoeventfd *ioeventfds = NULL;
581 AddrRange tmp;
582 unsigned i;
583
584 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
585 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
586 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
587 int128_sub(fr->addr.start,
588 int128_make64(fr->offset_in_region)));
589 if (addrrange_intersects(fr->addr, tmp)) {
590 ++ioeventfd_nb;
591 ioeventfds = g_realloc(ioeventfds,
592 ioeventfd_nb * sizeof(*ioeventfds));
593 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
594 ioeventfds[ioeventfd_nb-1].addr = tmp;
595 }
596 }
597 }
598
599 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
600 as->ioeventfds, as->ioeventfd_nb);
601
602 g_free(as->ioeventfds);
603 as->ioeventfds = ioeventfds;
604 as->ioeventfd_nb = ioeventfd_nb;
605 }
606
607 static void address_space_update_topology_pass(AddressSpace *as,
608 FlatView old_view,
609 FlatView new_view,
610 bool adding)
611 {
612 unsigned iold, inew;
613 FlatRange *frold, *frnew;
614
615 /* Generate a symmetric difference of the old and new memory maps.
616 * Kill ranges in the old map, and instantiate ranges in the new map.
617 */
618 iold = inew = 0;
619 while (iold < old_view.nr || inew < new_view.nr) {
620 if (iold < old_view.nr) {
621 frold = &old_view.ranges[iold];
622 } else {
623 frold = NULL;
624 }
625 if (inew < new_view.nr) {
626 frnew = &new_view.ranges[inew];
627 } else {
628 frnew = NULL;
629 }
630
631 if (frold
632 && (!frnew
633 || int128_lt(frold->addr.start, frnew->addr.start)
634 || (int128_eq(frold->addr.start, frnew->addr.start)
635 && !flatrange_equal(frold, frnew)))) {
636 /* In old, but (not in new, or in new but attributes changed). */
637
638 if (!adding) {
639 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
640 }
641
642 ++iold;
643 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
644 /* In both (logging may have changed) */
645
646 if (adding) {
647 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
648 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
649 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
650 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
651 }
652 }
653
654 ++iold;
655 ++inew;
656 } else {
657 /* In new */
658
659 if (adding) {
660 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
661 }
662
663 ++inew;
664 }
665 }
666 }
667
668
669 static void address_space_update_topology(AddressSpace *as)
670 {
671 FlatView old_view = as->current_map;
672 FlatView new_view = generate_memory_topology(as->root);
673
674 address_space_update_topology_pass(as, old_view, new_view, false);
675 address_space_update_topology_pass(as, old_view, new_view, true);
676
677 as->current_map = new_view;
678 flatview_destroy(&old_view);
679 address_space_update_ioeventfds(as);
680 }
681
682 static void memory_region_update_topology(MemoryRegion *mr)
683 {
684 if (memory_region_transaction_depth) {
685 memory_region_update_pending |= !mr || mr->enabled;
686 return;
687 }
688
689 if (mr && !mr->enabled) {
690 return;
691 }
692
693 if (address_space_memory.root) {
694 address_space_update_topology(&address_space_memory);
695 }
696 if (address_space_io.root) {
697 address_space_update_topology(&address_space_io);
698 }
699
700 memory_region_update_pending = false;
701 }
702
703 void memory_region_transaction_begin(void)
704 {
705 ++memory_region_transaction_depth;
706 }
707
708 void memory_region_transaction_commit(void)
709 {
710 assert(memory_region_transaction_depth);
711 --memory_region_transaction_depth;
712 if (!memory_region_transaction_depth && memory_region_update_pending) {
713 memory_region_update_topology(NULL);
714 }
715 }
716
717 static void memory_region_destructor_none(MemoryRegion *mr)
718 {
719 }
720
721 static void memory_region_destructor_ram(MemoryRegion *mr)
722 {
723 qemu_ram_free(mr->ram_addr);
724 }
725
726 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
727 {
728 qemu_ram_free_from_ptr(mr->ram_addr);
729 }
730
731 static void memory_region_destructor_iomem(MemoryRegion *mr)
732 {
733 cpu_unregister_io_memory(mr->ram_addr);
734 }
735
736 static void memory_region_destructor_rom_device(MemoryRegion *mr)
737 {
738 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
739 cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK);
740 }
741
742 static bool memory_region_wrong_endianness(MemoryRegion *mr)
743 {
744 #ifdef TARGET_WORDS_BIGENDIAN
745 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
746 #else
747 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
748 #endif
749 }
750
751 void memory_region_init(MemoryRegion *mr,
752 const char *name,
753 uint64_t size)
754 {
755 mr->ops = NULL;
756 mr->parent = NULL;
757 mr->size = int128_make64(size);
758 if (size == UINT64_MAX) {
759 mr->size = int128_2_64();
760 }
761 mr->addr = 0;
762 mr->subpage = false;
763 mr->enabled = true;
764 mr->terminates = false;
765 mr->ram = false;
766 mr->readable = true;
767 mr->readonly = false;
768 mr->rom_device = false;
769 mr->destructor = memory_region_destructor_none;
770 mr->priority = 0;
771 mr->may_overlap = false;
772 mr->alias = NULL;
773 QTAILQ_INIT(&mr->subregions);
774 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
775 QTAILQ_INIT(&mr->coalesced);
776 mr->name = g_strdup(name);
777 mr->dirty_log_mask = 0;
778 mr->ioeventfd_nb = 0;
779 mr->ioeventfds = NULL;
780 }
781
782 static bool memory_region_access_valid(MemoryRegion *mr,
783 target_phys_addr_t addr,
784 unsigned size,
785 bool is_write)
786 {
787 if (mr->ops->valid.accepts
788 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
789 return false;
790 }
791
792 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
793 return false;
794 }
795
796 /* Treat zero as compatibility all valid */
797 if (!mr->ops->valid.max_access_size) {
798 return true;
799 }
800
801 if (size > mr->ops->valid.max_access_size
802 || size < mr->ops->valid.min_access_size) {
803 return false;
804 }
805 return true;
806 }
807
808 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
809 target_phys_addr_t addr,
810 unsigned size)
811 {
812 uint64_t data = 0;
813
814 if (!memory_region_access_valid(mr, addr, size, false)) {
815 return -1U; /* FIXME: better signalling */
816 }
817
818 if (!mr->ops->read) {
819 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
820 }
821
822 /* FIXME: support unaligned access */
823 access_with_adjusted_size(addr, &data, size,
824 mr->ops->impl.min_access_size,
825 mr->ops->impl.max_access_size,
826 memory_region_read_accessor, mr);
827
828 return data;
829 }
830
831 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
832 {
833 if (memory_region_wrong_endianness(mr)) {
834 switch (size) {
835 case 1:
836 break;
837 case 2:
838 *data = bswap16(*data);
839 break;
840 case 4:
841 *data = bswap32(*data);
842 break;
843 default:
844 abort();
845 }
846 }
847 }
848
849 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
850 target_phys_addr_t addr,
851 unsigned size)
852 {
853 uint64_t ret;
854
855 ret = memory_region_dispatch_read1(mr, addr, size);
856 adjust_endianness(mr, &ret, size);
857 return ret;
858 }
859
860 static void memory_region_dispatch_write(MemoryRegion *mr,
861 target_phys_addr_t addr,
862 uint64_t data,
863 unsigned size)
864 {
865 if (!memory_region_access_valid(mr, addr, size, true)) {
866 return; /* FIXME: better signalling */
867 }
868
869 adjust_endianness(mr, &data, size);
870
871 if (!mr->ops->write) {
872 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
873 return;
874 }
875
876 /* FIXME: support unaligned access */
877 access_with_adjusted_size(addr, &data, size,
878 mr->ops->impl.min_access_size,
879 mr->ops->impl.max_access_size,
880 memory_region_write_accessor, mr);
881 }
882
883 void memory_region_init_io(MemoryRegion *mr,
884 const MemoryRegionOps *ops,
885 void *opaque,
886 const char *name,
887 uint64_t size)
888 {
889 memory_region_init(mr, name, size);
890 mr->ops = ops;
891 mr->opaque = opaque;
892 mr->terminates = true;
893 mr->destructor = memory_region_destructor_iomem;
894 mr->ram_addr = cpu_register_io_memory(mr);
895 }
896
897 void memory_region_init_ram(MemoryRegion *mr,
898 const char *name,
899 uint64_t size)
900 {
901 memory_region_init(mr, name, size);
902 mr->ram = true;
903 mr->terminates = true;
904 mr->destructor = memory_region_destructor_ram;
905 mr->ram_addr = qemu_ram_alloc(size, mr);
906 }
907
908 void memory_region_init_ram_ptr(MemoryRegion *mr,
909 const char *name,
910 uint64_t size,
911 void *ptr)
912 {
913 memory_region_init(mr, name, size);
914 mr->ram = true;
915 mr->terminates = true;
916 mr->destructor = memory_region_destructor_ram_from_ptr;
917 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
918 }
919
920 void memory_region_init_alias(MemoryRegion *mr,
921 const char *name,
922 MemoryRegion *orig,
923 target_phys_addr_t offset,
924 uint64_t size)
925 {
926 memory_region_init(mr, name, size);
927 mr->alias = orig;
928 mr->alias_offset = offset;
929 }
930
931 void memory_region_init_rom_device(MemoryRegion *mr,
932 const MemoryRegionOps *ops,
933 void *opaque,
934 const char *name,
935 uint64_t size)
936 {
937 memory_region_init(mr, name, size);
938 mr->ops = ops;
939 mr->opaque = opaque;
940 mr->terminates = true;
941 mr->rom_device = true;
942 mr->destructor = memory_region_destructor_rom_device;
943 mr->ram_addr = qemu_ram_alloc(size, mr);
944 mr->ram_addr |= cpu_register_io_memory(mr);
945 }
946
947 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
948 unsigned size)
949 {
950 MemoryRegion *mr = opaque;
951
952 if (!mr->warning_printed) {
953 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
954 mr->warning_printed = true;
955 }
956 return -1U;
957 }
958
959 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
960 unsigned size)
961 {
962 MemoryRegion *mr = opaque;
963
964 if (!mr->warning_printed) {
965 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
966 mr->warning_printed = true;
967 }
968 }
969
970 static const MemoryRegionOps reservation_ops = {
971 .read = invalid_read,
972 .write = invalid_write,
973 .endianness = DEVICE_NATIVE_ENDIAN,
974 };
975
976 void memory_region_init_reservation(MemoryRegion *mr,
977 const char *name,
978 uint64_t size)
979 {
980 memory_region_init_io(mr, &reservation_ops, mr, name, size);
981 }
982
983 void memory_region_destroy(MemoryRegion *mr)
984 {
985 assert(QTAILQ_EMPTY(&mr->subregions));
986 mr->destructor(mr);
987 memory_region_clear_coalescing(mr);
988 g_free((char *)mr->name);
989 g_free(mr->ioeventfds);
990 }
991
992 uint64_t memory_region_size(MemoryRegion *mr)
993 {
994 if (int128_eq(mr->size, int128_2_64())) {
995 return UINT64_MAX;
996 }
997 return int128_get64(mr->size);
998 }
999
1000 const char *memory_region_name(MemoryRegion *mr)
1001 {
1002 return mr->name;
1003 }
1004
1005 bool memory_region_is_ram(MemoryRegion *mr)
1006 {
1007 return mr->ram;
1008 }
1009
1010 bool memory_region_is_logging(MemoryRegion *mr)
1011 {
1012 return mr->dirty_log_mask;
1013 }
1014
1015 bool memory_region_is_rom(MemoryRegion *mr)
1016 {
1017 return mr->ram && mr->readonly;
1018 }
1019
1020 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1021 {
1022 uint8_t mask = 1 << client;
1023
1024 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1025 memory_region_update_topology(mr);
1026 }
1027
1028 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1029 target_phys_addr_t size, unsigned client)
1030 {
1031 assert(mr->terminates);
1032 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1033 1 << client);
1034 }
1035
1036 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1037 target_phys_addr_t size)
1038 {
1039 assert(mr->terminates);
1040 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1041 }
1042
1043 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1044 {
1045 FlatRange *fr;
1046
1047 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1048 if (fr->mr == mr) {
1049 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory,
1050 Forward, log_sync);
1051 }
1052 }
1053 }
1054
1055 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1056 {
1057 if (mr->readonly != readonly) {
1058 mr->readonly = readonly;
1059 memory_region_update_topology(mr);
1060 }
1061 }
1062
1063 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1064 {
1065 if (mr->readable != readable) {
1066 mr->readable = readable;
1067 memory_region_update_topology(mr);
1068 }
1069 }
1070
1071 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1072 target_phys_addr_t size, unsigned client)
1073 {
1074 assert(mr->terminates);
1075 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1076 mr->ram_addr + addr + size,
1077 1 << client);
1078 }
1079
1080 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1081 {
1082 if (mr->alias) {
1083 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1084 }
1085
1086 assert(mr->terminates);
1087
1088 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1089 }
1090
1091 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1092 {
1093 FlatRange *fr;
1094 CoalescedMemoryRange *cmr;
1095 AddrRange tmp;
1096
1097 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1098 if (fr->mr == mr) {
1099 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1100 int128_get64(fr->addr.size));
1101 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1102 tmp = addrrange_shift(cmr->addr,
1103 int128_sub(fr->addr.start,
1104 int128_make64(fr->offset_in_region)));
1105 if (!addrrange_intersects(tmp, fr->addr)) {
1106 continue;
1107 }
1108 tmp = addrrange_intersection(tmp, fr->addr);
1109 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1110 int128_get64(tmp.size));
1111 }
1112 }
1113 }
1114 }
1115
1116 void memory_region_set_coalescing(MemoryRegion *mr)
1117 {
1118 memory_region_clear_coalescing(mr);
1119 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1120 }
1121
1122 void memory_region_add_coalescing(MemoryRegion *mr,
1123 target_phys_addr_t offset,
1124 uint64_t size)
1125 {
1126 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1127
1128 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1129 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1130 memory_region_update_coalesced_range(mr);
1131 }
1132
1133 void memory_region_clear_coalescing(MemoryRegion *mr)
1134 {
1135 CoalescedMemoryRange *cmr;
1136
1137 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1138 cmr = QTAILQ_FIRST(&mr->coalesced);
1139 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1140 g_free(cmr);
1141 }
1142 memory_region_update_coalesced_range(mr);
1143 }
1144
1145 void memory_region_add_eventfd(MemoryRegion *mr,
1146 target_phys_addr_t addr,
1147 unsigned size,
1148 bool match_data,
1149 uint64_t data,
1150 int fd)
1151 {
1152 MemoryRegionIoeventfd mrfd = {
1153 .addr.start = int128_make64(addr),
1154 .addr.size = int128_make64(size),
1155 .match_data = match_data,
1156 .data = data,
1157 .fd = fd,
1158 };
1159 unsigned i;
1160
1161 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1162 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1163 break;
1164 }
1165 }
1166 ++mr->ioeventfd_nb;
1167 mr->ioeventfds = g_realloc(mr->ioeventfds,
1168 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1169 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1170 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1171 mr->ioeventfds[i] = mrfd;
1172 memory_region_update_topology(mr);
1173 }
1174
1175 void memory_region_del_eventfd(MemoryRegion *mr,
1176 target_phys_addr_t addr,
1177 unsigned size,
1178 bool match_data,
1179 uint64_t data,
1180 int fd)
1181 {
1182 MemoryRegionIoeventfd mrfd = {
1183 .addr.start = int128_make64(addr),
1184 .addr.size = int128_make64(size),
1185 .match_data = match_data,
1186 .data = data,
1187 .fd = fd,
1188 };
1189 unsigned i;
1190
1191 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1192 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1193 break;
1194 }
1195 }
1196 assert(i != mr->ioeventfd_nb);
1197 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1198 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1199 --mr->ioeventfd_nb;
1200 mr->ioeventfds = g_realloc(mr->ioeventfds,
1201 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1202 memory_region_update_topology(mr);
1203 }
1204
1205 static void memory_region_add_subregion_common(MemoryRegion *mr,
1206 target_phys_addr_t offset,
1207 MemoryRegion *subregion)
1208 {
1209 MemoryRegion *other;
1210
1211 assert(!subregion->parent);
1212 subregion->parent = mr;
1213 subregion->addr = offset;
1214 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1215 if (subregion->may_overlap || other->may_overlap) {
1216 continue;
1217 }
1218 if (int128_gt(int128_make64(offset),
1219 int128_add(int128_make64(other->addr), other->size))
1220 || int128_le(int128_add(int128_make64(offset), subregion->size),
1221 int128_make64(other->addr))) {
1222 continue;
1223 }
1224 #if 0
1225 printf("warning: subregion collision %llx/%llx (%s) "
1226 "vs %llx/%llx (%s)\n",
1227 (unsigned long long)offset,
1228 (unsigned long long)int128_get64(subregion->size),
1229 subregion->name,
1230 (unsigned long long)other->addr,
1231 (unsigned long long)int128_get64(other->size),
1232 other->name);
1233 #endif
1234 }
1235 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1236 if (subregion->priority >= other->priority) {
1237 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1238 goto done;
1239 }
1240 }
1241 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1242 done:
1243 memory_region_update_topology(mr);
1244 }
1245
1246
1247 void memory_region_add_subregion(MemoryRegion *mr,
1248 target_phys_addr_t offset,
1249 MemoryRegion *subregion)
1250 {
1251 subregion->may_overlap = false;
1252 subregion->priority = 0;
1253 memory_region_add_subregion_common(mr, offset, subregion);
1254 }
1255
1256 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1257 target_phys_addr_t offset,
1258 MemoryRegion *subregion,
1259 unsigned priority)
1260 {
1261 subregion->may_overlap = true;
1262 subregion->priority = priority;
1263 memory_region_add_subregion_common(mr, offset, subregion);
1264 }
1265
1266 void memory_region_del_subregion(MemoryRegion *mr,
1267 MemoryRegion *subregion)
1268 {
1269 assert(subregion->parent == mr);
1270 subregion->parent = NULL;
1271 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1272 memory_region_update_topology(mr);
1273 }
1274
1275 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1276 {
1277 if (enabled == mr->enabled) {
1278 return;
1279 }
1280 mr->enabled = enabled;
1281 memory_region_update_topology(NULL);
1282 }
1283
1284 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1285 {
1286 MemoryRegion *parent = mr->parent;
1287 unsigned priority = mr->priority;
1288 bool may_overlap = mr->may_overlap;
1289
1290 if (addr == mr->addr || !parent) {
1291 mr->addr = addr;
1292 return;
1293 }
1294
1295 memory_region_transaction_begin();
1296 memory_region_del_subregion(parent, mr);
1297 if (may_overlap) {
1298 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1299 } else {
1300 memory_region_add_subregion(parent, addr, mr);
1301 }
1302 memory_region_transaction_commit();
1303 }
1304
1305 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1306 {
1307 target_phys_addr_t old_offset = mr->alias_offset;
1308
1309 assert(mr->alias);
1310 mr->alias_offset = offset;
1311
1312 if (offset == old_offset || !mr->parent) {
1313 return;
1314 }
1315
1316 memory_region_update_topology(mr);
1317 }
1318
1319 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1320 {
1321 return mr->ram_addr;
1322 }
1323
1324 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1325 {
1326 const AddrRange *addr = addr_;
1327 const FlatRange *fr = fr_;
1328
1329 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1330 return -1;
1331 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1332 return 1;
1333 }
1334 return 0;
1335 }
1336
1337 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1338 {
1339 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1340 sizeof(FlatRange), cmp_flatrange_addr);
1341 }
1342
1343 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1344 target_phys_addr_t addr, uint64_t size)
1345 {
1346 AddressSpace *as = memory_region_to_address_space(address_space);
1347 AddrRange range = addrrange_make(int128_make64(addr),
1348 int128_make64(size));
1349 FlatRange *fr = address_space_lookup(as, range);
1350 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1351
1352 if (!fr) {
1353 return ret;
1354 }
1355
1356 while (fr > as->current_map.ranges
1357 && addrrange_intersects(fr[-1].addr, range)) {
1358 --fr;
1359 }
1360
1361 ret.mr = fr->mr;
1362 range = addrrange_intersection(range, fr->addr);
1363 ret.offset_within_region = fr->offset_in_region;
1364 ret.offset_within_region += int128_get64(int128_sub(range.start,
1365 fr->addr.start));
1366 ret.size = int128_get64(range.size);
1367 ret.offset_within_address_space = int128_get64(range.start);
1368 ret.readonly = fr->readonly;
1369 return ret;
1370 }
1371
1372 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1373 {
1374 AddressSpace *as = memory_region_to_address_space(address_space);
1375 FlatRange *fr;
1376
1377 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1378 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1379 }
1380 }
1381
1382 void memory_global_dirty_log_start(void)
1383 {
1384 global_dirty_log = true;
1385 MEMORY_LISTENER_CALL(log_global_start, Forward);
1386 }
1387
1388 void memory_global_dirty_log_stop(void)
1389 {
1390 global_dirty_log = false;
1391 MEMORY_LISTENER_CALL(log_global_stop, Reverse);
1392 }
1393
1394 static void listener_add_address_space(MemoryListener *listener,
1395 AddressSpace *as)
1396 {
1397 FlatRange *fr;
1398
1399 if (global_dirty_log) {
1400 listener->log_global_start(listener);
1401 }
1402 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1403 MemoryRegionSection section = {
1404 .mr = fr->mr,
1405 .address_space = as->root,
1406 .offset_within_region = fr->offset_in_region,
1407 .size = int128_get64(fr->addr.size),
1408 .offset_within_address_space = int128_get64(fr->addr.start),
1409 .readonly = fr->readonly,
1410 };
1411 listener->region_add(listener, &section);
1412 }
1413 }
1414
1415 void memory_listener_register(MemoryListener *listener)
1416 {
1417 MemoryListener *other = NULL;
1418
1419 if (QTAILQ_EMPTY(&memory_listeners)
1420 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1421 memory_listeners)->priority) {
1422 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1423 } else {
1424 QTAILQ_FOREACH(other, &memory_listeners, link) {
1425 if (listener->priority < other->priority) {
1426 break;
1427 }
1428 }
1429 QTAILQ_INSERT_BEFORE(other, listener, link);
1430 }
1431 listener_add_address_space(listener, &address_space_memory);
1432 listener_add_address_space(listener, &address_space_io);
1433 }
1434
1435 void memory_listener_unregister(MemoryListener *listener)
1436 {
1437 QTAILQ_REMOVE(&memory_listeners, listener, link);
1438 }
1439
1440 void set_system_memory_map(MemoryRegion *mr)
1441 {
1442 address_space_memory.root = mr;
1443 memory_region_update_topology(NULL);
1444 }
1445
1446 void set_system_io_map(MemoryRegion *mr)
1447 {
1448 address_space_io.root = mr;
1449 memory_region_update_topology(NULL);
1450 }
1451
1452 uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size)
1453 {
1454 return memory_region_dispatch_read(io_mem_region[io_index], addr, size);
1455 }
1456
1457 void io_mem_write(int io_index, target_phys_addr_t addr,
1458 uint64_t val, unsigned size)
1459 {
1460 memory_region_dispatch_write(io_mem_region[io_index], addr, val, size);
1461 }
1462
1463 typedef struct MemoryRegionList MemoryRegionList;
1464
1465 struct MemoryRegionList {
1466 const MemoryRegion *mr;
1467 bool printed;
1468 QTAILQ_ENTRY(MemoryRegionList) queue;
1469 };
1470
1471 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1472
1473 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1474 const MemoryRegion *mr, unsigned int level,
1475 target_phys_addr_t base,
1476 MemoryRegionListHead *alias_print_queue)
1477 {
1478 MemoryRegionList *new_ml, *ml, *next_ml;
1479 MemoryRegionListHead submr_print_queue;
1480 const MemoryRegion *submr;
1481 unsigned int i;
1482
1483 if (!mr) {
1484 return;
1485 }
1486
1487 for (i = 0; i < level; i++) {
1488 mon_printf(f, " ");
1489 }
1490
1491 if (mr->alias) {
1492 MemoryRegionList *ml;
1493 bool found = false;
1494
1495 /* check if the alias is already in the queue */
1496 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1497 if (ml->mr == mr->alias && !ml->printed) {
1498 found = true;
1499 }
1500 }
1501
1502 if (!found) {
1503 ml = g_new(MemoryRegionList, 1);
1504 ml->mr = mr->alias;
1505 ml->printed = false;
1506 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1507 }
1508 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1509 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1510 "-" TARGET_FMT_plx "\n",
1511 base + mr->addr,
1512 base + mr->addr
1513 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1514 mr->priority,
1515 mr->readable ? 'R' : '-',
1516 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1517 : '-',
1518 mr->name,
1519 mr->alias->name,
1520 mr->alias_offset,
1521 mr->alias_offset
1522 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1523 } else {
1524 mon_printf(f,
1525 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1526 base + mr->addr,
1527 base + mr->addr
1528 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1529 mr->priority,
1530 mr->readable ? 'R' : '-',
1531 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1532 : '-',
1533 mr->name);
1534 }
1535
1536 QTAILQ_INIT(&submr_print_queue);
1537
1538 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1539 new_ml = g_new(MemoryRegionList, 1);
1540 new_ml->mr = submr;
1541 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1542 if (new_ml->mr->addr < ml->mr->addr ||
1543 (new_ml->mr->addr == ml->mr->addr &&
1544 new_ml->mr->priority > ml->mr->priority)) {
1545 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1546 new_ml = NULL;
1547 break;
1548 }
1549 }
1550 if (new_ml) {
1551 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1552 }
1553 }
1554
1555 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1556 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1557 alias_print_queue);
1558 }
1559
1560 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1561 g_free(ml);
1562 }
1563 }
1564
1565 void mtree_info(fprintf_function mon_printf, void *f)
1566 {
1567 MemoryRegionListHead ml_head;
1568 MemoryRegionList *ml, *ml2;
1569
1570 QTAILQ_INIT(&ml_head);
1571
1572 mon_printf(f, "memory\n");
1573 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1574
1575 /* print aliased regions */
1576 QTAILQ_FOREACH(ml, &ml_head, queue) {
1577 if (!ml->printed) {
1578 mon_printf(f, "%s\n", ml->mr->name);
1579 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1580 }
1581 }
1582
1583 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1584 g_free(ml);
1585 }
1586
1587 if (address_space_io.root &&
1588 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1589 QTAILQ_INIT(&ml_head);
1590 mon_printf(f, "I/O\n");
1591 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1592 }
1593 }
Qemu copy for testing