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ioport: Switch dispatching to memory core layer
[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "sysemu/kvm.h"
21 #include <assert.h>
22
23 #include "exec/memory-internal.h"
24
25 //#define DEBUG_UNASSIGNED
26
27 static unsigned memory_region_transaction_depth;
28 static bool memory_region_update_pending;
29 static bool global_dirty_log = false;
30
31 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
32 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
33
34 static QTAILQ_HEAD(, AddressSpace) address_spaces
35 = QTAILQ_HEAD_INITIALIZER(address_spaces);
36
37 typedef struct AddrRange AddrRange;
38
39 /*
40 * Note using signed integers limits us to physical addresses at most
41 * 63 bits wide. They are needed for negative offsetting in aliases
42 * (large MemoryRegion::alias_offset).
43 */
44 struct AddrRange {
45 Int128 start;
46 Int128 size;
47 };
48
49 static AddrRange addrrange_make(Int128 start, Int128 size)
50 {
51 return (AddrRange) { start, size };
52 }
53
54 static bool addrrange_equal(AddrRange r1, AddrRange r2)
55 {
56 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
57 }
58
59 static Int128 addrrange_end(AddrRange r)
60 {
61 return int128_add(r.start, r.size);
62 }
63
64 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
65 {
66 int128_addto(&range.start, delta);
67 return range;
68 }
69
70 static bool addrrange_contains(AddrRange range, Int128 addr)
71 {
72 return int128_ge(addr, range.start)
73 && int128_lt(addr, addrrange_end(range));
74 }
75
76 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
77 {
78 return addrrange_contains(r1, r2.start)
79 || addrrange_contains(r2, r1.start);
80 }
81
82 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
83 {
84 Int128 start = int128_max(r1.start, r2.start);
85 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
86 return addrrange_make(start, int128_sub(end, start));
87 }
88
89 enum ListenerDirection { Forward, Reverse };
90
91 static bool memory_listener_match(MemoryListener *listener,
92 MemoryRegionSection *section)
93 {
94 return !listener->address_space_filter
95 || listener->address_space_filter == section->address_space;
96 }
97
98 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
99 do { \
100 MemoryListener *_listener; \
101 \
102 switch (_direction) { \
103 case Forward: \
104 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
105 if (_listener->_callback) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
108 } \
109 break; \
110 case Reverse: \
111 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
112 memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 default: \
119 abort(); \
120 } \
121 } while (0)
122
123 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
124 do { \
125 MemoryListener *_listener; \
126 \
127 switch (_direction) { \
128 case Forward: \
129 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
130 if (_listener->_callback \
131 && memory_listener_match(_listener, _section)) { \
132 _listener->_callback(_listener, _section, ##_args); \
133 } \
134 } \
135 break; \
136 case Reverse: \
137 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
138 memory_listeners, link) { \
139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 default: \
146 abort(); \
147 } \
148 } while (0)
149
150 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
151 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
152 .mr = (fr)->mr, \
153 .address_space = (as), \
154 .offset_within_region = (fr)->offset_in_region, \
155 .size = (fr)->addr.size, \
156 .offset_within_address_space = int128_get64((fr)->addr.start), \
157 .readonly = (fr)->readonly, \
158 }))
159
160 struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163 };
164
165 struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
169 EventNotifier *e;
170 };
171
172 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
173 MemoryRegionIoeventfd b)
174 {
175 if (int128_lt(a.addr.start, b.addr.start)) {
176 return true;
177 } else if (int128_gt(a.addr.start, b.addr.start)) {
178 return false;
179 } else if (int128_lt(a.addr.size, b.addr.size)) {
180 return true;
181 } else if (int128_gt(a.addr.size, b.addr.size)) {
182 return false;
183 } else if (a.match_data < b.match_data) {
184 return true;
185 } else if (a.match_data > b.match_data) {
186 return false;
187 } else if (a.match_data) {
188 if (a.data < b.data) {
189 return true;
190 } else if (a.data > b.data) {
191 return false;
192 }
193 }
194 if (a.e < b.e) {
195 return true;
196 } else if (a.e > b.e) {
197 return false;
198 }
199 return false;
200 }
201
202 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
203 MemoryRegionIoeventfd b)
204 {
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207 }
208
209 typedef struct FlatRange FlatRange;
210 typedef struct FlatView FlatView;
211
212 /* Range of memory in the global map. Addresses are absolute. */
213 struct FlatRange {
214 MemoryRegion *mr;
215 hwaddr offset_in_region;
216 AddrRange addr;
217 uint8_t dirty_log_mask;
218 bool romd_mode;
219 bool readonly;
220 };
221
222 /* Flattened global view of current active memory hierarchy. Kept in sorted
223 * order.
224 */
225 struct FlatView {
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229 };
230
231 typedef struct AddressSpaceOps AddressSpaceOps;
232
233 #define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
236 static bool flatrange_equal(FlatRange *a, FlatRange *b)
237 {
238 return a->mr == b->mr
239 && addrrange_equal(a->addr, b->addr)
240 && a->offset_in_region == b->offset_in_region
241 && a->romd_mode == b->romd_mode
242 && a->readonly == b->readonly;
243 }
244
245 static void flatview_init(FlatView *view)
246 {
247 view->ranges = NULL;
248 view->nr = 0;
249 view->nr_allocated = 0;
250 }
251
252 /* Insert a range into a given position. Caller is responsible for maintaining
253 * sorting order.
254 */
255 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
256 {
257 if (view->nr == view->nr_allocated) {
258 view->nr_allocated = MAX(2 * view->nr, 10);
259 view->ranges = g_realloc(view->ranges,
260 view->nr_allocated * sizeof(*view->ranges));
261 }
262 memmove(view->ranges + pos + 1, view->ranges + pos,
263 (view->nr - pos) * sizeof(FlatRange));
264 view->ranges[pos] = *range;
265 ++view->nr;
266 }
267
268 static void flatview_destroy(FlatView *view)
269 {
270 g_free(view->ranges);
271 }
272
273 static bool can_merge(FlatRange *r1, FlatRange *r2)
274 {
275 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
276 && r1->mr == r2->mr
277 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
278 r1->addr.size),
279 int128_make64(r2->offset_in_region))
280 && r1->dirty_log_mask == r2->dirty_log_mask
281 && r1->romd_mode == r2->romd_mode
282 && r1->readonly == r2->readonly;
283 }
284
285 /* Attempt to simplify a view by merging adjacent ranges */
286 static void flatview_simplify(FlatView *view)
287 {
288 unsigned i, j;
289
290 i = 0;
291 while (i < view->nr) {
292 j = i + 1;
293 while (j < view->nr
294 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
295 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
296 ++j;
297 }
298 ++i;
299 memmove(&view->ranges[i], &view->ranges[j],
300 (view->nr - j) * sizeof(view->ranges[j]));
301 view->nr -= j - i;
302 }
303 }
304
305 static void memory_region_oldmmio_read_accessor(void *opaque,
306 hwaddr addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask)
311 {
312 MemoryRegion *mr = opaque;
313 uint64_t tmp;
314
315 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
316 *value |= (tmp & mask) << shift;
317 }
318
319 static void memory_region_read_accessor(void *opaque,
320 hwaddr addr,
321 uint64_t *value,
322 unsigned size,
323 unsigned shift,
324 uint64_t mask)
325 {
326 MemoryRegion *mr = opaque;
327 uint64_t tmp;
328
329 if (mr->flush_coalesced_mmio) {
330 qemu_flush_coalesced_mmio_buffer();
331 }
332 tmp = mr->ops->read(mr->opaque, addr, size);
333 *value |= (tmp & mask) << shift;
334 }
335
336 static void memory_region_oldmmio_write_accessor(void *opaque,
337 hwaddr addr,
338 uint64_t *value,
339 unsigned size,
340 unsigned shift,
341 uint64_t mask)
342 {
343 MemoryRegion *mr = opaque;
344 uint64_t tmp;
345
346 tmp = (*value >> shift) & mask;
347 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
348 }
349
350 static void memory_region_write_accessor(void *opaque,
351 hwaddr addr,
352 uint64_t *value,
353 unsigned size,
354 unsigned shift,
355 uint64_t mask)
356 {
357 MemoryRegion *mr = opaque;
358 uint64_t tmp;
359
360 if (mr->flush_coalesced_mmio) {
361 qemu_flush_coalesced_mmio_buffer();
362 }
363 tmp = (*value >> shift) & mask;
364 mr->ops->write(mr->opaque, addr, tmp, size);
365 }
366
367 static void access_with_adjusted_size(hwaddr addr,
368 uint64_t *value,
369 unsigned size,
370 unsigned access_size_min,
371 unsigned access_size_max,
372 void (*access)(void *opaque,
373 hwaddr addr,
374 uint64_t *value,
375 unsigned size,
376 unsigned shift,
377 uint64_t mask),
378 void *opaque)
379 {
380 uint64_t access_mask;
381 unsigned access_size;
382 unsigned i;
383
384 if (!access_size_min) {
385 access_size_min = 1;
386 }
387 if (!access_size_max) {
388 access_size_max = 4;
389 }
390
391 /* FIXME: support unaligned access? */
392 access_size = MAX(MIN(size, access_size_max), access_size_min);
393 access_mask = -1ULL >> (64 - access_size * 8);
394 for (i = 0; i < size; i += access_size) {
395 #ifdef TARGET_WORDS_BIGENDIAN
396 access(opaque, addr + i, value, access_size,
397 (size - access_size - i) * 8, access_mask);
398 #else
399 access(opaque, addr + i, value, access_size, i * 8, access_mask);
400 #endif
401 }
402 }
403
404 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
405 {
406 AddressSpace *as;
407
408 while (mr->parent) {
409 mr = mr->parent;
410 }
411 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
412 if (mr == as->root) {
413 return as;
414 }
415 }
416 abort();
417 }
418
419 /* Render a memory region into the global view. Ranges in @view obscure
420 * ranges in @mr.
421 */
422 static void render_memory_region(FlatView *view,
423 MemoryRegion *mr,
424 Int128 base,
425 AddrRange clip,
426 bool readonly)
427 {
428 MemoryRegion *subregion;
429 unsigned i;
430 hwaddr offset_in_region;
431 Int128 remain;
432 Int128 now;
433 FlatRange fr;
434 AddrRange tmp;
435
436 if (!mr->enabled) {
437 return;
438 }
439
440 int128_addto(&base, int128_make64(mr->addr));
441 readonly |= mr->readonly;
442
443 tmp = addrrange_make(base, mr->size);
444
445 if (!addrrange_intersects(tmp, clip)) {
446 return;
447 }
448
449 clip = addrrange_intersection(tmp, clip);
450
451 if (mr->alias) {
452 int128_subfrom(&base, int128_make64(mr->alias->addr));
453 int128_subfrom(&base, int128_make64(mr->alias_offset));
454 render_memory_region(view, mr->alias, base, clip, readonly);
455 return;
456 }
457
458 /* Render subregions in priority order. */
459 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
460 render_memory_region(view, subregion, base, clip, readonly);
461 }
462
463 if (!mr->terminates) {
464 return;
465 }
466
467 offset_in_region = int128_get64(int128_sub(clip.start, base));
468 base = clip.start;
469 remain = clip.size;
470
471 fr.mr = mr;
472 fr.dirty_log_mask = mr->dirty_log_mask;
473 fr.romd_mode = mr->romd_mode;
474 fr.readonly = readonly;
475
476 /* Render the region itself into any gaps left by the current view. */
477 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
478 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
479 continue;
480 }
481 if (int128_lt(base, view->ranges[i].addr.start)) {
482 now = int128_min(remain,
483 int128_sub(view->ranges[i].addr.start, base));
484 fr.offset_in_region = offset_in_region;
485 fr.addr = addrrange_make(base, now);
486 flatview_insert(view, i, &fr);
487 ++i;
488 int128_addto(&base, now);
489 offset_in_region += int128_get64(now);
490 int128_subfrom(&remain, now);
491 }
492 now = int128_sub(int128_min(int128_add(base, remain),
493 addrrange_end(view->ranges[i].addr)),
494 base);
495 int128_addto(&base, now);
496 offset_in_region += int128_get64(now);
497 int128_subfrom(&remain, now);
498 }
499 if (int128_nz(remain)) {
500 fr.offset_in_region = offset_in_region;
501 fr.addr = addrrange_make(base, remain);
502 flatview_insert(view, i, &fr);
503 }
504 }
505
506 /* Render a memory topology into a list of disjoint absolute ranges. */
507 static FlatView generate_memory_topology(MemoryRegion *mr)
508 {
509 FlatView view;
510
511 flatview_init(&view);
512
513 if (mr) {
514 render_memory_region(&view, mr, int128_zero(),
515 addrrange_make(int128_zero(), int128_2_64()), false);
516 }
517 flatview_simplify(&view);
518
519 return view;
520 }
521
522 static void address_space_add_del_ioeventfds(AddressSpace *as,
523 MemoryRegionIoeventfd *fds_new,
524 unsigned fds_new_nb,
525 MemoryRegionIoeventfd *fds_old,
526 unsigned fds_old_nb)
527 {
528 unsigned iold, inew;
529 MemoryRegionIoeventfd *fd;
530 MemoryRegionSection section;
531
532 /* Generate a symmetric difference of the old and new fd sets, adding
533 * and deleting as necessary.
534 */
535
536 iold = inew = 0;
537 while (iold < fds_old_nb || inew < fds_new_nb) {
538 if (iold < fds_old_nb
539 && (inew == fds_new_nb
540 || memory_region_ioeventfd_before(fds_old[iold],
541 fds_new[inew]))) {
542 fd = &fds_old[iold];
543 section = (MemoryRegionSection) {
544 .address_space = as,
545 .offset_within_address_space = int128_get64(fd->addr.start),
546 .size = fd->addr.size,
547 };
548 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
549 fd->match_data, fd->data, fd->e);
550 ++iold;
551 } else if (inew < fds_new_nb
552 && (iold == fds_old_nb
553 || memory_region_ioeventfd_before(fds_new[inew],
554 fds_old[iold]))) {
555 fd = &fds_new[inew];
556 section = (MemoryRegionSection) {
557 .address_space = as,
558 .offset_within_address_space = int128_get64(fd->addr.start),
559 .size = fd->addr.size,
560 };
561 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
562 fd->match_data, fd->data, fd->e);
563 ++inew;
564 } else {
565 ++iold;
566 ++inew;
567 }
568 }
569 }
570
571 static void address_space_update_ioeventfds(AddressSpace *as)
572 {
573 FlatRange *fr;
574 unsigned ioeventfd_nb = 0;
575 MemoryRegionIoeventfd *ioeventfds = NULL;
576 AddrRange tmp;
577 unsigned i;
578
579 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
580 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
581 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
582 int128_sub(fr->addr.start,
583 int128_make64(fr->offset_in_region)));
584 if (addrrange_intersects(fr->addr, tmp)) {
585 ++ioeventfd_nb;
586 ioeventfds = g_realloc(ioeventfds,
587 ioeventfd_nb * sizeof(*ioeventfds));
588 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
589 ioeventfds[ioeventfd_nb-1].addr = tmp;
590 }
591 }
592 }
593
594 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
595 as->ioeventfds, as->ioeventfd_nb);
596
597 g_free(as->ioeventfds);
598 as->ioeventfds = ioeventfds;
599 as->ioeventfd_nb = ioeventfd_nb;
600 }
601
602 static void address_space_update_topology_pass(AddressSpace *as,
603 FlatView old_view,
604 FlatView new_view,
605 bool adding)
606 {
607 unsigned iold, inew;
608 FlatRange *frold, *frnew;
609
610 /* Generate a symmetric difference of the old and new memory maps.
611 * Kill ranges in the old map, and instantiate ranges in the new map.
612 */
613 iold = inew = 0;
614 while (iold < old_view.nr || inew < new_view.nr) {
615 if (iold < old_view.nr) {
616 frold = &old_view.ranges[iold];
617 } else {
618 frold = NULL;
619 }
620 if (inew < new_view.nr) {
621 frnew = &new_view.ranges[inew];
622 } else {
623 frnew = NULL;
624 }
625
626 if (frold
627 && (!frnew
628 || int128_lt(frold->addr.start, frnew->addr.start)
629 || (int128_eq(frold->addr.start, frnew->addr.start)
630 && !flatrange_equal(frold, frnew)))) {
631 /* In old but not in new, or in both but attributes changed. */
632
633 if (!adding) {
634 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
635 }
636
637 ++iold;
638 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
639 /* In both and unchanged (except logging may have changed) */
640
641 if (adding) {
642 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
643 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
644 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
645 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
646 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
647 }
648 }
649
650 ++iold;
651 ++inew;
652 } else {
653 /* In new */
654
655 if (adding) {
656 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
657 }
658
659 ++inew;
660 }
661 }
662 }
663
664
665 static void address_space_update_topology(AddressSpace *as)
666 {
667 FlatView old_view = *as->current_map;
668 FlatView new_view = generate_memory_topology(as->root);
669
670 address_space_update_topology_pass(as, old_view, new_view, false);
671 address_space_update_topology_pass(as, old_view, new_view, true);
672
673 *as->current_map = new_view;
674 flatview_destroy(&old_view);
675 address_space_update_ioeventfds(as);
676 }
677
678 void memory_region_transaction_begin(void)
679 {
680 qemu_flush_coalesced_mmio_buffer();
681 ++memory_region_transaction_depth;
682 }
683
684 void memory_region_transaction_commit(void)
685 {
686 AddressSpace *as;
687
688 assert(memory_region_transaction_depth);
689 --memory_region_transaction_depth;
690 if (!memory_region_transaction_depth && memory_region_update_pending) {
691 memory_region_update_pending = false;
692 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
693
694 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
695 address_space_update_topology(as);
696 }
697
698 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
699 }
700 }
701
702 static void memory_region_destructor_none(MemoryRegion *mr)
703 {
704 }
705
706 static void memory_region_destructor_ram(MemoryRegion *mr)
707 {
708 qemu_ram_free(mr->ram_addr);
709 }
710
711 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
712 {
713 qemu_ram_free_from_ptr(mr->ram_addr);
714 }
715
716 static void memory_region_destructor_rom_device(MemoryRegion *mr)
717 {
718 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
719 }
720
721 static bool memory_region_wrong_endianness(MemoryRegion *mr)
722 {
723 #ifdef TARGET_WORDS_BIGENDIAN
724 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
725 #else
726 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
727 #endif
728 }
729
730 void memory_region_init(MemoryRegion *mr,
731 const char *name,
732 uint64_t size)
733 {
734 mr->ops = &unassigned_mem_ops;
735 mr->opaque = NULL;
736 mr->iommu_ops = NULL;
737 mr->parent = NULL;
738 mr->size = int128_make64(size);
739 if (size == UINT64_MAX) {
740 mr->size = int128_2_64();
741 }
742 mr->addr = 0;
743 mr->subpage = false;
744 mr->enabled = true;
745 mr->terminates = false;
746 mr->ram = false;
747 mr->romd_mode = true;
748 mr->readonly = false;
749 mr->rom_device = false;
750 mr->destructor = memory_region_destructor_none;
751 mr->priority = 0;
752 mr->may_overlap = false;
753 mr->alias = NULL;
754 QTAILQ_INIT(&mr->subregions);
755 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
756 QTAILQ_INIT(&mr->coalesced);
757 mr->name = g_strdup(name);
758 mr->dirty_log_mask = 0;
759 mr->ioeventfd_nb = 0;
760 mr->ioeventfds = NULL;
761 mr->flush_coalesced_mmio = false;
762 }
763
764 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
765 unsigned size)
766 {
767 #ifdef DEBUG_UNASSIGNED
768 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
769 #endif
770 if (cpu_single_env != NULL) {
771 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
772 addr, false, false, 0, size);
773 }
774 return 0;
775 }
776
777 static void unassigned_mem_write(void *opaque, hwaddr addr,
778 uint64_t val, unsigned size)
779 {
780 #ifdef DEBUG_UNASSIGNED
781 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
782 #endif
783 if (cpu_single_env != NULL) {
784 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
785 addr, true, false, 0, size);
786 }
787 }
788
789 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
790 unsigned size, bool is_write)
791 {
792 return false;
793 }
794
795 const MemoryRegionOps unassigned_mem_ops = {
796 .valid.accepts = unassigned_mem_accepts,
797 .endianness = DEVICE_NATIVE_ENDIAN,
798 };
799
800 bool memory_region_access_valid(MemoryRegion *mr,
801 hwaddr addr,
802 unsigned size,
803 bool is_write)
804 {
805 int access_size_min, access_size_max;
806 int access_size, i;
807
808 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
809 return false;
810 }
811
812 if (!mr->ops->valid.accepts) {
813 return true;
814 }
815
816 access_size_min = mr->ops->valid.min_access_size;
817 if (!mr->ops->valid.min_access_size) {
818 access_size_min = 1;
819 }
820
821 access_size_max = mr->ops->valid.max_access_size;
822 if (!mr->ops->valid.max_access_size) {
823 access_size_max = 4;
824 }
825
826 access_size = MAX(MIN(size, access_size_max), access_size_min);
827 for (i = 0; i < size; i += access_size) {
828 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
829 is_write)) {
830 return false;
831 }
832 }
833
834 return true;
835 }
836
837 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
838 hwaddr addr,
839 unsigned size)
840 {
841 uint64_t data = 0;
842
843 if (mr->ops->read) {
844 access_with_adjusted_size(addr, &data, size,
845 mr->ops->impl.min_access_size,
846 mr->ops->impl.max_access_size,
847 memory_region_read_accessor, mr);
848 } else {
849 access_with_adjusted_size(addr, &data, size, 1, 4,
850 memory_region_oldmmio_read_accessor, mr);
851 }
852
853 return data;
854 }
855
856 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
857 {
858 if (memory_region_wrong_endianness(mr)) {
859 switch (size) {
860 case 1:
861 break;
862 case 2:
863 *data = bswap16(*data);
864 break;
865 case 4:
866 *data = bswap32(*data);
867 break;
868 case 8:
869 *data = bswap64(*data);
870 break;
871 default:
872 abort();
873 }
874 }
875 }
876
877 static bool memory_region_dispatch_read(MemoryRegion *mr,
878 hwaddr addr,
879 uint64_t *pval,
880 unsigned size)
881 {
882 if (!memory_region_access_valid(mr, addr, size, false)) {
883 *pval = unassigned_mem_read(mr, addr, size);
884 return true;
885 }
886
887 *pval = memory_region_dispatch_read1(mr, addr, size);
888 adjust_endianness(mr, pval, size);
889 return false;
890 }
891
892 static bool memory_region_dispatch_write(MemoryRegion *mr,
893 hwaddr addr,
894 uint64_t data,
895 unsigned size)
896 {
897 if (!memory_region_access_valid(mr, addr, size, true)) {
898 unassigned_mem_write(mr, addr, data, size);
899 return true;
900 }
901
902 adjust_endianness(mr, &data, size);
903
904 if (mr->ops->write) {
905 access_with_adjusted_size(addr, &data, size,
906 mr->ops->impl.min_access_size,
907 mr->ops->impl.max_access_size,
908 memory_region_write_accessor, mr);
909 } else {
910 access_with_adjusted_size(addr, &data, size, 1, 4,
911 memory_region_oldmmio_write_accessor, mr);
912 }
913 return false;
914 }
915
916 void memory_region_init_io(MemoryRegion *mr,
917 const MemoryRegionOps *ops,
918 void *opaque,
919 const char *name,
920 uint64_t size)
921 {
922 memory_region_init(mr, name, size);
923 mr->ops = ops;
924 mr->opaque = opaque;
925 mr->terminates = true;
926 mr->ram_addr = ~(ram_addr_t)0;
927 }
928
929 void memory_region_init_ram(MemoryRegion *mr,
930 const char *name,
931 uint64_t size)
932 {
933 memory_region_init(mr, name, size);
934 mr->ram = true;
935 mr->terminates = true;
936 mr->destructor = memory_region_destructor_ram;
937 mr->ram_addr = qemu_ram_alloc(size, mr);
938 }
939
940 void memory_region_init_ram_ptr(MemoryRegion *mr,
941 const char *name,
942 uint64_t size,
943 void *ptr)
944 {
945 memory_region_init(mr, name, size);
946 mr->ram = true;
947 mr->terminates = true;
948 mr->destructor = memory_region_destructor_ram_from_ptr;
949 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
950 }
951
952 void memory_region_init_alias(MemoryRegion *mr,
953 const char *name,
954 MemoryRegion *orig,
955 hwaddr offset,
956 uint64_t size)
957 {
958 memory_region_init(mr, name, size);
959 mr->alias = orig;
960 mr->alias_offset = offset;
961 }
962
963 void memory_region_init_rom_device(MemoryRegion *mr,
964 const MemoryRegionOps *ops,
965 void *opaque,
966 const char *name,
967 uint64_t size)
968 {
969 memory_region_init(mr, name, size);
970 mr->ops = ops;
971 mr->opaque = opaque;
972 mr->terminates = true;
973 mr->rom_device = true;
974 mr->destructor = memory_region_destructor_rom_device;
975 mr->ram_addr = qemu_ram_alloc(size, mr);
976 }
977
978 void memory_region_init_iommu(MemoryRegion *mr,
979 const MemoryRegionIOMMUOps *ops,
980 const char *name,
981 uint64_t size)
982 {
983 memory_region_init(mr, name, size);
984 mr->iommu_ops = ops,
985 mr->terminates = true; /* then re-forwards */
986 notifier_list_init(&mr->iommu_notify);
987 }
988
989 void memory_region_init_reservation(MemoryRegion *mr,
990 const char *name,
991 uint64_t size)
992 {
993 memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
994 }
995
996 void memory_region_destroy(MemoryRegion *mr)
997 {
998 assert(QTAILQ_EMPTY(&mr->subregions));
999 assert(memory_region_transaction_depth == 0);
1000 mr->destructor(mr);
1001 memory_region_clear_coalescing(mr);
1002 g_free((char *)mr->name);
1003 g_free(mr->ioeventfds);
1004 }
1005
1006 uint64_t memory_region_size(MemoryRegion *mr)
1007 {
1008 if (int128_eq(mr->size, int128_2_64())) {
1009 return UINT64_MAX;
1010 }
1011 return int128_get64(mr->size);
1012 }
1013
1014 const char *memory_region_name(MemoryRegion *mr)
1015 {
1016 return mr->name;
1017 }
1018
1019 bool memory_region_is_ram(MemoryRegion *mr)
1020 {
1021 return mr->ram;
1022 }
1023
1024 bool memory_region_is_logging(MemoryRegion *mr)
1025 {
1026 return mr->dirty_log_mask;
1027 }
1028
1029 bool memory_region_is_rom(MemoryRegion *mr)
1030 {
1031 return mr->ram && mr->readonly;
1032 }
1033
1034 bool memory_region_is_iommu(MemoryRegion *mr)
1035 {
1036 return mr->iommu_ops;
1037 }
1038
1039 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1040 {
1041 notifier_list_add(&mr->iommu_notify, n);
1042 }
1043
1044 void memory_region_unregister_iommu_notifier(Notifier *n)
1045 {
1046 notifier_remove(n);
1047 }
1048
1049 void memory_region_notify_iommu(MemoryRegion *mr,
1050 IOMMUTLBEntry entry)
1051 {
1052 assert(memory_region_is_iommu(mr));
1053 notifier_list_notify(&mr->iommu_notify, &entry);
1054 }
1055
1056 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1057 {
1058 uint8_t mask = 1 << client;
1059
1060 memory_region_transaction_begin();
1061 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1062 memory_region_update_pending |= mr->enabled;
1063 memory_region_transaction_commit();
1064 }
1065
1066 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1067 hwaddr size, unsigned client)
1068 {
1069 assert(mr->terminates);
1070 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1071 1 << client);
1072 }
1073
1074 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1075 hwaddr size)
1076 {
1077 assert(mr->terminates);
1078 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1079 }
1080
1081 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1082 hwaddr size, unsigned client)
1083 {
1084 bool ret;
1085 assert(mr->terminates);
1086 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1087 1 << client);
1088 if (ret) {
1089 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1090 mr->ram_addr + addr + size,
1091 1 << client);
1092 }
1093 return ret;
1094 }
1095
1096
1097 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1098 {
1099 AddressSpace *as;
1100 FlatRange *fr;
1101
1102 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1103 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1104 if (fr->mr == mr) {
1105 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1106 }
1107 }
1108 }
1109 }
1110
1111 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1112 {
1113 if (mr->readonly != readonly) {
1114 memory_region_transaction_begin();
1115 mr->readonly = readonly;
1116 memory_region_update_pending |= mr->enabled;
1117 memory_region_transaction_commit();
1118 }
1119 }
1120
1121 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1122 {
1123 if (mr->romd_mode != romd_mode) {
1124 memory_region_transaction_begin();
1125 mr->romd_mode = romd_mode;
1126 memory_region_update_pending |= mr->enabled;
1127 memory_region_transaction_commit();
1128 }
1129 }
1130
1131 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1132 hwaddr size, unsigned client)
1133 {
1134 assert(mr->terminates);
1135 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1136 mr->ram_addr + addr + size,
1137 1 << client);
1138 }
1139
1140 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1141 {
1142 if (mr->alias) {
1143 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1144 }
1145
1146 assert(mr->terminates);
1147
1148 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1149 }
1150
1151 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1152 {
1153 FlatRange *fr;
1154 CoalescedMemoryRange *cmr;
1155 AddrRange tmp;
1156 MemoryRegionSection section;
1157
1158 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1159 if (fr->mr == mr) {
1160 section = (MemoryRegionSection) {
1161 .address_space = as,
1162 .offset_within_address_space = int128_get64(fr->addr.start),
1163 .size = fr->addr.size,
1164 };
1165
1166 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1167 int128_get64(fr->addr.start),
1168 int128_get64(fr->addr.size));
1169 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1170 tmp = addrrange_shift(cmr->addr,
1171 int128_sub(fr->addr.start,
1172 int128_make64(fr->offset_in_region)));
1173 if (!addrrange_intersects(tmp, fr->addr)) {
1174 continue;
1175 }
1176 tmp = addrrange_intersection(tmp, fr->addr);
1177 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1178 int128_get64(tmp.start),
1179 int128_get64(tmp.size));
1180 }
1181 }
1182 }
1183 }
1184
1185 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1186 {
1187 AddressSpace *as;
1188
1189 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1190 memory_region_update_coalesced_range_as(mr, as);
1191 }
1192 }
1193
1194 void memory_region_set_coalescing(MemoryRegion *mr)
1195 {
1196 memory_region_clear_coalescing(mr);
1197 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1198 }
1199
1200 void memory_region_add_coalescing(MemoryRegion *mr,
1201 hwaddr offset,
1202 uint64_t size)
1203 {
1204 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1205
1206 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1207 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1208 memory_region_update_coalesced_range(mr);
1209 memory_region_set_flush_coalesced(mr);
1210 }
1211
1212 void memory_region_clear_coalescing(MemoryRegion *mr)
1213 {
1214 CoalescedMemoryRange *cmr;
1215
1216 qemu_flush_coalesced_mmio_buffer();
1217 mr->flush_coalesced_mmio = false;
1218
1219 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1220 cmr = QTAILQ_FIRST(&mr->coalesced);
1221 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1222 g_free(cmr);
1223 }
1224 memory_region_update_coalesced_range(mr);
1225 }
1226
1227 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1228 {
1229 mr->flush_coalesced_mmio = true;
1230 }
1231
1232 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1233 {
1234 qemu_flush_coalesced_mmio_buffer();
1235 if (QTAILQ_EMPTY(&mr->coalesced)) {
1236 mr->flush_coalesced_mmio = false;
1237 }
1238 }
1239
1240 void memory_region_add_eventfd(MemoryRegion *mr,
1241 hwaddr addr,
1242 unsigned size,
1243 bool match_data,
1244 uint64_t data,
1245 EventNotifier *e)
1246 {
1247 MemoryRegionIoeventfd mrfd = {
1248 .addr.start = int128_make64(addr),
1249 .addr.size = int128_make64(size),
1250 .match_data = match_data,
1251 .data = data,
1252 .e = e,
1253 };
1254 unsigned i;
1255
1256 adjust_endianness(mr, &mrfd.data, size);
1257 memory_region_transaction_begin();
1258 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1259 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1260 break;
1261 }
1262 }
1263 ++mr->ioeventfd_nb;
1264 mr->ioeventfds = g_realloc(mr->ioeventfds,
1265 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1266 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1267 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1268 mr->ioeventfds[i] = mrfd;
1269 memory_region_update_pending |= mr->enabled;
1270 memory_region_transaction_commit();
1271 }
1272
1273 void memory_region_del_eventfd(MemoryRegion *mr,
1274 hwaddr addr,
1275 unsigned size,
1276 bool match_data,
1277 uint64_t data,
1278 EventNotifier *e)
1279 {
1280 MemoryRegionIoeventfd mrfd = {
1281 .addr.start = int128_make64(addr),
1282 .addr.size = int128_make64(size),
1283 .match_data = match_data,
1284 .data = data,
1285 .e = e,
1286 };
1287 unsigned i;
1288
1289 adjust_endianness(mr, &mrfd.data, size);
1290 memory_region_transaction_begin();
1291 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1292 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1293 break;
1294 }
1295 }
1296 assert(i != mr->ioeventfd_nb);
1297 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1298 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1299 --mr->ioeventfd_nb;
1300 mr->ioeventfds = g_realloc(mr->ioeventfds,
1301 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1302 memory_region_update_pending |= mr->enabled;
1303 memory_region_transaction_commit();
1304 }
1305
1306 static void memory_region_add_subregion_common(MemoryRegion *mr,
1307 hwaddr offset,
1308 MemoryRegion *subregion)
1309 {
1310 MemoryRegion *other;
1311
1312 memory_region_transaction_begin();
1313
1314 assert(!subregion->parent);
1315 subregion->parent = mr;
1316 subregion->addr = offset;
1317 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1318 if (subregion->may_overlap || other->may_overlap) {
1319 continue;
1320 }
1321 if (int128_ge(int128_make64(offset),
1322 int128_add(int128_make64(other->addr), other->size))
1323 || int128_le(int128_add(int128_make64(offset), subregion->size),
1324 int128_make64(other->addr))) {
1325 continue;
1326 }
1327 #if 0
1328 printf("warning: subregion collision %llx/%llx (%s) "
1329 "vs %llx/%llx (%s)\n",
1330 (unsigned long long)offset,
1331 (unsigned long long)int128_get64(subregion->size),
1332 subregion->name,
1333 (unsigned long long)other->addr,
1334 (unsigned long long)int128_get64(other->size),
1335 other->name);
1336 #endif
1337 }
1338 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1339 if (subregion->priority >= other->priority) {
1340 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1341 goto done;
1342 }
1343 }
1344 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1345 done:
1346 memory_region_update_pending |= mr->enabled && subregion->enabled;
1347 memory_region_transaction_commit();
1348 }
1349
1350
1351 void memory_region_add_subregion(MemoryRegion *mr,
1352 hwaddr offset,
1353 MemoryRegion *subregion)
1354 {
1355 subregion->may_overlap = false;
1356 subregion->priority = 0;
1357 memory_region_add_subregion_common(mr, offset, subregion);
1358 }
1359
1360 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1361 hwaddr offset,
1362 MemoryRegion *subregion,
1363 unsigned priority)
1364 {
1365 subregion->may_overlap = true;
1366 subregion->priority = priority;
1367 memory_region_add_subregion_common(mr, offset, subregion);
1368 }
1369
1370 void memory_region_del_subregion(MemoryRegion *mr,
1371 MemoryRegion *subregion)
1372 {
1373 memory_region_transaction_begin();
1374 assert(subregion->parent == mr);
1375 subregion->parent = NULL;
1376 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1377 memory_region_update_pending |= mr->enabled && subregion->enabled;
1378 memory_region_transaction_commit();
1379 }
1380
1381 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1382 {
1383 if (enabled == mr->enabled) {
1384 return;
1385 }
1386 memory_region_transaction_begin();
1387 mr->enabled = enabled;
1388 memory_region_update_pending = true;
1389 memory_region_transaction_commit();
1390 }
1391
1392 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1393 {
1394 MemoryRegion *parent = mr->parent;
1395 unsigned priority = mr->priority;
1396 bool may_overlap = mr->may_overlap;
1397
1398 if (addr == mr->addr || !parent) {
1399 mr->addr = addr;
1400 return;
1401 }
1402
1403 memory_region_transaction_begin();
1404 memory_region_del_subregion(parent, mr);
1405 if (may_overlap) {
1406 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1407 } else {
1408 memory_region_add_subregion(parent, addr, mr);
1409 }
1410 memory_region_transaction_commit();
1411 }
1412
1413 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1414 {
1415 assert(mr->alias);
1416
1417 if (offset == mr->alias_offset) {
1418 return;
1419 }
1420
1421 memory_region_transaction_begin();
1422 mr->alias_offset = offset;
1423 memory_region_update_pending |= mr->enabled;
1424 memory_region_transaction_commit();
1425 }
1426
1427 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1428 {
1429 return mr->ram_addr;
1430 }
1431
1432 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1433 {
1434 const AddrRange *addr = addr_;
1435 const FlatRange *fr = fr_;
1436
1437 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1438 return -1;
1439 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1440 return 1;
1441 }
1442 return 0;
1443 }
1444
1445 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1446 {
1447 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1448 sizeof(FlatRange), cmp_flatrange_addr);
1449 }
1450
1451 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1452 hwaddr addr, uint64_t size)
1453 {
1454 MemoryRegionSection ret = { .mr = NULL };
1455 MemoryRegion *root;
1456 AddressSpace *as;
1457 AddrRange range;
1458 FlatRange *fr;
1459
1460 addr += mr->addr;
1461 for (root = mr; root->parent; ) {
1462 root = root->parent;
1463 addr += root->addr;
1464 }
1465
1466 as = memory_region_to_address_space(root);
1467 range = addrrange_make(int128_make64(addr), int128_make64(size));
1468 fr = address_space_lookup(as, range);
1469 if (!fr) {
1470 return ret;
1471 }
1472
1473 while (fr > as->current_map->ranges
1474 && addrrange_intersects(fr[-1].addr, range)) {
1475 --fr;
1476 }
1477
1478 ret.mr = fr->mr;
1479 ret.address_space = as;
1480 range = addrrange_intersection(range, fr->addr);
1481 ret.offset_within_region = fr->offset_in_region;
1482 ret.offset_within_region += int128_get64(int128_sub(range.start,
1483 fr->addr.start));
1484 ret.size = range.size;
1485 ret.offset_within_address_space = int128_get64(range.start);
1486 ret.readonly = fr->readonly;
1487 return ret;
1488 }
1489
1490 void address_space_sync_dirty_bitmap(AddressSpace *as)
1491 {
1492 FlatRange *fr;
1493
1494 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1495 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1496 }
1497 }
1498
1499 void memory_global_dirty_log_start(void)
1500 {
1501 global_dirty_log = true;
1502 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1503 }
1504
1505 void memory_global_dirty_log_stop(void)
1506 {
1507 global_dirty_log = false;
1508 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1509 }
1510
1511 static void listener_add_address_space(MemoryListener *listener,
1512 AddressSpace *as)
1513 {
1514 FlatRange *fr;
1515
1516 if (listener->address_space_filter
1517 && listener->address_space_filter != as) {
1518 return;
1519 }
1520
1521 if (global_dirty_log) {
1522 if (listener->log_global_start) {
1523 listener->log_global_start(listener);
1524 }
1525 }
1526
1527 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1528 MemoryRegionSection section = {
1529 .mr = fr->mr,
1530 .address_space = as,
1531 .offset_within_region = fr->offset_in_region,
1532 .size = fr->addr.size,
1533 .offset_within_address_space = int128_get64(fr->addr.start),
1534 .readonly = fr->readonly,
1535 };
1536 if (listener->region_add) {
1537 listener->region_add(listener, &section);
1538 }
1539 }
1540 }
1541
1542 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1543 {
1544 MemoryListener *other = NULL;
1545 AddressSpace *as;
1546
1547 listener->address_space_filter = filter;
1548 if (QTAILQ_EMPTY(&memory_listeners)
1549 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1550 memory_listeners)->priority) {
1551 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1552 } else {
1553 QTAILQ_FOREACH(other, &memory_listeners, link) {
1554 if (listener->priority < other->priority) {
1555 break;
1556 }
1557 }
1558 QTAILQ_INSERT_BEFORE(other, listener, link);
1559 }
1560
1561 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1562 listener_add_address_space(listener, as);
1563 }
1564 }
1565
1566 void memory_listener_unregister(MemoryListener *listener)
1567 {
1568 QTAILQ_REMOVE(&memory_listeners, listener, link);
1569 }
1570
1571 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1572 {
1573 memory_region_transaction_begin();
1574 as->root = root;
1575 as->current_map = g_new(FlatView, 1);
1576 flatview_init(as->current_map);
1577 as->ioeventfd_nb = 0;
1578 as->ioeventfds = NULL;
1579 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1580 as->name = g_strdup(name ? name : "anonymous");
1581 address_space_init_dispatch(as);
1582 memory_region_update_pending |= root->enabled;
1583 memory_region_transaction_commit();
1584 }
1585
1586 void address_space_destroy(AddressSpace *as)
1587 {
1588 /* Flush out anything from MemoryListeners listening in on this */
1589 memory_region_transaction_begin();
1590 as->root = NULL;
1591 memory_region_transaction_commit();
1592 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1593 address_space_destroy_dispatch(as);
1594 flatview_destroy(as->current_map);
1595 g_free(as->name);
1596 g_free(as->current_map);
1597 g_free(as->ioeventfds);
1598 }
1599
1600 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1601 {
1602 return memory_region_dispatch_read(mr, addr, pval, size);
1603 }
1604
1605 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1606 uint64_t val, unsigned size)
1607 {
1608 return memory_region_dispatch_write(mr, addr, val, size);
1609 }
1610
1611 typedef struct MemoryRegionList MemoryRegionList;
1612
1613 struct MemoryRegionList {
1614 const MemoryRegion *mr;
1615 bool printed;
1616 QTAILQ_ENTRY(MemoryRegionList) queue;
1617 };
1618
1619 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1620
1621 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1622 const MemoryRegion *mr, unsigned int level,
1623 hwaddr base,
1624 MemoryRegionListHead *alias_print_queue)
1625 {
1626 MemoryRegionList *new_ml, *ml, *next_ml;
1627 MemoryRegionListHead submr_print_queue;
1628 const MemoryRegion *submr;
1629 unsigned int i;
1630
1631 if (!mr || !mr->enabled) {
1632 return;
1633 }
1634
1635 for (i = 0; i < level; i++) {
1636 mon_printf(f, " ");
1637 }
1638
1639 if (mr->alias) {
1640 MemoryRegionList *ml;
1641 bool found = false;
1642
1643 /* check if the alias is already in the queue */
1644 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1645 if (ml->mr == mr->alias && !ml->printed) {
1646 found = true;
1647 }
1648 }
1649
1650 if (!found) {
1651 ml = g_new(MemoryRegionList, 1);
1652 ml->mr = mr->alias;
1653 ml->printed = false;
1654 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1655 }
1656 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1657 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1658 "-" TARGET_FMT_plx "\n",
1659 base + mr->addr,
1660 base + mr->addr
1661 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1662 mr->priority,
1663 mr->romd_mode ? 'R' : '-',
1664 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1665 : '-',
1666 mr->name,
1667 mr->alias->name,
1668 mr->alias_offset,
1669 mr->alias_offset
1670 + (hwaddr)int128_get64(mr->size) - 1);
1671 } else {
1672 mon_printf(f,
1673 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1674 base + mr->addr,
1675 base + mr->addr
1676 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1677 mr->priority,
1678 mr->romd_mode ? 'R' : '-',
1679 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1680 : '-',
1681 mr->name);
1682 }
1683
1684 QTAILQ_INIT(&submr_print_queue);
1685
1686 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1687 new_ml = g_new(MemoryRegionList, 1);
1688 new_ml->mr = submr;
1689 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1690 if (new_ml->mr->addr < ml->mr->addr ||
1691 (new_ml->mr->addr == ml->mr->addr &&
1692 new_ml->mr->priority > ml->mr->priority)) {
1693 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1694 new_ml = NULL;
1695 break;
1696 }
1697 }
1698 if (new_ml) {
1699 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1700 }
1701 }
1702
1703 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1704 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1705 alias_print_queue);
1706 }
1707
1708 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1709 g_free(ml);
1710 }
1711 }
1712
1713 void mtree_info(fprintf_function mon_printf, void *f)
1714 {
1715 MemoryRegionListHead ml_head;
1716 MemoryRegionList *ml, *ml2;
1717 AddressSpace *as;
1718
1719 QTAILQ_INIT(&ml_head);
1720
1721 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1722 mon_printf(f, "%s\n", as->name);
1723 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1724 }
1725
1726 mon_printf(f, "aliases\n");
1727 /* print aliased regions */
1728 QTAILQ_FOREACH(ml, &ml_head, queue) {
1729 if (!ml->printed) {
1730 mon_printf(f, "%s\n", ml->mr->name);
1731 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1732 }
1733 }
1734
1735 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1736 g_free(ml);
1737 }
1738 }
Qemu copy for testing