target-arm/cpu-qom.h

   1 /*
   2  * QEMU ARM CPU
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_ARM_CPU_QOM_H
  21 #define QEMU_ARM_CPU_QOM_H
  22
  23 #include "qemu/cpu.h"
  24 #include "cpu.h"
  25
  26 #define TYPE_ARM_CPU "arm-cpu"
  27
  28 #define ARM_CPU_CLASS(klass) \
  29     OBJECT_CLASS_CHECK(ARMCPUClass, (klass), TYPE_ARM_CPU)
  30 #define ARM_CPU(obj) \
  31     OBJECT_CHECK(ARMCPU, (obj), TYPE_ARM_CPU)
  32 #define ARM_CPU_GET_CLASS(obj) \
  33     OBJECT_GET_CLASS(ARMCPUClass, (obj), TYPE_ARM_CPU)
  34
  35 /**
  36  * ARMCPUClass:
  37  * @parent_reset: The parent class' reset handler.
  38  *
  39  * An ARM CPU model.
  40  */
  41 typedef struct ARMCPUClass {
  42     /*< private >*/
  43     CPUClass parent_class;
  44     /*< public >*/
  45
  46     void (*parent_reset)(CPUState *cpu);
  47 } ARMCPUClass;
  48
  49 /**
  50  * ARMCPU:
  51  * @env: #CPUARMState
  52  *
  53  * An ARM CPU core.
  54  */
  55 typedef struct ARMCPU {
  56     /*< private >*/
  57     CPUState parent_obj;
  58     /*< public >*/
  59
  60     CPUARMState env;
  61
  62     /* The instance init functions for implementation-specific subclasses
  63      * set these fields to specify the implementation-dependent values of
  64      * various constant registers and reset values of non-constant
  65      * registers.
  66      * Some of these might become QOM properties eventually.
  67      * Field names match the official register names as defined in the
  68      * ARMv7AR ARM Architecture Reference Manual. A reset_ prefix
  69      * is used for reset values of non-constant registers; no reset_
  70      * prefix means a constant register.
  71      */
  72     uint32_t midr;
  73 } ARMCPU;
  74
  75 static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
  76 {
  77     return ARM_CPU(container_of(env, ARMCPU, env));
  78 }
  79
  80 #define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
  81
  82 void arm_cpu_realize(ARMCPU *cpu);
  83
  84 #endif