target-arm/kvm.c

   1 /*
   2  * ARM implementation of KVM hooks
   3  *
   4  * Copyright Christoffer Dall 2009-2010
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #include <stdio.h>
  12 #include <sys/types.h>
  13 #include <sys/ioctl.h>
  14 #include <sys/mman.h>
  15
  16 #include <linux/kvm.h>
  17
  18 #include "qemu-common.h"
  19 #include "qemu/timer.h"
  20 #include "sysemu/sysemu.h"
  21 #include "sysemu/kvm.h"
  22 #include "kvm_arm.h"
  23 #include "cpu.h"
  24 #include "hw/arm/arm.h"
  25
  26 /* Check that cpu.h's idea of coprocessor fields matches KVM's */
  27 #if (CP_REG_SIZE_SHIFT != KVM_REG_SIZE_SHIFT) || \
  28     (CP_REG_SIZE_MASK != KVM_REG_SIZE_MASK) ||   \
  29     (CP_REG_SIZE_U32 != KVM_REG_SIZE_U32) || \
  30     (CP_REG_SIZE_U64 != KVM_REG_SIZE_U64) || \
  31     (CP_REG_ARM != KVM_REG_ARM)
  32 #error mismatch between cpu.h and KVM header definitions
  33 #endif
  34
  35 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
  36     KVM_CAP_LAST_INFO
  37 };
  38
  39 int kvm_arch_init(KVMState *s)
  40 {
  41     /* For ARM interrupt delivery is always asynchronous,
  42      * whether we are using an in-kernel VGIC or not.
  43      */
  44     kvm_async_interrupts_allowed = true;
  45     return 0;
  46 }
  47
  48 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
  49 {
  50     return cpu->cpu_index;
  51 }
  52
  53 static bool reg_syncs_via_tuple_list(uint64_t regidx)
  54 {
  55     /* Return true if the regidx is a register we should synchronize
  56      * via the cpreg_tuples array (ie is not a core reg we sync by
  57      * hand in kvm_arch_get/put_registers())
  58      */
  59     switch (regidx & KVM_REG_ARM_COPROC_MASK) {
  60     case KVM_REG_ARM_CORE:
  61     case KVM_REG_ARM_VFP:
  62         return false;
  63     default:
  64         return true;
  65     }
  66 }
  67
  68 static int compare_u64(const void *a, const void *b)
  69 {
  70     return *(uint64_t *)a - *(uint64_t *)b;
  71 }
  72
  73 int kvm_arch_init_vcpu(CPUState *cs)
  74 {
  75     struct kvm_vcpu_init init;
  76     int i, ret, arraylen;
  77     uint64_t v;
  78     struct kvm_one_reg r;
  79     struct kvm_reg_list rl;
  80     struct kvm_reg_list *rlp;
  81     ARMCPU *cpu = ARM_CPU(cs);
  82
  83     init.target = KVM_ARM_TARGET_CORTEX_A15;
  84     memset(init.features, 0, sizeof(init.features));
  85     ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
  86     if (ret) {
  87         return ret;
  88     }
  89     /* Query the kernel to make sure it supports 32 VFP
  90      * registers: QEMU's "cortex-a15" CPU is always a
  91      * VFP-D32 core. The simplest way to do this is just
  92      * to attempt to read register d31.
  93      */
  94     r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP | 31;
  95     r.addr = (uintptr_t)(&v);
  96     ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
  97     if (ret == -ENOENT) {
  98         return -EINVAL;
  99     }
 100
 101     /* Populate the cpreg list based on the kernel's idea
 102      * of what registers exist (and throw away the TCG-created list).
 103      */
 104     rl.n = 0;
 105     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
 106     if (ret != -E2BIG) {
 107         return ret;
 108     }
 109     rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
 110     rlp->n = rl.n;
 111     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
 112     if (ret) {
 113         goto out;
 114     }
 115     /* Sort the list we get back from the kernel, since cpreg_tuples
 116      * must be in strictly ascending order.
 117      */
 118     qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
 119
 120     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 121         if (!reg_syncs_via_tuple_list(rlp->reg[i])) {
 122             continue;
 123         }
 124         switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
 125         case KVM_REG_SIZE_U32:
 126         case KVM_REG_SIZE_U64:
 127             break;
 128         default:
 129             fprintf(stderr, "Can't handle size of register in kernel list\n");
 130             ret = -EINVAL;
 131             goto out;
 132         }
 133
 134         arraylen++;
 135     }
 136
 137     cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
 138     cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
 139     cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
 140                                          arraylen);
 141     cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
 142                                         arraylen);
 143     cpu->cpreg_array_len = arraylen;
 144     cpu->cpreg_vmstate_array_len = arraylen;
 145
 146     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 147         uint64_t regidx = rlp->reg[i];
 148         if (!reg_syncs_via_tuple_list(regidx)) {
 149             continue;
 150         }
 151         cpu->cpreg_indexes[arraylen] = regidx;
 152         arraylen++;
 153     }
 154     assert(cpu->cpreg_array_len == arraylen);
 155
 156     if (!write_kvmstate_to_list(cpu)) {
 157         /* Shouldn't happen unless kernel is inconsistent about
 158          * what registers exist.
 159          */
 160         fprintf(stderr, "Initial read of kernel register state failed\n");
 161         ret = -EINVAL;
 162         goto out;
 163     }
 164
 165     /* Save a copy of the initial register values so that we can
 166      * feed it back to the kernel on VCPU reset.
 167      */
 168     cpu->cpreg_reset_values = g_memdup(cpu->cpreg_values,
 169                                        cpu->cpreg_array_len *
 170                                        sizeof(cpu->cpreg_values[0]));
 171
 172 out:
 173     g_free(rlp);
 174     return ret;
 175 }
 176
 177 /* We track all the KVM devices which need their memory addresses
 178  * passing to the kernel in a list of these structures.
 179  * When board init is complete we run through the list and
 180  * tell the kernel the base addresses of the memory regions.
 181  * We use a MemoryListener to track mapping and unmapping of
 182  * the regions during board creation, so the board models don't
 183  * need to do anything special for the KVM case.
 184  */
 185 typedef struct KVMDevice {
 186     struct kvm_arm_device_addr kda;
 187     MemoryRegion *mr;
 188     QSLIST_ENTRY(KVMDevice) entries;
 189 } KVMDevice;
 190
 191 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
 192
 193 static void kvm_arm_devlistener_add(MemoryListener *listener,
 194                                     MemoryRegionSection *section)
 195 {
 196     KVMDevice *kd;
 197
 198     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 199         if (section->mr == kd->mr) {
 200             kd->kda.addr = section->offset_within_address_space;
 201         }
 202     }
 203 }
 204
 205 static void kvm_arm_devlistener_del(MemoryListener *listener,
 206                                     MemoryRegionSection *section)
 207 {
 208     KVMDevice *kd;
 209
 210     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 211         if (section->mr == kd->mr) {
 212             kd->kda.addr = -1;
 213         }
 214     }
 215 }
 216
 217 static MemoryListener devlistener = {
 218     .region_add = kvm_arm_devlistener_add,
 219     .region_del = kvm_arm_devlistener_del,
 220 };
 221
 222 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
 223 {
 224     KVMDevice *kd, *tkd;
 225
 226     memory_listener_unregister(&devlistener);
 227     QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
 228         if (kd->kda.addr != -1) {
 229             if (kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR,
 230                              &kd->kda) < 0) {
 231                 fprintf(stderr, "KVM_ARM_SET_DEVICE_ADDRESS failed: %s\n",
 232                         strerror(errno));
 233                 abort();
 234             }
 235         }
 236         g_free(kd);
 237     }
 238 }
 239
 240 static Notifier notify = {
 241     .notify = kvm_arm_machine_init_done,
 242 };
 243
 244 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid)
 245 {
 246     KVMDevice *kd;
 247
 248     if (!kvm_irqchip_in_kernel()) {
 249         return;
 250     }
 251
 252     if (QSLIST_EMPTY(&kvm_devices_head)) {
 253         memory_listener_register(&devlistener, NULL);
 254         qemu_add_machine_init_done_notifier(&notify);
 255     }
 256     kd = g_new0(KVMDevice, 1);
 257     kd->mr = mr;
 258     kd->kda.id = devid;
 259     kd->kda.addr = -1;
 260     QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
 261 }
 262
 263 bool write_kvmstate_to_list(ARMCPU *cpu)
 264 {
 265     CPUState *cs = CPU(cpu);
 266     int i;
 267     bool ok = true;
 268
 269     for (i = 0; i < cpu->cpreg_array_len; i++) {
 270         struct kvm_one_reg r;
 271         uint64_t regidx = cpu->cpreg_indexes[i];
 272         uint32_t v32;
 273         int ret;
 274
 275         r.id = regidx;
 276
 277         switch (regidx & KVM_REG_SIZE_MASK) {
 278         case KVM_REG_SIZE_U32:
 279             r.addr = (uintptr_t)&v32;
 280             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 281             if (!ret) {
 282                 cpu->cpreg_values[i] = v32;
 283             }
 284             break;
 285         case KVM_REG_SIZE_U64:
 286             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 287             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 288             break;
 289         default:
 290             abort();
 291         }
 292         if (ret) {
 293             ok = false;
 294         }
 295     }
 296     return ok;
 297 }
 298
 299 bool write_list_to_kvmstate(ARMCPU *cpu)
 300 {
 301     CPUState *cs = CPU(cpu);
 302     int i;
 303     bool ok = true;
 304
 305     for (i = 0; i < cpu->cpreg_array_len; i++) {
 306         struct kvm_one_reg r;
 307         uint64_t regidx = cpu->cpreg_indexes[i];
 308         uint32_t v32;
 309         int ret;
 310
 311         r.id = regidx;
 312         switch (regidx & KVM_REG_SIZE_MASK) {
 313         case KVM_REG_SIZE_U32:
 314             v32 = cpu->cpreg_values[i];
 315             r.addr = (uintptr_t)&v32;
 316             break;
 317         case KVM_REG_SIZE_U64:
 318             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 319             break;
 320         default:
 321             abort();
 322         }
 323         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 324         if (ret) {
 325             /* We might fail for "unknown register" and also for
 326              * "you tried to set a register which is constant with
 327              * a different value from what it actually contains".
 328              */
 329             ok = false;
 330         }
 331     }
 332     return ok;
 333 }
 334
 335 typedef struct Reg {
 336     uint64_t id;
 337     int offset;
 338 } Reg;
 339
 340 #define COREREG(KERNELNAME, QEMUFIELD)                       \
 341     {                                                        \
 342         KVM_REG_ARM | KVM_REG_SIZE_U32 |                     \
 343         KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(KERNELNAME), \
 344         offsetof(CPUARMState, QEMUFIELD)                     \
 345     }
 346
 347 #define VFPSYSREG(R)                                       \
 348     {                                                      \
 349         KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP | \
 350         KVM_REG_ARM_VFP_##R,                               \
 351         offsetof(CPUARMState, vfp.xregs[ARM_VFP_##R])      \
 352     }
 353
 354 static const Reg regs[] = {
 355     /* R0_usr .. R14_usr */
 356     COREREG(usr_regs.uregs[0], regs[0]),
 357     COREREG(usr_regs.uregs[1], regs[1]),
 358     COREREG(usr_regs.uregs[2], regs[2]),
 359     COREREG(usr_regs.uregs[3], regs[3]),
 360     COREREG(usr_regs.uregs[4], regs[4]),
 361     COREREG(usr_regs.uregs[5], regs[5]),
 362     COREREG(usr_regs.uregs[6], regs[6]),
 363     COREREG(usr_regs.uregs[7], regs[7]),
 364     COREREG(usr_regs.uregs[8], usr_regs[0]),
 365     COREREG(usr_regs.uregs[9], usr_regs[1]),
 366     COREREG(usr_regs.uregs[10], usr_regs[2]),
 367     COREREG(usr_regs.uregs[11], usr_regs[3]),
 368     COREREG(usr_regs.uregs[12], usr_regs[4]),
 369     COREREG(usr_regs.uregs[13], banked_r13[0]),
 370     COREREG(usr_regs.uregs[14], banked_r14[0]),
 371     /* R13, R14, SPSR for SVC, ABT, UND, IRQ banks */
 372     COREREG(svc_regs[0], banked_r13[1]),
 373     COREREG(svc_regs[1], banked_r14[1]),
 374     COREREG(svc_regs[2], banked_spsr[1]),
 375     COREREG(abt_regs[0], banked_r13[2]),
 376     COREREG(abt_regs[1], banked_r14[2]),
 377     COREREG(abt_regs[2], banked_spsr[2]),
 378     COREREG(und_regs[0], banked_r13[3]),
 379     COREREG(und_regs[1], banked_r14[3]),
 380     COREREG(und_regs[2], banked_spsr[3]),
 381     COREREG(irq_regs[0], banked_r13[4]),
 382     COREREG(irq_regs[1], banked_r14[4]),
 383     COREREG(irq_regs[2], banked_spsr[4]),
 384     /* R8_fiq .. R14_fiq and SPSR_fiq */
 385     COREREG(fiq_regs[0], fiq_regs[0]),
 386     COREREG(fiq_regs[1], fiq_regs[1]),
 387     COREREG(fiq_regs[2], fiq_regs[2]),
 388     COREREG(fiq_regs[3], fiq_regs[3]),
 389     COREREG(fiq_regs[4], fiq_regs[4]),
 390     COREREG(fiq_regs[5], banked_r13[5]),
 391     COREREG(fiq_regs[6], banked_r14[5]),
 392     COREREG(fiq_regs[7], banked_spsr[5]),
 393     /* R15 */
 394     COREREG(usr_regs.uregs[15], regs[15]),
 395     /* VFP system registers */
 396     VFPSYSREG(FPSID),
 397     VFPSYSREG(MVFR1),
 398     VFPSYSREG(MVFR0),
 399     VFPSYSREG(FPEXC),
 400     VFPSYSREG(FPINST),
 401     VFPSYSREG(FPINST2),
 402 };
 403
 404 int kvm_arch_put_registers(CPUState *cs, int level)
 405 {
 406     ARMCPU *cpu = ARM_CPU(cs);
 407     CPUARMState *env = &cpu->env;
 408     struct kvm_one_reg r;
 409     int mode, bn;
 410     int ret, i;
 411     uint32_t cpsr, fpscr;
 412
 413     /* Make sure the banked regs are properly set */
 414     mode = env->uncached_cpsr & CPSR_M;
 415     bn = bank_number(mode);
 416     if (mode == ARM_CPU_MODE_FIQ) {
 417         memcpy(env->fiq_regs, env->regs + 8, 5 * sizeof(uint32_t));
 418     } else {
 419         memcpy(env->usr_regs, env->regs + 8, 5 * sizeof(uint32_t));
 420     }
 421     env->banked_r13[bn] = env->regs[13];
 422     env->banked_r14[bn] = env->regs[14];
 423     env->banked_spsr[bn] = env->spsr;
 424
 425     /* Now we can safely copy stuff down to the kernel */
 426     for (i = 0; i < ARRAY_SIZE(regs); i++) {
 427         r.id = regs[i].id;
 428         r.addr = (uintptr_t)(env) + regs[i].offset;
 429         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 430         if (ret) {
 431             return ret;
 432         }
 433     }
 434
 435     /* Special cases which aren't a single CPUARMState field */
 436     cpsr = cpsr_read(env);
 437     r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 |
 438         KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr);
 439     r.addr = (uintptr_t)(&cpsr);
 440     ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 441     if (ret) {
 442         return ret;
 443     }
 444
 445     /* VFP registers */
 446     r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP;
 447     for (i = 0; i < 32; i++) {
 448         r.addr = (uintptr_t)(&env->vfp.regs[i]);
 449         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 450         if (ret) {
 451             return ret;
 452         }
 453         r.id++;
 454     }
 455
 456     r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP |
 457         KVM_REG_ARM_VFP_FPSCR;
 458     fpscr = vfp_get_fpscr(env);
 459     r.addr = (uintptr_t)&fpscr;
 460     ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 461     if (ret) {
 462         return ret;
 463     }
 464
 465     /* Note that we do not call write_cpustate_to_list()
 466      * here, so we are only writing the tuple list back to
 467      * KVM. This is safe because nothing can change the
 468      * CPUARMState cp15 fields (in particular gdb accesses cannot)
 469      * and so there are no changes to sync. In fact syncing would
 470      * be wrong at this point: for a constant register where TCG and
 471      * KVM disagree about its value, the preceding write_list_to_cpustate()
 472      * would not have had any effect on the CPUARMState value (since the
 473      * register is read-only), and a write_cpustate_to_list() here would
 474      * then try to write the TCG value back into KVM -- this would either
 475      * fail or incorrectly change the value the guest sees.
 476      *
 477      * If we ever want to allow the user to modify cp15 registers via
 478      * the gdb stub, we would need to be more clever here (for instance
 479      * tracking the set of registers kvm_arch_get_registers() successfully
 480      * managed to update the CPUARMState with, and only allowing those
 481      * to be written back up into the kernel).
 482      */
 483     if (!write_list_to_kvmstate(cpu)) {
 484         return EINVAL;
 485     }
 486
 487     return ret;
 488 }
 489
 490 int kvm_arch_get_registers(CPUState *cs)
 491 {
 492     ARMCPU *cpu = ARM_CPU(cs);
 493     CPUARMState *env = &cpu->env;
 494     struct kvm_one_reg r;
 495     int mode, bn;
 496     int ret, i;
 497     uint32_t cpsr, fpscr;
 498
 499     for (i = 0; i < ARRAY_SIZE(regs); i++) {
 500         r.id = regs[i].id;
 501         r.addr = (uintptr_t)(env) + regs[i].offset;
 502         ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 503         if (ret) {
 504             return ret;
 505         }
 506     }
 507
 508     /* Special cases which aren't a single CPUARMState field */
 509     r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 |
 510         KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr);
 511     r.addr = (uintptr_t)(&cpsr);
 512     ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 513     if (ret) {
 514         return ret;
 515     }
 516     cpsr_write(env, cpsr, 0xffffffff);
 517
 518     /* Make sure the current mode regs are properly set */
 519     mode = env->uncached_cpsr & CPSR_M;
 520     bn = bank_number(mode);
 521     if (mode == ARM_CPU_MODE_FIQ) {
 522         memcpy(env->regs + 8, env->fiq_regs, 5 * sizeof(uint32_t));
 523     } else {
 524         memcpy(env->regs + 8, env->usr_regs, 5 * sizeof(uint32_t));
 525     }
 526     env->regs[13] = env->banked_r13[bn];
 527     env->regs[14] = env->banked_r14[bn];
 528     env->spsr = env->banked_spsr[bn];
 529
 530     /* VFP registers */
 531     r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP;
 532     for (i = 0; i < 32; i++) {
 533         r.addr = (uintptr_t)(&env->vfp.regs[i]);
 534         ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 535         if (ret) {
 536             return ret;
 537         }
 538         r.id++;
 539     }
 540
 541     r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP |
 542         KVM_REG_ARM_VFP_FPSCR;
 543     r.addr = (uintptr_t)&fpscr;
 544     ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 545     if (ret) {
 546         return ret;
 547     }
 548     vfp_set_fpscr(env, fpscr);
 549
 550     if (!write_kvmstate_to_list(cpu)) {
 551         return EINVAL;
 552     }
 553     /* Note that it's OK to have registers which aren't in CPUState,
 554      * so we can ignore a failure return here.
 555      */
 556     write_list_to_cpustate(cpu);
 557
 558     return 0;
 559 }
 560
 561 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
 562 {
 563 }
 564
 565 void kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
 566 {
 567 }
 568
 569 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
 570 {
 571     return 0;
 572 }
 573
 574 void kvm_arch_reset_vcpu(CPUState *cs)
 575 {
 576     /* Feed the kernel back its initial register state */
 577     ARMCPU *cpu = ARM_CPU(cs);
 578
 579     memmove(cpu->cpreg_values, cpu->cpreg_reset_values,
 580             cpu->cpreg_array_len * sizeof(cpu->cpreg_values[0]));
 581
 582     if (!write_list_to_kvmstate(cpu)) {
 583         abort();
 584     }
 585 }
 586
 587 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
 588 {
 589     return true;
 590 }
 591
 592 int kvm_arch_process_async_events(CPUState *cs)
 593 {
 594     return 0;
 595 }
 596
 597 int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
 598 {
 599     return 1;
 600 }
 601
 602 int kvm_arch_on_sigbus(int code, void *addr)
 603 {
 604     return 1;
 605 }
 606
 607 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
 608 {
 609     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 610 }
 611
 612 int kvm_arch_insert_sw_breakpoint(CPUState *cs,
 613                                   struct kvm_sw_breakpoint *bp)
 614 {
 615     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 616     return -EINVAL;
 617 }
 618
 619 int kvm_arch_insert_hw_breakpoint(target_ulong addr,
 620                                   target_ulong len, int type)
 621 {
 622     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 623     return -EINVAL;
 624 }
 625
 626 int kvm_arch_remove_hw_breakpoint(target_ulong addr,
 627                                   target_ulong len, int type)
 628 {
 629     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 630     return -EINVAL;
 631 }
 632
 633 int kvm_arch_remove_sw_breakpoint(CPUState *cs,
 634                                   struct kvm_sw_breakpoint *bp)
 635 {
 636     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 637     return -EINVAL;
 638 }
 639
 640 void kvm_arch_remove_all_hw_breakpoints(void)
 641 {
 642     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 643 }
 644
 645 void kvm_arch_init_irq_routing(KVMState *s)
 646 {
 647 }