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ARM VFP support (Paul Brook)
[qemu.git] / target-arm / op_helper.c
1 /*
2 * ARM helper routines
3 *
4 * Copyright (c) 2005 CodeSourcery, LLC
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #include <math.h>
22 #include <fenv.h>
23 #include "exec.h"
24
25 /* If the host doesn't define C99 math intrinsics then use the normal
26 operators. This may generate excess exceptions, but it's probably
27 near enough for most things. */
28 #ifndef isless
29 #define isless(x, y) (x < y)
30 #endif
31 #ifndef isgreater
32 #define isgreater(x, y) (x > y)
33 #endif
34 #ifndef isunordered
35 #define isunordered(x, y) (!((x < y) || (x >= y)))
36 #endif
37
38 void raise_exception(int tt)
39 {
40 env->exception_index = tt;
41 cpu_loop_exit();
42 }
43
44 /* thread support */
45
46 spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
47
48 void cpu_lock(void)
49 {
50 spin_lock(&global_cpu_lock);
51 }
52
53 void cpu_unlock(void)
54 {
55 spin_unlock(&global_cpu_lock);
56 }
57
58 /* VFP support. */
59
60 void do_vfp_abss(void)
61 {
62 FT0s = fabsf(FT0s);
63 }
64
65 void do_vfp_absd(void)
66 {
67 FT0d = fabs(FT0d);
68 }
69
70 void do_vfp_sqrts(void)
71 {
72 FT0s = sqrtf(FT0s);
73 }
74
75 void do_vfp_sqrtd(void)
76 {
77 FT0d = sqrt(FT0d);
78 }
79
80 /* We use an == operator first to generate teh correct floating point
81 exception. Subsequent comparisons use the exception-safe macros. */
82 #define DO_VFP_cmp(p) \
83 void do_vfp_cmp##p(void) \
84 { \
85 uint32_t flags; \
86 if (FT0##p == FT1##p) \
87 flags = 0xc; \
88 else if (isless (FT0##p, FT1##p)) \
89 flags = 0x8; \
90 else if (isgreater (FT0##p, FT1##p)) \
91 flags = 0x2; \
92 else /* unordered */ \
93 flags = 0x3; \
94 env->vfp.fpscr = (flags << 28) | (env->vfp.fpscr & 0x0fffffff); \
95 FORCE_RET(); \
96 }
97 DO_VFP_cmp(s)
98 DO_VFP_cmp(d)
99 #undef DO_VFP_cmp
100
101 /* We use a > operator first to get FP exceptions right. */
102 #define DO_VFP_cmpe(p) \
103 void do_vfp_cmpe##p(void) \
104 { \
105 uint32_t flags; \
106 if (FT0##p > FT1##p) \
107 flags = 0x2; \
108 else if (isless (FT0##p, FT1##p)) \
109 flags = 0x8; \
110 else if (isunordered (FT0##p, FT1##p)) \
111 flags = 0x3; \
112 else /* equal */ \
113 flags = 0xc; \
114 env->vfp.fpscr = (flags << 28) | (env->vfp.fpscr & 0x0fffffff); \
115 FORCE_RET(); \
116 }
117 DO_VFP_cmpe(s)
118 DO_VFP_cmpe(d)
119 #undef DO_VFP_cmpe
120
121 /* Convert host exception flags to vfp form. */
122 int vfp_exceptbits_from_host(int host_bits)
123 {
124 int target_bits = 0;
125
126 #ifdef FE_INVALID
127 if (host_bits & FE_INVALID)
128 target_bits |= 1;
129 #endif
130 #ifdef FE_DIVBYZERO
131 if (host_bits & FE_DIVBYZERO)
132 target_bits |= 2;
133 #endif
134 #ifdef FE_OVERFLOW
135 if (host_bits & FE_OVERFLOW)
136 target_bits |= 4;
137 #endif
138 #ifdef FE_UNDERFLOW
139 if (host_bits & FE_UNDERFLOW)
140 target_bits |= 8;
141 #endif
142 #ifdef FE_INEXACT
143 if (host_bits & FE_INEXACT)
144 target_bits |= 0x10;
145 #endif
146 /* C doesn't define an inexact exception. */
147 return target_bits;
148 }
149
150 /* Convert vfp exception flags to target form. */
151 int vfp_host_exceptbits_to_host(int target_bits)
152 {
153 int host_bits = 0;
154
155 #ifdef FE_INVALID
156 if (target_bits & 1)
157 host_bits |= FE_INVALID;
158 #endif
159 #ifdef FE_DIVBYZERO
160 if (target_bits & 2)
161 host_bits |= FE_DIVBYZERO;
162 #endif
163 #ifdef FE_OVERFLOW
164 if (target_bits & 4)
165 host_bits |= FE_OVERFLOW;
166 #endif
167 #ifdef FE_UNDERFLOW
168 if (target_bits & 8)
169 host_bits |= FE_UNDERFLOW;
170 #endif
171 #ifdef FE_INEXACT
172 if (target_bits & 0x10)
173 host_bits |= FE_INEXACT;
174 #endif
175 return host_bits;
176 }
177
178 void do_vfp_set_fpscr(void)
179 {
180 int i;
181 uint32_t changed;
182
183 changed = env->vfp.fpscr;
184 env->vfp.fpscr = (T0 & 0xffc8ffff);
185 env->vfp.vec_len = (T0 >> 16) & 7;
186 env->vfp.vec_stride = (T0 >> 20) & 3;
187
188 changed ^= T0;
189 if (changed & (3 << 22)) {
190 i = (T0 >> 22) & 3;
191 switch (i) {
192 case 0:
193 i = FE_TONEAREST;
194 break;
195 case 1:
196 i = FE_UPWARD;
197 break;
198 case 2:
199 i = FE_DOWNWARD;
200 break;
201 case 3:
202 i = FE_TOWARDZERO;
203 break;
204 }
205 fesetround (i);
206 }
207
208 /* Clear host exception flags. */
209 feclearexcept(FE_ALL_EXCEPT);
210
211 #ifdef feenableexcept
212 if (changed & 0x1f00) {
213 i = vfp_exceptbits_to_host((T0 >> 8) & 0x1f);
214 feenableexcept (i);
215 fedisableexcept (FE_ALL_EXCEPT & ~i);
216 }
217 #endif
218 /* XXX: FZ and DN are not implemented. */
219 }
220
221 void do_vfp_get_fpscr(void)
222 {
223 int i;
224
225 T0 = (env->vfp.fpscr & 0xffc8ffff) | (env->vfp.vec_len << 16)
226 | (env->vfp.vec_stride << 20);
227 i = fetestexcept(FE_ALL_EXCEPT);
228 T0 |= vfp_exceptbits_from_host(i);
229 }