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git.proxmox.com Git - qemu.git/blob - target-cris/op_helper.c
4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
24 #include "host-utils.h"
26 //#define CRIS_OP_HELPER_DEBUG
29 #ifdef CRIS_OP_HELPER_DEBUG
31 #define D_LOG(...) qemu_log(__VA__ARGS__)
34 #define D_LOG(...) do { } while (0)
37 #if !defined(CONFIG_USER_ONLY)
39 #define MMUSUFFIX _mmu
42 #include "softmmu_template.h"
45 #include "softmmu_template.h"
48 #include "softmmu_template.h"
51 #include "softmmu_template.h"
53 /* Try to fill the TLB and return an exception if error. If retaddr is
54 NULL, it means that the function was called in C code (i.e. not
55 from generated code or from helper.c) */
56 /* XXX: fix it to restore all registers */
57 void tlb_fill (target_ulong addr
, int is_write
, int mmu_idx
, void *retaddr
)
64 /* XXX: hack to restore env in all cases, even if not called from
69 D_LOG("%s pc=%x tpc=%x ra=%x\n", __func__
,
70 env
->pc
, env
->debug1
, retaddr
);
71 ret
= cpu_cris_handle_mmu_fault(env
, addr
, is_write
, mmu_idx
, 1);
74 /* now we have a real cpu fault */
75 pc
= (unsigned long)retaddr
;
78 /* the PC is inside the translated code. It means that we have
79 a virtual CPU fault */
80 cpu_restore_state(tb
, env
, pc
);
82 /* Evaluate flags after retranslation. */
83 helper_top_evaluate_flags();
93 void helper_raise_exception(uint32_t index
)
95 env
->exception_index
= index
;
99 void helper_tlb_flush_pid(uint32_t pid
)
101 #if !defined(CONFIG_USER_ONLY)
103 if (pid
!= (env
->pregs
[PR_PID
] & 0xff))
104 cris_mmu_flush_pid(env
, env
->pregs
[PR_PID
]);
108 void helper_spc_write(uint32_t new_spc
)
110 #if !defined(CONFIG_USER_ONLY)
111 tlb_flush_page(env
, env
->pregs
[PR_SPC
]);
112 tlb_flush_page(env
, new_spc
);
116 void helper_dump(uint32_t a0
, uint32_t a1
, uint32_t a2
)
118 qemu_log("%s: a0=%x a1=%x\n", __func__
, a0
, a1
);
121 /* Used by the tlb decoder. */
122 #define EXTRACT_FIELD(src, start, end) \
123 (((src) >> start) & ((1 << (end - start + 1)) - 1))
125 void helper_movl_sreg_reg (uint32_t sreg
, uint32_t reg
)
128 srs
= env
->pregs
[PR_SRS
];
130 env
->sregs
[srs
][sreg
] = env
->regs
[reg
];
132 #if !defined(CONFIG_USER_ONLY)
133 if (srs
== 1 || srs
== 2) {
135 /* Writes to tlb-hi write to mm_cause as a side
137 env
->sregs
[SFR_RW_MM_TLB_HI
] = env
->regs
[reg
];
138 env
->sregs
[SFR_R_MM_CAUSE
] = env
->regs
[reg
];
140 else if (sreg
== 5) {
147 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
152 /* We've just made a write to tlb_lo. */
153 lo
= env
->sregs
[SFR_RW_MM_TLB_LO
];
154 /* Writes are done via r_mm_cause. */
155 hi
= env
->sregs
[SFR_R_MM_CAUSE
];
157 vaddr
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].hi
,
159 vaddr
<<= TARGET_PAGE_BITS
;
160 tlb_v
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].lo
,
162 env
->tlbsets
[srs
- 1][set
][idx
].lo
= lo
;
163 env
->tlbsets
[srs
- 1][set
][idx
].hi
= hi
;
165 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
166 vaddr
, tlb_v
, env
->pc
);
168 tlb_flush_page(env
, vaddr
);
175 void helper_movl_reg_sreg (uint32_t reg
, uint32_t sreg
)
178 env
->pregs
[PR_SRS
] &= 3;
179 srs
= env
->pregs
[PR_SRS
];
181 #if !defined(CONFIG_USER_ONLY)
182 if (srs
== 1 || srs
== 2)
188 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
193 /* Update the mirror regs. */
194 hi
= env
->tlbsets
[srs
- 1][set
][idx
].hi
;
195 lo
= env
->tlbsets
[srs
- 1][set
][idx
].lo
;
196 env
->sregs
[SFR_RW_MM_TLB_HI
] = hi
;
197 env
->sregs
[SFR_RW_MM_TLB_LO
] = lo
;
200 env
->regs
[reg
] = env
->sregs
[srs
][sreg
];
203 static void cris_ccs_rshift(CPUState
*env
)
207 /* Apply the ccs shift. */
208 ccs
= env
->pregs
[PR_CCS
];
209 ccs
= (ccs
& 0xc0000000) | ((ccs
& 0x0fffffff) >> 10);
212 /* Enter user mode. */
213 env
->ksp
= env
->regs
[R_SP
];
214 env
->regs
[R_SP
] = env
->pregs
[PR_USP
];
217 env
->pregs
[PR_CCS
] = ccs
;
220 void helper_rfe(void)
222 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
224 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
225 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
229 cris_ccs_rshift(env
);
231 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
233 env
->pregs
[PR_CCS
] |= P_FLAG
;
236 void helper_rfn(void)
238 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
240 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
241 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
245 cris_ccs_rshift(env
);
247 /* Set the P_FLAG only if the R_FLAG is not set. */
249 env
->pregs
[PR_CCS
] |= P_FLAG
;
251 /* Always set the M flag. */
252 env
->pregs
[PR_CCS
] |= M_FLAG
;
255 uint32_t helper_lz(uint32_t t0
)
260 uint32_t helper_btst(uint32_t t0
, uint32_t t1
, uint32_t ccs
)
262 /* FIXME: clean this up. */
265 The N flag is set according to the selected bit in the dest reg.
266 The Z flag is set if the selected bit and all bits to the right are
268 The X flag is cleared.
269 Other flags are left untouched.
270 The destination reg is not affected.*/
271 unsigned int fz
, sbit
, bset
, mask
, masked_t0
;
274 bset
= !!(t0
& (1 << sbit
));
275 mask
= sbit
== 31 ? -1 : (1 << (sbit
+ 1)) - 1;
276 masked_t0
= t0
& mask
;
277 fz
= !(masked_t0
| bset
);
279 /* Clear the X, N and Z flags. */
280 ccs
= ccs
& ~(X_FLAG
| N_FLAG
| Z_FLAG
);
281 if (env
->pregs
[PR_VR
] < 32)
282 ccs
&= ~(V_FLAG
| C_FLAG
);
283 /* Set the N and Z flags accordingly. */
284 ccs
|= (bset
<< 3) | (fz
<< 2);
288 static inline uint32_t evaluate_flags_writeback(uint32_t flags
, uint32_t ccs
)
290 unsigned int x
, z
, mask
;
292 /* Extended arithmetics, leave the z flag alone. */
294 mask
= env
->cc_mask
| X_FLAG
;
301 /* all insn clear the x-flag except setf or clrf. */
307 uint32_t helper_evaluate_flags_muls(uint32_t ccs
, uint32_t res
, uint32_t mof
)
313 dneg
= ((int32_t)res
) < 0;
322 if ((dneg
&& mof
!= -1)
323 || (!dneg
&& mof
!= 0))
325 return evaluate_flags_writeback(flags
, ccs
);
328 uint32_t helper_evaluate_flags_mulu(uint32_t ccs
, uint32_t res
, uint32_t mof
)
343 return evaluate_flags_writeback(flags
, ccs
);
346 uint32_t helper_evaluate_flags_mcp(uint32_t ccs
,
347 uint32_t src
, uint32_t dst
, uint32_t res
)
351 src
= src
& 0x80000000;
352 dst
= dst
& 0x80000000;
354 if ((res
& 0x80000000L
) != 0L)
372 return evaluate_flags_writeback(flags
, ccs
);
375 uint32_t helper_evaluate_flags_alu_4(uint32_t ccs
,
376 uint32_t src
, uint32_t dst
, uint32_t res
)
380 src
= src
& 0x80000000;
381 dst
= dst
& 0x80000000;
383 if ((res
& 0x80000000L
) != 0L)
401 return evaluate_flags_writeback(flags
, ccs
);
404 uint32_t helper_evaluate_flags_sub_4(uint32_t ccs
,
405 uint32_t src
, uint32_t dst
, uint32_t res
)
409 src
= (~src
) & 0x80000000;
410 dst
= dst
& 0x80000000;
412 if ((res
& 0x80000000L
) != 0L)
431 return evaluate_flags_writeback(flags
, ccs
);
434 uint32_t helper_evaluate_flags_move_4(uint32_t ccs
, uint32_t res
)
438 if ((int32_t)res
< 0)
443 return evaluate_flags_writeback(flags
, ccs
);
445 uint32_t helper_evaluate_flags_move_2(uint32_t ccs
, uint32_t res
)
449 if ((int16_t)res
< 0L)
454 return evaluate_flags_writeback(flags
, ccs
);
457 /* TODO: This is expensive. We could split things up and only evaluate part of
458 CCR on a need to know basis. For now, we simply re-evaluate everything. */
459 void helper_evaluate_flags(void)
461 uint32_t src
, dst
, res
;
466 res
= env
->cc_result
;
468 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
471 /* Now, evaluate the flags. This stuff is based on
472 Per Zander's CRISv10 simulator. */
473 switch (env
->cc_size
)
476 if ((res
& 0x80L
) != 0L)
479 if (((src
& 0x80L
) == 0L)
480 && ((dst
& 0x80L
) == 0L))
484 else if (((src
& 0x80L
) != 0L)
485 && ((dst
& 0x80L
) != 0L))
492 if ((res
& 0xFFL
) == 0L)
496 if (((src
& 0x80L
) != 0L)
497 && ((dst
& 0x80L
) != 0L))
501 if ((dst
& 0x80L
) != 0L
502 || (src
& 0x80L
) != 0L)
509 if ((res
& 0x8000L
) != 0L)
512 if (((src
& 0x8000L
) == 0L)
513 && ((dst
& 0x8000L
) == 0L))
517 else if (((src
& 0x8000L
) != 0L)
518 && ((dst
& 0x8000L
) != 0L))
525 if ((res
& 0xFFFFL
) == 0L)
529 if (((src
& 0x8000L
) != 0L)
530 && ((dst
& 0x8000L
) != 0L))
534 if ((dst
& 0x8000L
) != 0L
535 || (src
& 0x8000L
) != 0L)
542 if ((res
& 0x80000000L
) != 0L)
545 if (((src
& 0x80000000L
) == 0L)
546 && ((dst
& 0x80000000L
) == 0L))
550 else if (((src
& 0x80000000L
) != 0L) &&
551 ((dst
& 0x80000000L
) != 0L))
560 if (((src
& 0x80000000L
) != 0L)
561 && ((dst
& 0x80000000L
) != 0L))
563 if ((dst
& 0x80000000L
) != 0L
564 || (src
& 0x80000000L
) != 0L)
572 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
575 env
->pregs
[PR_CCS
] = evaluate_flags_writeback(flags
, env
->pregs
[PR_CCS
]);
578 void helper_top_evaluate_flags(void)
583 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mcp(
584 env
->pregs
[PR_CCS
], env
->cc_src
,
585 env
->cc_dest
, env
->cc_result
);
588 env
->pregs
[PR_CCS
] = helper_evaluate_flags_muls(
589 env
->pregs
[PR_CCS
], env
->cc_result
,
593 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mulu(
594 env
->pregs
[PR_CCS
], env
->cc_result
,
604 switch (env
->cc_size
)
608 helper_evaluate_flags_move_4(
614 helper_evaluate_flags_move_2(
619 helper_evaluate_flags();
628 if (env
->cc_size
== 4)
630 helper_evaluate_flags_sub_4(
632 env
->cc_src
, env
->cc_dest
,
635 helper_evaluate_flags();
639 switch (env
->cc_size
)
643 helper_evaluate_flags_alu_4(
645 env
->cc_src
, env
->cc_dest
,
649 helper_evaluate_flags();