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convert remaining segment handling to TCG
[qemu.git] / target-i386 / TODO
1 Correctness issues:
2
3 - rework eflags optimization (will be a consequence of TCG port)
4 - SVM: rework the implementation: simplify code, move most intercept
5 tests as dynamic, correct segment access, verify exception safety,
6 cpu save/restore, SMM save/restore.
7 - x86_64: fxsave/fxrestore intel/amd differences
8 - x86_64: lcall/ljmp intel/amd differences ?
9 - x86_64: cmpxchgl intel/amd differences ?
10 - x86_64: cmovl intel/amd differences ?
11 - cmpxchg16b + cmpxchg8b cpuid test
12 - x86: monitor invalid
13 - better code fetch (different exception handling + CS.limit support)
14 - user/kernel PUSHL/POPL in helper.c
15 - add missing cpuid tests
16 - return UD exception if LOCK prefix incorrectly used
17 - test ldt limit < 7 ?
18 - fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret)
19 - full support of segment limit/rights
20 - full x87 exception support
21 - improve x87 bit exactness (use bochs code ?)
22 - DRx register support
23 - CR0.AC emulation
24 - SSE alignment checks
25 - fix SSE min/max with nans
26
27 Optimizations/Features:
28
29 - finish TCG port
30 - add SVM nested paging support
31 - add VMX support
32 - add AVX support
33 - add SSE5 support
34 - faster EFLAGS update: consider SZAP, C, O can be updated separately
35 with a bit field in CC_OP and more state variables.
36 - evaluate x87 stack pointer statically
37 - find a way to avoid translating several time the same TB if CR0.TS
38 is set or not.
39 - move kqemu support outside target-i386.