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target-i386: Implement ADX extension
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1 /*
2 * x86 condition code helpers
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "cpu.h"
21 #include "helper.h"
22
23 const uint8_t parity_table[256] = {
24 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
25 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
26 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
27 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
28 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
29 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
30 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
31 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
32 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
33 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
34 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
35 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
36 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
37 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
38 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
39 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
40 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
41 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
42 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
43 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
44 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
45 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
46 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
47 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
48 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
49 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
50 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
51 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
52 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
53 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
54 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
55 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
56 };
57
58 #define SHIFT 0
59 #include "cc_helper_template.h"
60 #undef SHIFT
61
62 #define SHIFT 1
63 #include "cc_helper_template.h"
64 #undef SHIFT
65
66 #define SHIFT 2
67 #include "cc_helper_template.h"
68 #undef SHIFT
69
70 #ifdef TARGET_X86_64
71
72 #define SHIFT 3
73 #include "cc_helper_template.h"
74 #undef SHIFT
75
76 #endif
77
78 static target_ulong compute_all_adcx(target_ulong dst, target_ulong src1,
79 target_ulong src2)
80 {
81 return (src1 & ~CC_C) | (dst * CC_C);
82 }
83
84 static target_ulong compute_all_adox(target_ulong dst, target_ulong src1,
85 target_ulong src2)
86 {
87 return (src1 & ~CC_O) | (src2 * CC_O);
88 }
89
90 static target_ulong compute_all_adcox(target_ulong dst, target_ulong src1,
91 target_ulong src2)
92 {
93 return (src1 & ~(CC_C | CC_O)) | (dst * CC_C) | (src2 * CC_O);
94 }
95
96 target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
97 target_ulong src2, int op)
98 {
99 switch (op) {
100 default: /* should never happen */
101 return 0;
102
103 case CC_OP_EFLAGS:
104 return src1;
105
106 case CC_OP_MULB:
107 return compute_all_mulb(dst, src1);
108 case CC_OP_MULW:
109 return compute_all_mulw(dst, src1);
110 case CC_OP_MULL:
111 return compute_all_mull(dst, src1);
112
113 case CC_OP_ADDB:
114 return compute_all_addb(dst, src1);
115 case CC_OP_ADDW:
116 return compute_all_addw(dst, src1);
117 case CC_OP_ADDL:
118 return compute_all_addl(dst, src1);
119
120 case CC_OP_ADCB:
121 return compute_all_adcb(dst, src1, src2);
122 case CC_OP_ADCW:
123 return compute_all_adcw(dst, src1, src2);
124 case CC_OP_ADCL:
125 return compute_all_adcl(dst, src1, src2);
126
127 case CC_OP_SUBB:
128 return compute_all_subb(dst, src1);
129 case CC_OP_SUBW:
130 return compute_all_subw(dst, src1);
131 case CC_OP_SUBL:
132 return compute_all_subl(dst, src1);
133
134 case CC_OP_SBBB:
135 return compute_all_sbbb(dst, src1, src2);
136 case CC_OP_SBBW:
137 return compute_all_sbbw(dst, src1, src2);
138 case CC_OP_SBBL:
139 return compute_all_sbbl(dst, src1, src2);
140
141 case CC_OP_LOGICB:
142 return compute_all_logicb(dst, src1);
143 case CC_OP_LOGICW:
144 return compute_all_logicw(dst, src1);
145 case CC_OP_LOGICL:
146 return compute_all_logicl(dst, src1);
147
148 case CC_OP_INCB:
149 return compute_all_incb(dst, src1);
150 case CC_OP_INCW:
151 return compute_all_incw(dst, src1);
152 case CC_OP_INCL:
153 return compute_all_incl(dst, src1);
154
155 case CC_OP_DECB:
156 return compute_all_decb(dst, src1);
157 case CC_OP_DECW:
158 return compute_all_decw(dst, src1);
159 case CC_OP_DECL:
160 return compute_all_decl(dst, src1);
161
162 case CC_OP_SHLB:
163 return compute_all_shlb(dst, src1);
164 case CC_OP_SHLW:
165 return compute_all_shlw(dst, src1);
166 case CC_OP_SHLL:
167 return compute_all_shll(dst, src1);
168
169 case CC_OP_SARB:
170 return compute_all_sarb(dst, src1);
171 case CC_OP_SARW:
172 return compute_all_sarw(dst, src1);
173 case CC_OP_SARL:
174 return compute_all_sarl(dst, src1);
175
176 case CC_OP_BMILGB:
177 return compute_all_bmilgb(dst, src1);
178 case CC_OP_BMILGW:
179 return compute_all_bmilgw(dst, src1);
180 case CC_OP_BMILGL:
181 return compute_all_bmilgl(dst, src1);
182
183 case CC_OP_ADCX:
184 return compute_all_adcx(dst, src1, src2);
185 case CC_OP_ADOX:
186 return compute_all_adox(dst, src1, src2);
187 case CC_OP_ADCOX:
188 return compute_all_adcox(dst, src1, src2);
189
190 #ifdef TARGET_X86_64
191 case CC_OP_MULQ:
192 return compute_all_mulq(dst, src1);
193 case CC_OP_ADDQ:
194 return compute_all_addq(dst, src1);
195 case CC_OP_ADCQ:
196 return compute_all_adcq(dst, src1, src2);
197 case CC_OP_SUBQ:
198 return compute_all_subq(dst, src1);
199 case CC_OP_SBBQ:
200 return compute_all_sbbq(dst, src1, src2);
201 case CC_OP_LOGICQ:
202 return compute_all_logicq(dst, src1);
203 case CC_OP_INCQ:
204 return compute_all_incq(dst, src1);
205 case CC_OP_DECQ:
206 return compute_all_decq(dst, src1);
207 case CC_OP_SHLQ:
208 return compute_all_shlq(dst, src1);
209 case CC_OP_SARQ:
210 return compute_all_sarq(dst, src1);
211 case CC_OP_BMILGQ:
212 return compute_all_bmilgq(dst, src1);
213 #endif
214 }
215 }
216
217 uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
218 {
219 return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, op);
220 }
221
222 target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1,
223 target_ulong src2, int op)
224 {
225 switch (op) {
226 default: /* should never happen */
227 case CC_OP_LOGICB:
228 case CC_OP_LOGICW:
229 case CC_OP_LOGICL:
230 case CC_OP_LOGICQ:
231 return 0;
232
233 case CC_OP_EFLAGS:
234 case CC_OP_SARB:
235 case CC_OP_SARW:
236 case CC_OP_SARL:
237 case CC_OP_SARQ:
238 case CC_OP_ADOX:
239 return src1 & 1;
240
241 case CC_OP_INCB:
242 case CC_OP_INCW:
243 case CC_OP_INCL:
244 case CC_OP_INCQ:
245 case CC_OP_DECB:
246 case CC_OP_DECW:
247 case CC_OP_DECL:
248 case CC_OP_DECQ:
249 return src1;
250
251 case CC_OP_MULB:
252 case CC_OP_MULW:
253 case CC_OP_MULL:
254 case CC_OP_MULQ:
255 return src1 != 0;
256
257 case CC_OP_ADCX:
258 case CC_OP_ADCOX:
259 return dst;
260
261 case CC_OP_ADDB:
262 return compute_c_addb(dst, src1);
263 case CC_OP_ADDW:
264 return compute_c_addw(dst, src1);
265 case CC_OP_ADDL:
266 return compute_c_addl(dst, src1);
267
268 case CC_OP_ADCB:
269 return compute_c_adcb(dst, src1, src2);
270 case CC_OP_ADCW:
271 return compute_c_adcw(dst, src1, src2);
272 case CC_OP_ADCL:
273 return compute_c_adcl(dst, src1, src2);
274
275 case CC_OP_SUBB:
276 return compute_c_subb(dst, src1);
277 case CC_OP_SUBW:
278 return compute_c_subw(dst, src1);
279 case CC_OP_SUBL:
280 return compute_c_subl(dst, src1);
281
282 case CC_OP_SBBB:
283 return compute_c_sbbb(dst, src1, src2);
284 case CC_OP_SBBW:
285 return compute_c_sbbw(dst, src1, src2);
286 case CC_OP_SBBL:
287 return compute_c_sbbl(dst, src1, src2);
288
289 case CC_OP_SHLB:
290 return compute_c_shlb(dst, src1);
291 case CC_OP_SHLW:
292 return compute_c_shlw(dst, src1);
293 case CC_OP_SHLL:
294 return compute_c_shll(dst, src1);
295
296 case CC_OP_BMILGB:
297 return compute_c_bmilgb(dst, src1);
298 case CC_OP_BMILGW:
299 return compute_c_bmilgw(dst, src1);
300 case CC_OP_BMILGL:
301 return compute_c_bmilgl(dst, src1);
302
303 #ifdef TARGET_X86_64
304 case CC_OP_ADDQ:
305 return compute_c_addq(dst, src1);
306 case CC_OP_ADCQ:
307 return compute_c_adcq(dst, src1, src2);
308 case CC_OP_SUBQ:
309 return compute_c_subq(dst, src1);
310 case CC_OP_SBBQ:
311 return compute_c_sbbq(dst, src1, src2);
312 case CC_OP_SHLQ:
313 return compute_c_shlq(dst, src1);
314 case CC_OP_BMILGQ:
315 return compute_c_bmilgq(dst, src1);
316 #endif
317 }
318 }
319
320 void helper_write_eflags(CPUX86State *env, target_ulong t0,
321 uint32_t update_mask)
322 {
323 cpu_load_eflags(env, t0, update_mask);
324 }
325
326 target_ulong helper_read_eflags(CPUX86State *env)
327 {
328 uint32_t eflags;
329
330 eflags = cpu_cc_compute_all(env, CC_OP);
331 eflags |= (DF & DF_MASK);
332 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
333 return eflags;
334 }
335
336 void helper_clts(CPUX86State *env)
337 {
338 env->cr[0] &= ~CR0_TS_MASK;
339 env->hflags &= ~HF_TS_MASK;
340 }
341
342 void helper_reset_rf(CPUX86State *env)
343 {
344 env->eflags &= ~RF_MASK;
345 }
346
347 void helper_cli(CPUX86State *env)
348 {
349 env->eflags &= ~IF_MASK;
350 }
351
352 void helper_sti(CPUX86State *env)
353 {
354 env->eflags |= IF_MASK;
355 }
356
357 void helper_clac(CPUX86State *env)
358 {
359 env->eflags &= ~AC_MASK;
360 }
361
362 void helper_stac(CPUX86State *env)
363 {
364 env->eflags |= AC_MASK;
365 }
366
367 #if 0
368 /* vm86plus instructions */
369 void helper_cli_vm(CPUX86State *env)
370 {
371 env->eflags &= ~VIF_MASK;
372 }
373
374 void helper_sti_vm(CPUX86State *env)
375 {
376 env->eflags |= VIF_MASK;
377 if (env->eflags & VIP_MASK) {
378 raise_exception(env, EXCP0D_GPF);
379 }
380 }
381 #endif
382
383 void helper_set_inhibit_irq(CPUX86State *env)
384 {
385 env->hflags |= HF_INHIBIT_IRQ_MASK;
386 }
387
388 void helper_reset_inhibit_irq(CPUX86State *env)
389 {
390 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
391 }