target-i386/exec.h

   1 /*
   2  *  i386 execution defines
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "config.h"
  20 #include "dyngen-exec.h"
  21
  22 /* XXX: factorize this mess */
  23 #ifdef TARGET_X86_64
  24 #define TARGET_LONG_BITS 64
  25 #else
  26 #define TARGET_LONG_BITS 32
  27 #endif
  28
  29 #include "cpu-defs.h"
  30
  31 register struct CPUX86State *env asm(AREG0);
  32
  33 #include "qemu-common.h"
  34 #include "qemu-log.h"
  35
  36 #undef EAX
  37 #define EAX (env->regs[R_EAX])
  38 #undef ECX
  39 #define ECX (env->regs[R_ECX])
  40 #undef EDX
  41 #define EDX (env->regs[R_EDX])
  42 #undef EBX
  43 #define EBX (env->regs[R_EBX])
  44 #undef ESP
  45 #define ESP (env->regs[R_ESP])
  46 #undef EBP
  47 #define EBP (env->regs[R_EBP])
  48 #undef ESI
  49 #define ESI (env->regs[R_ESI])
  50 #undef EDI
  51 #define EDI (env->regs[R_EDI])
  52 #undef EIP
  53 #define EIP (env->eip)
  54 #define DF  (env->df)
  55
  56 #define CC_SRC (env->cc_src)
  57 #define CC_DST (env->cc_dst)
  58 #define CC_OP  (env->cc_op)
  59
  60 /* float macros */
  61 #define FT0    (env->ft0)
  62 #define ST0    (env->fpregs[env->fpstt].d)
  63 #define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
  64 #define ST1    ST(1)
  65
  66 #include "cpu.h"
  67 #include "exec-all.h"
  68
  69 /* op_helper.c */
  70 void do_interrupt(int intno, int is_int, int error_code,
  71                   target_ulong next_eip, int is_hw);
  72 void do_interrupt_user(int intno, int is_int, int error_code,
  73                        target_ulong next_eip);
  74 void QEMU_NORETURN raise_exception_err(int exception_index, int error_code);
  75 void QEMU_NORETURN raise_exception(int exception_index);
  76 void QEMU_NORETURN raise_exception_env(int exception_index, CPUState *nenv);
  77 void do_smm_enter(void);
  78
  79 /* n must be a constant to be efficient */
  80 static inline target_long lshift(target_long x, int n)
  81 {
  82     if (n >= 0)
  83         return x << n;
  84     else
  85         return x >> (-n);
  86 }
  87
  88 #include "helper.h"
  89
  90 static inline void svm_check_intercept(uint32_t type)
  91 {
  92     helper_svm_check_intercept_param(type, 0);
  93 }
  94
  95 #if !defined(CONFIG_USER_ONLY)
  96
  97 #include "softmmu_exec.h"
  98
  99 #endif /* !defined(CONFIG_USER_ONLY) */
 100
 101 #ifdef USE_X86LDOUBLE
 102 /* use long double functions */
 103 #define floatx_to_int32 floatx80_to_int32
 104 #define floatx_to_int64 floatx80_to_int64
 105 #define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
 106 #define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
 107 #define int32_to_floatx int32_to_floatx80
 108 #define int64_to_floatx int64_to_floatx80
 109 #define float32_to_floatx float32_to_floatx80
 110 #define float64_to_floatx float64_to_floatx80
 111 #define floatx_to_float32 floatx80_to_float32
 112 #define floatx_to_float64 floatx80_to_float64
 113 #define floatx_add floatx80_add
 114 #define floatx_mul floatx80_mul
 115 #define floatx_sub floatx80_sub
 116 #define floatx_abs floatx80_abs
 117 #define floatx_chs floatx80_chs
 118 #define floatx_scalbn floatx80_scalbn
 119 #define floatx_round_to_int floatx80_round_to_int
 120 #define floatx_compare floatx80_compare
 121 #define floatx_compare_quiet floatx80_compare_quiet
 122 #define floatx_is_any_nan floatx80_is_any_nan
 123 #else
 124 #define floatx_to_int32 float64_to_int32
 125 #define floatx_to_int64 float64_to_int64
 126 #define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
 127 #define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
 128 #define int32_to_floatx int32_to_float64
 129 #define int64_to_floatx int64_to_float64
 130 #define float32_to_floatx float32_to_float64
 131 #define float64_to_floatx(x, e) (x)
 132 #define floatx_to_float32 float64_to_float32
 133 #define floatx_to_float64(x, e) (x)
 134 #define floatx_add float64_add
 135 #define floatx_mul float64_mul
 136 #define floatx_sub float64_sub
 137 #define floatx_abs float64_abs
 138 #define floatx_chs float64_chs
 139 #define floatx_scalbn float64_scalbn
 140 #define floatx_round_to_int float64_round_to_int
 141 #define floatx_compare float64_compare
 142 #define floatx_compare_quiet float64_compare_quiet
 143 #define floatx_is_any_nan float64_is_any_nan
 144 #endif
 145
 146 #define RC_MASK         0xc00
 147 #define RC_NEAR         0x000
 148 #define RC_DOWN         0x400
 149 #define RC_UP           0x800
 150 #define RC_CHOP         0xc00
 151
 152 #define MAXTAN 9223372036854775808.0
 153
 154 #ifdef USE_X86LDOUBLE
 155
 156 /* only for x86 */
 157 typedef CPU_LDoubleU CPU86_LDoubleU;
 158
 159 /* the following deal with x86 long double-precision numbers */
 160 #define MAXEXPD 0x7fff
 161 #define EXPBIAS 16383
 162 #define EXPD(fp)        (fp.l.upper & 0x7fff)
 163 #define SIGND(fp)       ((fp.l.upper) & 0x8000)
 164 #define MANTD(fp)       (fp.l.lower)
 165 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
 166
 167 #else
 168
 169 typedef CPU_DoubleU CPU86_LDoubleU;
 170
 171 /* the following deal with IEEE double-precision numbers */
 172 #define MAXEXPD 0x7ff
 173 #define EXPBIAS 1023
 174 #define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
 175 #define SIGND(fp)       ((fp.l.upper) & 0x80000000)
 176 #ifdef __arm__
 177 #define MANTD(fp)       (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
 178 #else
 179 #define MANTD(fp)       (fp.ll & ((1LL << 52) - 1))
 180 #endif
 181 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
 182 #endif
 183
 184 static inline void fpush(void)
 185 {
 186     env->fpstt = (env->fpstt - 1) & 7;
 187     env->fptags[env->fpstt] = 0; /* validate stack entry */
 188 }
 189
 190 static inline void fpop(void)
 191 {
 192     env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
 193     env->fpstt = (env->fpstt + 1) & 7;
 194 }
 195
 196 #ifndef USE_X86LDOUBLE
 197 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 198 {
 199     CPU86_LDoubleU temp;
 200     int upper, e;
 201     uint64_t ll;
 202
 203     /* mantissa */
 204     upper = lduw(ptr + 8);
 205     /* XXX: handle overflow ? */
 206     e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
 207     e |= (upper >> 4) & 0x800; /* sign */
 208     ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
 209 #ifdef __arm__
 210     temp.l.upper = (e << 20) | (ll >> 32);
 211     temp.l.lower = ll;
 212 #else
 213     temp.ll = ll | ((uint64_t)e << 52);
 214 #endif
 215     return temp.d;
 216 }
 217
 218 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 219 {
 220     CPU86_LDoubleU temp;
 221     int e;
 222
 223     temp.d = f;
 224     /* mantissa */
 225     stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
 226     /* exponent + sign */
 227     e = EXPD(temp) - EXPBIAS + 16383;
 228     e |= SIGND(temp) >> 16;
 229     stw(ptr + 8, e);
 230 }
 231 #else
 232
 233 /* we use memory access macros */
 234
 235 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 236 {
 237     CPU86_LDoubleU temp;
 238
 239     temp.l.lower = ldq(ptr);
 240     temp.l.upper = lduw(ptr + 8);
 241     return temp.d;
 242 }
 243
 244 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 245 {
 246     CPU86_LDoubleU temp;
 247
 248     temp.d = f;
 249     stq(ptr, temp.l.lower);
 250     stw(ptr + 8, temp.l.upper);
 251 }
 252
 253 #endif /* USE_X86LDOUBLE */
 254
 255 #define FPUS_IE (1 << 0)
 256 #define FPUS_DE (1 << 1)
 257 #define FPUS_ZE (1 << 2)
 258 #define FPUS_OE (1 << 3)
 259 #define FPUS_UE (1 << 4)
 260 #define FPUS_PE (1 << 5)
 261 #define FPUS_SF (1 << 6)
 262 #define FPUS_SE (1 << 7)
 263 #define FPUS_B  (1 << 15)
 264
 265 #define FPUC_EM 0x3f
 266
 267 static inline uint32_t compute_eflags(void)
 268 {
 269     return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
 270 }
 271
 272 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
 273 static inline void load_eflags(int eflags, int update_mask)
 274 {
 275     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
 276     DF = 1 - (2 * ((eflags >> 10) & 1));
 277     env->eflags = (env->eflags & ~update_mask) |
 278         (eflags & update_mask) | 0x2;
 279 }
 280
 281 static inline int cpu_has_work(CPUState *env)
 282 {
 283     return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
 284             (env->eflags & IF_MASK)) ||
 285            (env->interrupt_request & (CPU_INTERRUPT_NMI |
 286                                       CPU_INTERRUPT_INIT |
 287                                       CPU_INTERRUPT_SIPI |
 288                                       CPU_INTERRUPT_MCE));
 289 }
 290
 291 /* load efer and update the corresponding hflags. XXX: do consistency
 292    checks with cpuid bits ? */
 293 static inline void cpu_load_efer(CPUState *env, uint64_t val)
 294 {
 295     env->efer = val;
 296     env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
 297     if (env->efer & MSR_EFER_LMA)
 298         env->hflags |= HF_LMA_MASK;
 299     if (env->efer & MSR_EFER_SVME)
 300         env->hflags |= HF_SVME_MASK;
 301 }
 302
 303 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
 304 {
 305     env->eip = tb->pc - tb->cs_base;
 306 }
 307