target-i386/exec.h

   1 /*
   2  *  i386 execution defines
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "config.h"
  20 #include "dyngen-exec.h"
  21
  22 /* XXX: factorize this mess */
  23 #ifdef TARGET_X86_64
  24 #define TARGET_LONG_BITS 64
  25 #else
  26 #define TARGET_LONG_BITS 32
  27 #endif
  28
  29 #include "cpu-defs.h"
  30
  31 register struct CPUX86State *env asm(AREG0);
  32
  33 #include "qemu-common.h"
  34 #include "qemu-log.h"
  35
  36 #undef EAX
  37 #define EAX (env->regs[R_EAX])
  38 #undef ECX
  39 #define ECX (env->regs[R_ECX])
  40 #undef EDX
  41 #define EDX (env->regs[R_EDX])
  42 #undef EBX
  43 #define EBX (env->regs[R_EBX])
  44 #undef ESP
  45 #define ESP (env->regs[R_ESP])
  46 #undef EBP
  47 #define EBP (env->regs[R_EBP])
  48 #undef ESI
  49 #define ESI (env->regs[R_ESI])
  50 #undef EDI
  51 #define EDI (env->regs[R_EDI])
  52 #undef EIP
  53 #define EIP (env->eip)
  54 #define DF  (env->df)
  55
  56 #define CC_SRC (env->cc_src)
  57 #define CC_DST (env->cc_dst)
  58 #define CC_OP  (env->cc_op)
  59
  60 /* float macros */
  61 #define FT0    (env->ft0)
  62 #define ST0    (env->fpregs[env->fpstt].d)
  63 #define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
  64 #define ST1    ST(1)
  65
  66 #include "cpu.h"
  67 #include "exec-all.h"
  68
  69 /* op_helper.c */
  70 void QEMU_NORETURN raise_exception_err(int exception_index, int error_code);
  71 void QEMU_NORETURN raise_exception(int exception_index);
  72 void QEMU_NORETURN raise_exception_env(int exception_index, CPUState *nenv);
  73
  74 /* n must be a constant to be efficient */
  75 static inline target_long lshift(target_long x, int n)
  76 {
  77     if (n >= 0)
  78         return x << n;
  79     else
  80         return x >> (-n);
  81 }
  82
  83 #include "helper.h"
  84
  85 #if !defined(CONFIG_USER_ONLY)
  86
  87 #include "softmmu_exec.h"
  88
  89 #endif /* !defined(CONFIG_USER_ONLY) */
  90
  91 #define RC_MASK         0xc00
  92 #define RC_NEAR         0x000
  93 #define RC_DOWN         0x400
  94 #define RC_UP           0x800
  95 #define RC_CHOP         0xc00
  96
  97 #define MAXTAN 9223372036854775808.0
  98
  99 /* the following deal with x86 long double-precision numbers */
 100 #define MAXEXPD 0x7fff
 101 #define EXPBIAS 16383
 102 #define EXPD(fp)        (fp.l.upper & 0x7fff)
 103 #define SIGND(fp)       ((fp.l.upper) & 0x8000)
 104 #define MANTD(fp)       (fp.l.lower)
 105 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
 106
 107 static inline void fpush(void)
 108 {
 109     env->fpstt = (env->fpstt - 1) & 7;
 110     env->fptags[env->fpstt] = 0; /* validate stack entry */
 111 }
 112
 113 static inline void fpop(void)
 114 {
 115     env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
 116     env->fpstt = (env->fpstt + 1) & 7;
 117 }
 118
 119 static inline floatx80 helper_fldt(target_ulong ptr)
 120 {
 121     CPU_LDoubleU temp;
 122
 123     temp.l.lower = ldq(ptr);
 124     temp.l.upper = lduw(ptr + 8);
 125     return temp.d;
 126 }
 127
 128 static inline void helper_fstt(floatx80 f, target_ulong ptr)
 129 {
 130     CPU_LDoubleU temp;
 131
 132     temp.d = f;
 133     stq(ptr, temp.l.lower);
 134     stw(ptr + 8, temp.l.upper);
 135 }
 136
 137 #define FPUS_IE (1 << 0)
 138 #define FPUS_DE (1 << 1)
 139 #define FPUS_ZE (1 << 2)
 140 #define FPUS_OE (1 << 3)
 141 #define FPUS_UE (1 << 4)
 142 #define FPUS_PE (1 << 5)
 143 #define FPUS_SF (1 << 6)
 144 #define FPUS_SE (1 << 7)
 145 #define FPUS_B  (1 << 15)
 146
 147 #define FPUC_EM 0x3f
 148
 149 static inline uint32_t compute_eflags(void)
 150 {
 151     return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
 152 }
 153
 154 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
 155 static inline void load_eflags(int eflags, int update_mask)
 156 {
 157     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
 158     DF = 1 - (2 * ((eflags >> 10) & 1));
 159     env->eflags = (env->eflags & ~update_mask) |
 160         (eflags & update_mask) | 0x2;
 161 }
 162
 163 static inline int cpu_has_work(CPUState *env)
 164 {
 165     return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
 166             (env->eflags & IF_MASK)) ||
 167            (env->interrupt_request & (CPU_INTERRUPT_NMI |
 168                                       CPU_INTERRUPT_INIT |
 169                                       CPU_INTERRUPT_SIPI |
 170                                       CPU_INTERRUPT_MCE));
 171 }
 172
 173 /* load efer and update the corresponding hflags. XXX: do consistency
 174    checks with cpuid bits ? */
 175 static inline void cpu_load_efer(CPUState *env, uint64_t val)
 176 {
 177     env->efer = val;
 178     env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
 179     if (env->efer & MSR_EFER_LMA)
 180         env->hflags |= HF_LMA_MASK;
 181     if (env->efer & MSR_EFER_SVME)
 182         env->hflags |= HF_SVME_MASK;
 183 }
 184
 185 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
 186 {
 187     env->eip = tb->pc - tb->cs_base;
 188 }
 189