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git.proxmox.com Git - qemu.git/blob - target-i386/gdbstub.c
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 * Copyright (c) 2013 SUSE LINUX Products GmbH
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 static const int gpr_map
[16] = {
23 R_EAX
, R_EBX
, R_ECX
, R_EDX
, R_ESI
, R_EDI
, R_EBP
, R_ESP
,
24 8, 9, 10, 11, 12, 13, 14, 15
27 #define gpr_map gpr_map32
29 static const int gpr_map32
[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
31 #define IDX_IP_REG CPU_NB_REGS
32 #define IDX_FLAGS_REG (IDX_IP_REG + 1)
33 #define IDX_SEG_REGS (IDX_FLAGS_REG + 1)
34 #define IDX_FP_REGS (IDX_SEG_REGS + 6)
35 #define IDX_XMM_REGS (IDX_FP_REGS + 16)
36 #define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS)
38 static int cpu_gdb_read_register(CPUX86State
*env
, uint8_t *mem_buf
, int n
)
40 if (n
< CPU_NB_REGS
) {
41 if (TARGET_LONG_BITS
== 64 && env
->hflags
& HF_CS64_MASK
) {
42 return gdb_get_reg64(mem_buf
, env
->regs
[gpr_map
[n
]]);
43 } else if (n
< CPU_NB_REGS32
) {
44 return gdb_get_reg32(mem_buf
, env
->regs
[gpr_map32
[n
]]);
46 } else if (n
>= IDX_FP_REGS
&& n
< IDX_FP_REGS
+ 8) {
48 /* FIXME: byteswap float values - after fixing fpregs layout. */
49 memcpy(mem_buf
, &env
->fpregs
[n
- IDX_FP_REGS
], 10);
51 memset(mem_buf
, 0, 10);
54 } else if (n
>= IDX_XMM_REGS
&& n
< IDX_XMM_REGS
+ CPU_NB_REGS
) {
56 if (n
< CPU_NB_REGS32
||
57 (TARGET_LONG_BITS
== 64 && env
->hflags
& HF_CS64_MASK
)) {
58 stq_p(mem_buf
, env
->xmm_regs
[n
].XMM_Q(0));
59 stq_p(mem_buf
+ 8, env
->xmm_regs
[n
].XMM_Q(1));
65 if (TARGET_LONG_BITS
== 64 && env
->hflags
& HF_CS64_MASK
) {
66 return gdb_get_reg64(mem_buf
, env
->eip
);
68 return gdb_get_reg32(mem_buf
, env
->eip
);
71 return gdb_get_reg32(mem_buf
, env
->eflags
);
74 return gdb_get_reg32(mem_buf
, env
->segs
[R_CS
].selector
);
75 case IDX_SEG_REGS
+ 1:
76 return gdb_get_reg32(mem_buf
, env
->segs
[R_SS
].selector
);
77 case IDX_SEG_REGS
+ 2:
78 return gdb_get_reg32(mem_buf
, env
->segs
[R_DS
].selector
);
79 case IDX_SEG_REGS
+ 3:
80 return gdb_get_reg32(mem_buf
, env
->segs
[R_ES
].selector
);
81 case IDX_SEG_REGS
+ 4:
82 return gdb_get_reg32(mem_buf
, env
->segs
[R_FS
].selector
);
83 case IDX_SEG_REGS
+ 5:
84 return gdb_get_reg32(mem_buf
, env
->segs
[R_GS
].selector
);
87 return gdb_get_reg32(mem_buf
, env
->fpuc
);
89 return gdb_get_reg32(mem_buf
, (env
->fpus
& ~0x3800) |
90 (env
->fpstt
& 0x7) << 11);
91 case IDX_FP_REGS
+ 10:
92 return gdb_get_reg32(mem_buf
, 0); /* ftag */
93 case IDX_FP_REGS
+ 11:
94 return gdb_get_reg32(mem_buf
, 0); /* fiseg */
95 case IDX_FP_REGS
+ 12:
96 return gdb_get_reg32(mem_buf
, 0); /* fioff */
97 case IDX_FP_REGS
+ 13:
98 return gdb_get_reg32(mem_buf
, 0); /* foseg */
99 case IDX_FP_REGS
+ 14:
100 return gdb_get_reg32(mem_buf
, 0); /* fooff */
101 case IDX_FP_REGS
+ 15:
102 return gdb_get_reg32(mem_buf
, 0); /* fop */
105 return gdb_get_reg32(mem_buf
, env
->mxcsr
);
111 static int cpu_x86_gdb_load_seg(CPUX86State
*env
, int sreg
, uint8_t *mem_buf
)
113 uint16_t selector
= ldl_p(mem_buf
);
115 if (selector
!= env
->segs
[sreg
].selector
) {
116 #if defined(CONFIG_USER_ONLY)
117 cpu_x86_load_seg(env
, sreg
, selector
);
119 unsigned int limit
, flags
;
122 if (!(env
->cr
[0] & CR0_PE_MASK
) || (env
->eflags
& VM_MASK
)) {
123 base
= selector
<< 4;
127 if (!cpu_x86_get_descr_debug(env
, selector
, &base
, &limit
,
132 cpu_x86_load_seg_cache(env
, sreg
, selector
, base
, limit
, flags
);
138 static int cpu_gdb_write_register(CPUX86State
*env
, uint8_t *mem_buf
, int n
)
142 if (n
< CPU_NB_REGS
) {
143 if (TARGET_LONG_BITS
== 64 && env
->hflags
& HF_CS64_MASK
) {
144 env
->regs
[gpr_map
[n
]] = ldtul_p(mem_buf
);
145 return sizeof(target_ulong
);
146 } else if (n
< CPU_NB_REGS32
) {
148 env
->regs
[n
] &= ~0xffffffffUL
;
149 env
->regs
[n
] |= (uint32_t)ldl_p(mem_buf
);
152 } else if (n
>= IDX_FP_REGS
&& n
< IDX_FP_REGS
+ 8) {
153 #ifdef USE_X86LDOUBLE
154 /* FIXME: byteswap float values - after fixing fpregs layout. */
155 memcpy(&env
->fpregs
[n
- IDX_FP_REGS
], mem_buf
, 10);
158 } else if (n
>= IDX_XMM_REGS
&& n
< IDX_XMM_REGS
+ CPU_NB_REGS
) {
160 if (n
< CPU_NB_REGS32
||
161 (TARGET_LONG_BITS
== 64 && env
->hflags
& HF_CS64_MASK
)) {
162 env
->xmm_regs
[n
].XMM_Q(0) = ldq_p(mem_buf
);
163 env
->xmm_regs
[n
].XMM_Q(1) = ldq_p(mem_buf
+ 8);
169 if (TARGET_LONG_BITS
== 64 && env
->hflags
& HF_CS64_MASK
) {
170 env
->eip
= ldq_p(mem_buf
);
173 env
->eip
&= ~0xffffffffUL
;
174 env
->eip
|= (uint32_t)ldl_p(mem_buf
);
178 env
->eflags
= ldl_p(mem_buf
);
182 return cpu_x86_gdb_load_seg(env
, R_CS
, mem_buf
);
183 case IDX_SEG_REGS
+ 1:
184 return cpu_x86_gdb_load_seg(env
, R_SS
, mem_buf
);
185 case IDX_SEG_REGS
+ 2:
186 return cpu_x86_gdb_load_seg(env
, R_DS
, mem_buf
);
187 case IDX_SEG_REGS
+ 3:
188 return cpu_x86_gdb_load_seg(env
, R_ES
, mem_buf
);
189 case IDX_SEG_REGS
+ 4:
190 return cpu_x86_gdb_load_seg(env
, R_FS
, mem_buf
);
191 case IDX_SEG_REGS
+ 5:
192 return cpu_x86_gdb_load_seg(env
, R_GS
, mem_buf
);
194 case IDX_FP_REGS
+ 8:
195 env
->fpuc
= ldl_p(mem_buf
);
197 case IDX_FP_REGS
+ 9:
198 tmp
= ldl_p(mem_buf
);
199 env
->fpstt
= (tmp
>> 11) & 7;
200 env
->fpus
= tmp
& ~0x3800;
202 case IDX_FP_REGS
+ 10: /* ftag */
204 case IDX_FP_REGS
+ 11: /* fiseg */
206 case IDX_FP_REGS
+ 12: /* fioff */
208 case IDX_FP_REGS
+ 13: /* foseg */
210 case IDX_FP_REGS
+ 14: /* fooff */
212 case IDX_FP_REGS
+ 15: /* fop */
216 env
->mxcsr
= ldl_p(mem_buf
);
220 /* Unrecognised register. */