]> git.proxmox.com Git - qemu.git/blob - target-i386/op.c
16/32 stack operations fix on x86_64 (aka win2000 startup bug)
[qemu.git] / target-i386 / op.c
1 /*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #define ASM_SOFTMMU
22 #include "exec.h"
23
24 /* n must be a constant to be efficient */
25 static inline target_long lshift(target_long x, int n)
26 {
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31 }
32
33 /* we define the various pieces of code used by the JIT */
34
35 #define REG EAX
36 #define REGNAME _EAX
37 #include "opreg_template.h"
38 #undef REG
39 #undef REGNAME
40
41 #define REG ECX
42 #define REGNAME _ECX
43 #include "opreg_template.h"
44 #undef REG
45 #undef REGNAME
46
47 #define REG EDX
48 #define REGNAME _EDX
49 #include "opreg_template.h"
50 #undef REG
51 #undef REGNAME
52
53 #define REG EBX
54 #define REGNAME _EBX
55 #include "opreg_template.h"
56 #undef REG
57 #undef REGNAME
58
59 #define REG ESP
60 #define REGNAME _ESP
61 #include "opreg_template.h"
62 #undef REG
63 #undef REGNAME
64
65 #define REG EBP
66 #define REGNAME _EBP
67 #include "opreg_template.h"
68 #undef REG
69 #undef REGNAME
70
71 #define REG ESI
72 #define REGNAME _ESI
73 #include "opreg_template.h"
74 #undef REG
75 #undef REGNAME
76
77 #define REG EDI
78 #define REGNAME _EDI
79 #include "opreg_template.h"
80 #undef REG
81 #undef REGNAME
82
83 #ifdef TARGET_X86_64
84
85 #define REG (env->regs[8])
86 #define REGNAME _R8
87 #include "opreg_template.h"
88 #undef REG
89 #undef REGNAME
90
91 #define REG (env->regs[9])
92 #define REGNAME _R9
93 #include "opreg_template.h"
94 #undef REG
95 #undef REGNAME
96
97 #define REG (env->regs[10])
98 #define REGNAME _R10
99 #include "opreg_template.h"
100 #undef REG
101 #undef REGNAME
102
103 #define REG (env->regs[11])
104 #define REGNAME _R11
105 #include "opreg_template.h"
106 #undef REG
107 #undef REGNAME
108
109 #define REG (env->regs[12])
110 #define REGNAME _R12
111 #include "opreg_template.h"
112 #undef REG
113 #undef REGNAME
114
115 #define REG (env->regs[13])
116 #define REGNAME _R13
117 #include "opreg_template.h"
118 #undef REG
119 #undef REGNAME
120
121 #define REG (env->regs[14])
122 #define REGNAME _R14
123 #include "opreg_template.h"
124 #undef REG
125 #undef REGNAME
126
127 #define REG (env->regs[15])
128 #define REGNAME _R15
129 #include "opreg_template.h"
130 #undef REG
131 #undef REGNAME
132
133 #endif
134
135 /* operations with flags */
136
137 /* update flags with T0 and T1 (add/sub case) */
138 void OPPROTO op_update2_cc(void)
139 {
140 CC_SRC = T1;
141 CC_DST = T0;
142 }
143
144 /* update flags with T0 (logic operation case) */
145 void OPPROTO op_update1_cc(void)
146 {
147 CC_DST = T0;
148 }
149
150 void OPPROTO op_update_neg_cc(void)
151 {
152 CC_SRC = -T0;
153 CC_DST = T0;
154 }
155
156 void OPPROTO op_cmpl_T0_T1_cc(void)
157 {
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160 }
161
162 void OPPROTO op_update_inc_cc(void)
163 {
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166 }
167
168 void OPPROTO op_testl_T0_T1_cc(void)
169 {
170 CC_DST = T0 & T1;
171 }
172
173 /* operations without flags */
174
175 void OPPROTO op_addl_T0_T1(void)
176 {
177 T0 += T1;
178 }
179
180 void OPPROTO op_orl_T0_T1(void)
181 {
182 T0 |= T1;
183 }
184
185 void OPPROTO op_andl_T0_T1(void)
186 {
187 T0 &= T1;
188 }
189
190 void OPPROTO op_subl_T0_T1(void)
191 {
192 T0 -= T1;
193 }
194
195 void OPPROTO op_xorl_T0_T1(void)
196 {
197 T0 ^= T1;
198 }
199
200 void OPPROTO op_negl_T0(void)
201 {
202 T0 = -T0;
203 }
204
205 void OPPROTO op_incl_T0(void)
206 {
207 T0++;
208 }
209
210 void OPPROTO op_decl_T0(void)
211 {
212 T0--;
213 }
214
215 void OPPROTO op_notl_T0(void)
216 {
217 T0 = ~T0;
218 }
219
220 void OPPROTO op_bswapl_T0(void)
221 {
222 T0 = bswap32(T0);
223 }
224
225 #ifdef TARGET_X86_64
226 void OPPROTO op_bswapq_T0(void)
227 {
228 T0 = bswap64(T0);
229 }
230 #endif
231
232 /* multiply/divide */
233
234 /* XXX: add eflags optimizations */
235 /* XXX: add non P4 style flags */
236
237 void OPPROTO op_mulb_AL_T0(void)
238 {
239 unsigned int res;
240 res = (uint8_t)EAX * (uint8_t)T0;
241 EAX = (EAX & ~0xffff) | res;
242 CC_DST = res;
243 CC_SRC = (res & 0xff00);
244 }
245
246 void OPPROTO op_imulb_AL_T0(void)
247 {
248 int res;
249 res = (int8_t)EAX * (int8_t)T0;
250 EAX = (EAX & ~0xffff) | (res & 0xffff);
251 CC_DST = res;
252 CC_SRC = (res != (int8_t)res);
253 }
254
255 void OPPROTO op_mulw_AX_T0(void)
256 {
257 unsigned int res;
258 res = (uint16_t)EAX * (uint16_t)T0;
259 EAX = (EAX & ~0xffff) | (res & 0xffff);
260 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
261 CC_DST = res;
262 CC_SRC = res >> 16;
263 }
264
265 void OPPROTO op_imulw_AX_T0(void)
266 {
267 int res;
268 res = (int16_t)EAX * (int16_t)T0;
269 EAX = (EAX & ~0xffff) | (res & 0xffff);
270 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
271 CC_DST = res;
272 CC_SRC = (res != (int16_t)res);
273 }
274
275 void OPPROTO op_mull_EAX_T0(void)
276 {
277 uint64_t res;
278 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
279 EAX = (uint32_t)res;
280 EDX = (uint32_t)(res >> 32);
281 CC_DST = (uint32_t)res;
282 CC_SRC = (uint32_t)(res >> 32);
283 }
284
285 void OPPROTO op_imull_EAX_T0(void)
286 {
287 int64_t res;
288 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
289 EAX = (uint32_t)(res);
290 EDX = (uint32_t)(res >> 32);
291 CC_DST = res;
292 CC_SRC = (res != (int32_t)res);
293 }
294
295 void OPPROTO op_imulw_T0_T1(void)
296 {
297 int res;
298 res = (int16_t)T0 * (int16_t)T1;
299 T0 = res;
300 CC_DST = res;
301 CC_SRC = (res != (int16_t)res);
302 }
303
304 void OPPROTO op_imull_T0_T1(void)
305 {
306 int64_t res;
307 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308 T0 = res;
309 CC_DST = res;
310 CC_SRC = (res != (int32_t)res);
311 }
312
313 #ifdef TARGET_X86_64
314 void OPPROTO op_mulq_EAX_T0(void)
315 {
316 helper_mulq_EAX_T0();
317 }
318
319 void OPPROTO op_imulq_EAX_T0(void)
320 {
321 helper_imulq_EAX_T0();
322 }
323
324 void OPPROTO op_imulq_T0_T1(void)
325 {
326 helper_imulq_T0_T1();
327 }
328 #endif
329
330 /* division, flags are undefined */
331
332 void OPPROTO op_divb_AL_T0(void)
333 {
334 unsigned int num, den, q, r;
335
336 num = (EAX & 0xffff);
337 den = (T0 & 0xff);
338 if (den == 0) {
339 raise_exception(EXCP00_DIVZ);
340 }
341 q = (num / den);
342 if (q > 0xff)
343 raise_exception(EXCP00_DIVZ);
344 q &= 0xff;
345 r = (num % den) & 0xff;
346 EAX = (EAX & ~0xffff) | (r << 8) | q;
347 }
348
349 void OPPROTO op_idivb_AL_T0(void)
350 {
351 int num, den, q, r;
352
353 num = (int16_t)EAX;
354 den = (int8_t)T0;
355 if (den == 0) {
356 raise_exception(EXCP00_DIVZ);
357 }
358 q = (num / den);
359 if (q != (int8_t)q)
360 raise_exception(EXCP00_DIVZ);
361 q &= 0xff;
362 r = (num % den) & 0xff;
363 EAX = (EAX & ~0xffff) | (r << 8) | q;
364 }
365
366 void OPPROTO op_divw_AX_T0(void)
367 {
368 unsigned int num, den, q, r;
369
370 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
371 den = (T0 & 0xffff);
372 if (den == 0) {
373 raise_exception(EXCP00_DIVZ);
374 }
375 q = (num / den);
376 if (q > 0xffff)
377 raise_exception(EXCP00_DIVZ);
378 q &= 0xffff;
379 r = (num % den) & 0xffff;
380 EAX = (EAX & ~0xffff) | q;
381 EDX = (EDX & ~0xffff) | r;
382 }
383
384 void OPPROTO op_idivw_AX_T0(void)
385 {
386 int num, den, q, r;
387
388 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
389 den = (int16_t)T0;
390 if (den == 0) {
391 raise_exception(EXCP00_DIVZ);
392 }
393 q = (num / den);
394 if (q != (int16_t)q)
395 raise_exception(EXCP00_DIVZ);
396 q &= 0xffff;
397 r = (num % den) & 0xffff;
398 EAX = (EAX & ~0xffff) | q;
399 EDX = (EDX & ~0xffff) | r;
400 }
401
402 void OPPROTO op_divl_EAX_T0(void)
403 {
404 helper_divl_EAX_T0();
405 }
406
407 void OPPROTO op_idivl_EAX_T0(void)
408 {
409 helper_idivl_EAX_T0();
410 }
411
412 #ifdef TARGET_X86_64
413 void OPPROTO op_divq_EAX_T0(void)
414 {
415 helper_divq_EAX_T0();
416 }
417
418 void OPPROTO op_idivq_EAX_T0(void)
419 {
420 helper_idivq_EAX_T0();
421 }
422 #endif
423
424 /* constant load & misc op */
425
426 /* XXX: consistent names */
427 void OPPROTO op_movl_T0_imu(void)
428 {
429 T0 = (uint32_t)PARAM1;
430 }
431
432 void OPPROTO op_movl_T0_im(void)
433 {
434 T0 = (int32_t)PARAM1;
435 }
436
437 void OPPROTO op_addl_T0_im(void)
438 {
439 T0 += PARAM1;
440 }
441
442 void OPPROTO op_andl_T0_ffff(void)
443 {
444 T0 = T0 & 0xffff;
445 }
446
447 void OPPROTO op_andl_T0_im(void)
448 {
449 T0 = T0 & PARAM1;
450 }
451
452 void OPPROTO op_movl_T0_T1(void)
453 {
454 T0 = T1;
455 }
456
457 void OPPROTO op_movl_T1_imu(void)
458 {
459 T1 = (uint32_t)PARAM1;
460 }
461
462 void OPPROTO op_movl_T1_im(void)
463 {
464 T1 = (int32_t)PARAM1;
465 }
466
467 void OPPROTO op_addl_T1_im(void)
468 {
469 T1 += PARAM1;
470 }
471
472 void OPPROTO op_movl_T1_A0(void)
473 {
474 T1 = A0;
475 }
476
477 void OPPROTO op_movl_A0_im(void)
478 {
479 A0 = (uint32_t)PARAM1;
480 }
481
482 void OPPROTO op_addl_A0_im(void)
483 {
484 A0 = (uint32_t)(A0 + PARAM1);
485 }
486
487 void OPPROTO op_movl_A0_seg(void)
488 {
489 A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
490 }
491
492 void OPPROTO op_addl_A0_seg(void)
493 {
494 A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
495 }
496
497 void OPPROTO op_addl_A0_AL(void)
498 {
499 A0 = (uint32_t)(A0 + (EAX & 0xff));
500 }
501
502 #ifdef WORDS_BIGENDIAN
503 typedef union UREG64 {
504 struct { uint16_t v3, v2, v1, v0; } w;
505 struct { uint32_t v1, v0; } l;
506 uint64_t q;
507 } UREG64;
508 #else
509 typedef union UREG64 {
510 struct { uint16_t v0, v1, v2, v3; } w;
511 struct { uint32_t v0, v1; } l;
512 uint64_t q;
513 } UREG64;
514 #endif
515
516 #ifdef TARGET_X86_64
517
518 #define PARAMQ1 \
519 ({\
520 UREG64 __p;\
521 __p.l.v1 = PARAM1;\
522 __p.l.v0 = PARAM2;\
523 __p.q;\
524 })
525
526 void OPPROTO op_movq_T0_im64(void)
527 {
528 T0 = PARAMQ1;
529 }
530
531 void OPPROTO op_movq_T1_im64(void)
532 {
533 T1 = PARAMQ1;
534 }
535
536 void OPPROTO op_movq_A0_im(void)
537 {
538 A0 = (int32_t)PARAM1;
539 }
540
541 void OPPROTO op_movq_A0_im64(void)
542 {
543 A0 = PARAMQ1;
544 }
545
546 void OPPROTO op_addq_A0_im(void)
547 {
548 A0 = (A0 + (int32_t)PARAM1);
549 }
550
551 void OPPROTO op_addq_A0_im64(void)
552 {
553 A0 = (A0 + PARAMQ1);
554 }
555
556 void OPPROTO op_movq_A0_seg(void)
557 {
558 A0 = *(target_ulong *)((char *)env + PARAM1);
559 }
560
561 void OPPROTO op_addq_A0_seg(void)
562 {
563 A0 += *(target_ulong *)((char *)env + PARAM1);
564 }
565
566 void OPPROTO op_addq_A0_AL(void)
567 {
568 A0 = (A0 + (EAX & 0xff));
569 }
570
571 #endif
572
573 void OPPROTO op_andl_A0_ffff(void)
574 {
575 A0 = A0 & 0xffff;
576 }
577
578 /* memory access */
579
580 #define MEMSUFFIX _raw
581 #include "ops_mem.h"
582
583 #if !defined(CONFIG_USER_ONLY)
584 #define MEMSUFFIX _kernel
585 #include "ops_mem.h"
586
587 #define MEMSUFFIX _user
588 #include "ops_mem.h"
589 #endif
590
591 /* indirect jump */
592
593 void OPPROTO op_jmp_T0(void)
594 {
595 EIP = T0;
596 }
597
598 void OPPROTO op_movl_eip_im(void)
599 {
600 EIP = (uint32_t)PARAM1;
601 }
602
603 #ifdef TARGET_X86_64
604 void OPPROTO op_movq_eip_im(void)
605 {
606 EIP = (int32_t)PARAM1;
607 }
608
609 void OPPROTO op_movq_eip_im64(void)
610 {
611 EIP = PARAMQ1;
612 }
613 #endif
614
615 void OPPROTO op_hlt(void)
616 {
617 env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
618 env->exception_index = EXCP_HLT;
619 cpu_loop_exit();
620 }
621
622 void OPPROTO op_debug(void)
623 {
624 env->exception_index = EXCP_DEBUG;
625 cpu_loop_exit();
626 }
627
628 void OPPROTO op_raise_interrupt(void)
629 {
630 int intno, next_eip_addend;
631 intno = PARAM1;
632 next_eip_addend = PARAM2;
633 raise_interrupt(intno, 1, 0, next_eip_addend);
634 }
635
636 void OPPROTO op_raise_exception(void)
637 {
638 int exception_index;
639 exception_index = PARAM1;
640 raise_exception(exception_index);
641 }
642
643 void OPPROTO op_into(void)
644 {
645 int eflags;
646 eflags = cc_table[CC_OP].compute_all();
647 if (eflags & CC_O) {
648 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
649 }
650 FORCE_RET();
651 }
652
653 void OPPROTO op_cli(void)
654 {
655 env->eflags &= ~IF_MASK;
656 }
657
658 void OPPROTO op_sti(void)
659 {
660 env->eflags |= IF_MASK;
661 }
662
663 void OPPROTO op_set_inhibit_irq(void)
664 {
665 env->hflags |= HF_INHIBIT_IRQ_MASK;
666 }
667
668 void OPPROTO op_reset_inhibit_irq(void)
669 {
670 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
671 }
672
673 #if 0
674 /* vm86plus instructions */
675 void OPPROTO op_cli_vm(void)
676 {
677 env->eflags &= ~VIF_MASK;
678 }
679
680 void OPPROTO op_sti_vm(void)
681 {
682 env->eflags |= VIF_MASK;
683 if (env->eflags & VIP_MASK) {
684 EIP = PARAM1;
685 raise_exception(EXCP0D_GPF);
686 }
687 FORCE_RET();
688 }
689 #endif
690
691 void OPPROTO op_boundw(void)
692 {
693 int low, high, v;
694 low = ldsw(A0);
695 high = ldsw(A0 + 2);
696 v = (int16_t)T0;
697 if (v < low || v > high) {
698 raise_exception(EXCP05_BOUND);
699 }
700 FORCE_RET();
701 }
702
703 void OPPROTO op_boundl(void)
704 {
705 int low, high, v;
706 low = ldl(A0);
707 high = ldl(A0 + 4);
708 v = T0;
709 if (v < low || v > high) {
710 raise_exception(EXCP05_BOUND);
711 }
712 FORCE_RET();
713 }
714
715 void OPPROTO op_cmpxchg8b(void)
716 {
717 helper_cmpxchg8b();
718 }
719
720 void OPPROTO op_movl_T0_0(void)
721 {
722 T0 = 0;
723 }
724
725 void OPPROTO op_exit_tb(void)
726 {
727 EXIT_TB();
728 }
729
730 /* multiple size ops */
731
732 #define ldul ldl
733
734 #define SHIFT 0
735 #include "ops_template.h"
736 #undef SHIFT
737
738 #define SHIFT 1
739 #include "ops_template.h"
740 #undef SHIFT
741
742 #define SHIFT 2
743 #include "ops_template.h"
744 #undef SHIFT
745
746 #ifdef TARGET_X86_64
747
748 #define SHIFT 3
749 #include "ops_template.h"
750 #undef SHIFT
751
752 #endif
753
754 /* sign extend */
755
756 void OPPROTO op_movsbl_T0_T0(void)
757 {
758 T0 = (int8_t)T0;
759 }
760
761 void OPPROTO op_movzbl_T0_T0(void)
762 {
763 T0 = (uint8_t)T0;
764 }
765
766 void OPPROTO op_movswl_T0_T0(void)
767 {
768 T0 = (int16_t)T0;
769 }
770
771 void OPPROTO op_movzwl_T0_T0(void)
772 {
773 T0 = (uint16_t)T0;
774 }
775
776 void OPPROTO op_movswl_EAX_AX(void)
777 {
778 EAX = (int16_t)EAX;
779 }
780
781 #ifdef TARGET_X86_64
782 void OPPROTO op_movslq_T0_T0(void)
783 {
784 T0 = (int32_t)T0;
785 }
786
787 void OPPROTO op_movslq_RAX_EAX(void)
788 {
789 EAX = (int32_t)EAX;
790 }
791 #endif
792
793 void OPPROTO op_movsbw_AX_AL(void)
794 {
795 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
796 }
797
798 void OPPROTO op_movslq_EDX_EAX(void)
799 {
800 EDX = (int32_t)EAX >> 31;
801 }
802
803 void OPPROTO op_movswl_DX_AX(void)
804 {
805 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
806 }
807
808 #ifdef TARGET_X86_64
809 void OPPROTO op_movsqo_RDX_RAX(void)
810 {
811 EDX = (int64_t)EAX >> 63;
812 }
813 #endif
814
815 /* string ops helpers */
816
817 void OPPROTO op_addl_ESI_T0(void)
818 {
819 ESI = (uint32_t)(ESI + T0);
820 }
821
822 void OPPROTO op_addw_ESI_T0(void)
823 {
824 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
825 }
826
827 void OPPROTO op_addl_EDI_T0(void)
828 {
829 EDI = (uint32_t)(EDI + T0);
830 }
831
832 void OPPROTO op_addw_EDI_T0(void)
833 {
834 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
835 }
836
837 void OPPROTO op_decl_ECX(void)
838 {
839 ECX = (uint32_t)(ECX - 1);
840 }
841
842 void OPPROTO op_decw_ECX(void)
843 {
844 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
845 }
846
847 #ifdef TARGET_X86_64
848 void OPPROTO op_addq_ESI_T0(void)
849 {
850 ESI = (ESI + T0);
851 }
852
853 void OPPROTO op_addq_EDI_T0(void)
854 {
855 EDI = (EDI + T0);
856 }
857
858 void OPPROTO op_decq_ECX(void)
859 {
860 ECX--;
861 }
862 #endif
863
864 /* push/pop utils */
865
866 void op_addl_A0_SS(void)
867 {
868 A0 = (uint32_t)(A0 + env->segs[R_SS].base);
869 }
870
871 void op_subl_A0_2(void)
872 {
873 A0 = (uint32_t)(A0 - 2);
874 }
875
876 void op_subl_A0_4(void)
877 {
878 A0 = (uint32_t)(A0 - 4);
879 }
880
881 void op_addl_ESP_4(void)
882 {
883 ESP = (uint32_t)(ESP + 4);
884 }
885
886 void op_addl_ESP_2(void)
887 {
888 ESP = (uint32_t)(ESP + 2);
889 }
890
891 void op_addw_ESP_4(void)
892 {
893 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
894 }
895
896 void op_addw_ESP_2(void)
897 {
898 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
899 }
900
901 void op_addl_ESP_im(void)
902 {
903 ESP = (uint32_t)(ESP + PARAM1);
904 }
905
906 void op_addw_ESP_im(void)
907 {
908 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
909 }
910
911 #ifdef TARGET_X86_64
912 void op_subq_A0_2(void)
913 {
914 A0 -= 2;
915 }
916
917 void op_subq_A0_8(void)
918 {
919 A0 -= 8;
920 }
921
922 void op_addq_ESP_8(void)
923 {
924 ESP += 8;
925 }
926
927 void op_addq_ESP_im(void)
928 {
929 ESP += PARAM1;
930 }
931 #endif
932
933 void OPPROTO op_rdtsc(void)
934 {
935 helper_rdtsc();
936 }
937
938 void OPPROTO op_cpuid(void)
939 {
940 helper_cpuid();
941 }
942
943 void OPPROTO op_enter_level(void)
944 {
945 helper_enter_level(PARAM1, PARAM2);
946 }
947
948 #ifdef TARGET_X86_64
949 void OPPROTO op_enter64_level(void)
950 {
951 helper_enter64_level(PARAM1, PARAM2);
952 }
953 #endif
954
955 void OPPROTO op_sysenter(void)
956 {
957 helper_sysenter();
958 }
959
960 void OPPROTO op_sysexit(void)
961 {
962 helper_sysexit();
963 }
964
965 #ifdef TARGET_X86_64
966 void OPPROTO op_syscall(void)
967 {
968 helper_syscall(PARAM1);
969 }
970
971 void OPPROTO op_sysret(void)
972 {
973 helper_sysret(PARAM1);
974 }
975 #endif
976
977 void OPPROTO op_rdmsr(void)
978 {
979 helper_rdmsr();
980 }
981
982 void OPPROTO op_wrmsr(void)
983 {
984 helper_wrmsr();
985 }
986
987 /* bcd */
988
989 /* XXX: exception */
990 void OPPROTO op_aam(void)
991 {
992 int base = PARAM1;
993 int al, ah;
994 al = EAX & 0xff;
995 ah = al / base;
996 al = al % base;
997 EAX = (EAX & ~0xffff) | al | (ah << 8);
998 CC_DST = al;
999 }
1000
1001 void OPPROTO op_aad(void)
1002 {
1003 int base = PARAM1;
1004 int al, ah;
1005 al = EAX & 0xff;
1006 ah = (EAX >> 8) & 0xff;
1007 al = ((ah * base) + al) & 0xff;
1008 EAX = (EAX & ~0xffff) | al;
1009 CC_DST = al;
1010 }
1011
1012 void OPPROTO op_aaa(void)
1013 {
1014 int icarry;
1015 int al, ah, af;
1016 int eflags;
1017
1018 eflags = cc_table[CC_OP].compute_all();
1019 af = eflags & CC_A;
1020 al = EAX & 0xff;
1021 ah = (EAX >> 8) & 0xff;
1022
1023 icarry = (al > 0xf9);
1024 if (((al & 0x0f) > 9 ) || af) {
1025 al = (al + 6) & 0x0f;
1026 ah = (ah + 1 + icarry) & 0xff;
1027 eflags |= CC_C | CC_A;
1028 } else {
1029 eflags &= ~(CC_C | CC_A);
1030 al &= 0x0f;
1031 }
1032 EAX = (EAX & ~0xffff) | al | (ah << 8);
1033 CC_SRC = eflags;
1034 }
1035
1036 void OPPROTO op_aas(void)
1037 {
1038 int icarry;
1039 int al, ah, af;
1040 int eflags;
1041
1042 eflags = cc_table[CC_OP].compute_all();
1043 af = eflags & CC_A;
1044 al = EAX & 0xff;
1045 ah = (EAX >> 8) & 0xff;
1046
1047 icarry = (al < 6);
1048 if (((al & 0x0f) > 9 ) || af) {
1049 al = (al - 6) & 0x0f;
1050 ah = (ah - 1 - icarry) & 0xff;
1051 eflags |= CC_C | CC_A;
1052 } else {
1053 eflags &= ~(CC_C | CC_A);
1054 al &= 0x0f;
1055 }
1056 EAX = (EAX & ~0xffff) | al | (ah << 8);
1057 CC_SRC = eflags;
1058 }
1059
1060 void OPPROTO op_daa(void)
1061 {
1062 int al, af, cf;
1063 int eflags;
1064
1065 eflags = cc_table[CC_OP].compute_all();
1066 cf = eflags & CC_C;
1067 af = eflags & CC_A;
1068 al = EAX & 0xff;
1069
1070 eflags = 0;
1071 if (((al & 0x0f) > 9 ) || af) {
1072 al = (al + 6) & 0xff;
1073 eflags |= CC_A;
1074 }
1075 if ((al > 0x9f) || cf) {
1076 al = (al + 0x60) & 0xff;
1077 eflags |= CC_C;
1078 }
1079 EAX = (EAX & ~0xff) | al;
1080 /* well, speed is not an issue here, so we compute the flags by hand */
1081 eflags |= (al == 0) << 6; /* zf */
1082 eflags |= parity_table[al]; /* pf */
1083 eflags |= (al & 0x80); /* sf */
1084 CC_SRC = eflags;
1085 }
1086
1087 void OPPROTO op_das(void)
1088 {
1089 int al, al1, af, cf;
1090 int eflags;
1091
1092 eflags = cc_table[CC_OP].compute_all();
1093 cf = eflags & CC_C;
1094 af = eflags & CC_A;
1095 al = EAX & 0xff;
1096
1097 eflags = 0;
1098 al1 = al;
1099 if (((al & 0x0f) > 9 ) || af) {
1100 eflags |= CC_A;
1101 if (al < 6 || cf)
1102 eflags |= CC_C;
1103 al = (al - 6) & 0xff;
1104 }
1105 if ((al1 > 0x99) || cf) {
1106 al = (al - 0x60) & 0xff;
1107 eflags |= CC_C;
1108 }
1109 EAX = (EAX & ~0xff) | al;
1110 /* well, speed is not an issue here, so we compute the flags by hand */
1111 eflags |= (al == 0) << 6; /* zf */
1112 eflags |= parity_table[al]; /* pf */
1113 eflags |= (al & 0x80); /* sf */
1114 CC_SRC = eflags;
1115 }
1116
1117 /* segment handling */
1118
1119 /* never use it with R_CS */
1120 void OPPROTO op_movl_seg_T0(void)
1121 {
1122 load_seg(PARAM1, T0);
1123 }
1124
1125 /* faster VM86 version */
1126 void OPPROTO op_movl_seg_T0_vm(void)
1127 {
1128 int selector;
1129 SegmentCache *sc;
1130
1131 selector = T0 & 0xffff;
1132 /* env->segs[] access */
1133 sc = (SegmentCache *)((char *)env + PARAM1);
1134 sc->selector = selector;
1135 sc->base = (selector << 4);
1136 }
1137
1138 void OPPROTO op_movl_T0_seg(void)
1139 {
1140 T0 = env->segs[PARAM1].selector;
1141 }
1142
1143 void OPPROTO op_lsl(void)
1144 {
1145 helper_lsl();
1146 }
1147
1148 void OPPROTO op_lar(void)
1149 {
1150 helper_lar();
1151 }
1152
1153 void OPPROTO op_verr(void)
1154 {
1155 helper_verr();
1156 }
1157
1158 void OPPROTO op_verw(void)
1159 {
1160 helper_verw();
1161 }
1162
1163 void OPPROTO op_arpl(void)
1164 {
1165 if ((T0 & 3) < (T1 & 3)) {
1166 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1167 T0 = (T0 & ~3) | (T1 & 3);
1168 T1 = CC_Z;
1169 } else {
1170 T1 = 0;
1171 }
1172 FORCE_RET();
1173 }
1174
1175 void OPPROTO op_arpl_update(void)
1176 {
1177 int eflags;
1178 eflags = cc_table[CC_OP].compute_all();
1179 CC_SRC = (eflags & ~CC_Z) | T1;
1180 }
1181
1182 /* T0: segment, T1:eip */
1183 void OPPROTO op_ljmp_protected_T0_T1(void)
1184 {
1185 helper_ljmp_protected_T0_T1(PARAM1);
1186 }
1187
1188 void OPPROTO op_lcall_real_T0_T1(void)
1189 {
1190 helper_lcall_real_T0_T1(PARAM1, PARAM2);
1191 }
1192
1193 void OPPROTO op_lcall_protected_T0_T1(void)
1194 {
1195 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1196 }
1197
1198 void OPPROTO op_iret_real(void)
1199 {
1200 helper_iret_real(PARAM1);
1201 }
1202
1203 void OPPROTO op_iret_protected(void)
1204 {
1205 helper_iret_protected(PARAM1, PARAM2);
1206 }
1207
1208 void OPPROTO op_lret_protected(void)
1209 {
1210 helper_lret_protected(PARAM1, PARAM2);
1211 }
1212
1213 void OPPROTO op_lldt_T0(void)
1214 {
1215 helper_lldt_T0();
1216 }
1217
1218 void OPPROTO op_ltr_T0(void)
1219 {
1220 helper_ltr_T0();
1221 }
1222
1223 /* CR registers access */
1224 void OPPROTO op_movl_crN_T0(void)
1225 {
1226 helper_movl_crN_T0(PARAM1);
1227 }
1228
1229 #if !defined(CONFIG_USER_ONLY)
1230 void OPPROTO op_movtl_T0_cr8(void)
1231 {
1232 T0 = cpu_get_apic_tpr(env);
1233 }
1234 #endif
1235
1236 /* DR registers access */
1237 void OPPROTO op_movl_drN_T0(void)
1238 {
1239 helper_movl_drN_T0(PARAM1);
1240 }
1241
1242 void OPPROTO op_lmsw_T0(void)
1243 {
1244 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1245 if already set to one. */
1246 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1247 helper_movl_crN_T0(0);
1248 }
1249
1250 void OPPROTO op_invlpg_A0(void)
1251 {
1252 helper_invlpg(A0);
1253 }
1254
1255 void OPPROTO op_movl_T0_env(void)
1256 {
1257 T0 = *(uint32_t *)((char *)env + PARAM1);
1258 }
1259
1260 void OPPROTO op_movl_env_T0(void)
1261 {
1262 *(uint32_t *)((char *)env + PARAM1) = T0;
1263 }
1264
1265 void OPPROTO op_movl_env_T1(void)
1266 {
1267 *(uint32_t *)((char *)env + PARAM1) = T1;
1268 }
1269
1270 void OPPROTO op_movtl_T0_env(void)
1271 {
1272 T0 = *(target_ulong *)((char *)env + PARAM1);
1273 }
1274
1275 void OPPROTO op_movtl_env_T0(void)
1276 {
1277 *(target_ulong *)((char *)env + PARAM1) = T0;
1278 }
1279
1280 void OPPROTO op_movtl_T1_env(void)
1281 {
1282 T1 = *(target_ulong *)((char *)env + PARAM1);
1283 }
1284
1285 void OPPROTO op_movtl_env_T1(void)
1286 {
1287 *(target_ulong *)((char *)env + PARAM1) = T1;
1288 }
1289
1290 void OPPROTO op_clts(void)
1291 {
1292 env->cr[0] &= ~CR0_TS_MASK;
1293 env->hflags &= ~HF_TS_MASK;
1294 }
1295
1296 /* flags handling */
1297
1298 void OPPROTO op_goto_tb0(void)
1299 {
1300 GOTO_TB(op_goto_tb0, PARAM1, 0);
1301 }
1302
1303 void OPPROTO op_goto_tb1(void)
1304 {
1305 GOTO_TB(op_goto_tb1, PARAM1, 1);
1306 }
1307
1308 void OPPROTO op_jmp_label(void)
1309 {
1310 GOTO_LABEL_PARAM(1);
1311 }
1312
1313 void OPPROTO op_jnz_T0_label(void)
1314 {
1315 if (T0)
1316 GOTO_LABEL_PARAM(1);
1317 FORCE_RET();
1318 }
1319
1320 void OPPROTO op_jz_T0_label(void)
1321 {
1322 if (!T0)
1323 GOTO_LABEL_PARAM(1);
1324 FORCE_RET();
1325 }
1326
1327 /* slow set cases (compute x86 flags) */
1328 void OPPROTO op_seto_T0_cc(void)
1329 {
1330 int eflags;
1331 eflags = cc_table[CC_OP].compute_all();
1332 T0 = (eflags >> 11) & 1;
1333 }
1334
1335 void OPPROTO op_setb_T0_cc(void)
1336 {
1337 T0 = cc_table[CC_OP].compute_c();
1338 }
1339
1340 void OPPROTO op_setz_T0_cc(void)
1341 {
1342 int eflags;
1343 eflags = cc_table[CC_OP].compute_all();
1344 T0 = (eflags >> 6) & 1;
1345 }
1346
1347 void OPPROTO op_setbe_T0_cc(void)
1348 {
1349 int eflags;
1350 eflags = cc_table[CC_OP].compute_all();
1351 T0 = (eflags & (CC_Z | CC_C)) != 0;
1352 }
1353
1354 void OPPROTO op_sets_T0_cc(void)
1355 {
1356 int eflags;
1357 eflags = cc_table[CC_OP].compute_all();
1358 T0 = (eflags >> 7) & 1;
1359 }
1360
1361 void OPPROTO op_setp_T0_cc(void)
1362 {
1363 int eflags;
1364 eflags = cc_table[CC_OP].compute_all();
1365 T0 = (eflags >> 2) & 1;
1366 }
1367
1368 void OPPROTO op_setl_T0_cc(void)
1369 {
1370 int eflags;
1371 eflags = cc_table[CC_OP].compute_all();
1372 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1373 }
1374
1375 void OPPROTO op_setle_T0_cc(void)
1376 {
1377 int eflags;
1378 eflags = cc_table[CC_OP].compute_all();
1379 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1380 }
1381
1382 void OPPROTO op_xor_T0_1(void)
1383 {
1384 T0 ^= 1;
1385 }
1386
1387 void OPPROTO op_set_cc_op(void)
1388 {
1389 CC_OP = PARAM1;
1390 }
1391
1392 void OPPROTO op_mov_T0_cc(void)
1393 {
1394 T0 = cc_table[CC_OP].compute_all();
1395 }
1396
1397 /* XXX: clear VIF/VIP in all ops ? */
1398
1399 void OPPROTO op_movl_eflags_T0(void)
1400 {
1401 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1402 }
1403
1404 void OPPROTO op_movw_eflags_T0(void)
1405 {
1406 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1407 }
1408
1409 void OPPROTO op_movl_eflags_T0_io(void)
1410 {
1411 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1412 }
1413
1414 void OPPROTO op_movw_eflags_T0_io(void)
1415 {
1416 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1417 }
1418
1419 void OPPROTO op_movl_eflags_T0_cpl0(void)
1420 {
1421 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1422 }
1423
1424 void OPPROTO op_movw_eflags_T0_cpl0(void)
1425 {
1426 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1427 }
1428
1429 #if 0
1430 /* vm86plus version */
1431 void OPPROTO op_movw_eflags_T0_vm(void)
1432 {
1433 int eflags;
1434 eflags = T0;
1435 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1436 DF = 1 - (2 * ((eflags >> 10) & 1));
1437 /* we also update some system flags as in user mode */
1438 env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1439 (eflags & FL_UPDATE_MASK16);
1440 if (eflags & IF_MASK) {
1441 env->eflags |= VIF_MASK;
1442 if (env->eflags & VIP_MASK) {
1443 EIP = PARAM1;
1444 raise_exception(EXCP0D_GPF);
1445 }
1446 }
1447 FORCE_RET();
1448 }
1449
1450 void OPPROTO op_movl_eflags_T0_vm(void)
1451 {
1452 int eflags;
1453 eflags = T0;
1454 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1455 DF = 1 - (2 * ((eflags >> 10) & 1));
1456 /* we also update some system flags as in user mode */
1457 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1458 (eflags & FL_UPDATE_MASK32);
1459 if (eflags & IF_MASK) {
1460 env->eflags |= VIF_MASK;
1461 if (env->eflags & VIP_MASK) {
1462 EIP = PARAM1;
1463 raise_exception(EXCP0D_GPF);
1464 }
1465 }
1466 FORCE_RET();
1467 }
1468 #endif
1469
1470 /* XXX: compute only O flag */
1471 void OPPROTO op_movb_eflags_T0(void)
1472 {
1473 int of;
1474 of = cc_table[CC_OP].compute_all() & CC_O;
1475 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1476 }
1477
1478 void OPPROTO op_movl_T0_eflags(void)
1479 {
1480 int eflags;
1481 eflags = cc_table[CC_OP].compute_all();
1482 eflags |= (DF & DF_MASK);
1483 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1484 T0 = eflags;
1485 }
1486
1487 /* vm86plus version */
1488 #if 0
1489 void OPPROTO op_movl_T0_eflags_vm(void)
1490 {
1491 int eflags;
1492 eflags = cc_table[CC_OP].compute_all();
1493 eflags |= (DF & DF_MASK);
1494 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1495 if (env->eflags & VIF_MASK)
1496 eflags |= IF_MASK;
1497 T0 = eflags;
1498 }
1499 #endif
1500
1501 void OPPROTO op_cld(void)
1502 {
1503 DF = 1;
1504 }
1505
1506 void OPPROTO op_std(void)
1507 {
1508 DF = -1;
1509 }
1510
1511 void OPPROTO op_clc(void)
1512 {
1513 int eflags;
1514 eflags = cc_table[CC_OP].compute_all();
1515 eflags &= ~CC_C;
1516 CC_SRC = eflags;
1517 }
1518
1519 void OPPROTO op_stc(void)
1520 {
1521 int eflags;
1522 eflags = cc_table[CC_OP].compute_all();
1523 eflags |= CC_C;
1524 CC_SRC = eflags;
1525 }
1526
1527 void OPPROTO op_cmc(void)
1528 {
1529 int eflags;
1530 eflags = cc_table[CC_OP].compute_all();
1531 eflags ^= CC_C;
1532 CC_SRC = eflags;
1533 }
1534
1535 void OPPROTO op_salc(void)
1536 {
1537 int cf;
1538 cf = cc_table[CC_OP].compute_c();
1539 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1540 }
1541
1542 static int compute_all_eflags(void)
1543 {
1544 return CC_SRC;
1545 }
1546
1547 static int compute_c_eflags(void)
1548 {
1549 return CC_SRC & CC_C;
1550 }
1551
1552 CCTable cc_table[CC_OP_NB] = {
1553 [CC_OP_DYNAMIC] = { /* should never happen */ },
1554
1555 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1556
1557 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1558 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1559 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1560
1561 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1562 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1563 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1564
1565 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1566 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1567 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1568
1569 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1570 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1571 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1572
1573 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1574 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1575 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1576
1577 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1578 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1579 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1580
1581 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1582 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1583 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1584
1585 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1586 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1587 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1588
1589 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1590 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1591 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1592
1593 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1594 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1595 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1596
1597 #ifdef TARGET_X86_64
1598 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1599
1600 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1601
1602 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1603
1604 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
1605
1606 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
1607
1608 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1609
1610 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1611
1612 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1613
1614 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1615
1616 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1617 #endif
1618 };
1619
1620 /* floating point support. Some of the code for complicated x87
1621 functions comes from the LGPL'ed x86 emulator found in the Willows
1622 TWIN windows emulator. */
1623
1624 /* fp load FT0 */
1625
1626 void OPPROTO op_flds_FT0_A0(void)
1627 {
1628 #ifdef USE_FP_CONVERT
1629 FP_CONVERT.i32 = ldl(A0);
1630 FT0 = FP_CONVERT.f;
1631 #else
1632 FT0 = ldfl(A0);
1633 #endif
1634 }
1635
1636 void OPPROTO op_fldl_FT0_A0(void)
1637 {
1638 #ifdef USE_FP_CONVERT
1639 FP_CONVERT.i64 = ldq(A0);
1640 FT0 = FP_CONVERT.d;
1641 #else
1642 FT0 = ldfq(A0);
1643 #endif
1644 }
1645
1646 /* helpers are needed to avoid static constant reference. XXX: find a better way */
1647 #ifdef USE_INT_TO_FLOAT_HELPERS
1648
1649 void helper_fild_FT0_A0(void)
1650 {
1651 FT0 = (CPU86_LDouble)ldsw(A0);
1652 }
1653
1654 void helper_fildl_FT0_A0(void)
1655 {
1656 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1657 }
1658
1659 void helper_fildll_FT0_A0(void)
1660 {
1661 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1662 }
1663
1664 void OPPROTO op_fild_FT0_A0(void)
1665 {
1666 helper_fild_FT0_A0();
1667 }
1668
1669 void OPPROTO op_fildl_FT0_A0(void)
1670 {
1671 helper_fildl_FT0_A0();
1672 }
1673
1674 void OPPROTO op_fildll_FT0_A0(void)
1675 {
1676 helper_fildll_FT0_A0();
1677 }
1678
1679 #else
1680
1681 void OPPROTO op_fild_FT0_A0(void)
1682 {
1683 #ifdef USE_FP_CONVERT
1684 FP_CONVERT.i32 = ldsw(A0);
1685 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1686 #else
1687 FT0 = (CPU86_LDouble)ldsw(A0);
1688 #endif
1689 }
1690
1691 void OPPROTO op_fildl_FT0_A0(void)
1692 {
1693 #ifdef USE_FP_CONVERT
1694 FP_CONVERT.i32 = (int32_t) ldl(A0);
1695 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1696 #else
1697 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1698 #endif
1699 }
1700
1701 void OPPROTO op_fildll_FT0_A0(void)
1702 {
1703 #ifdef USE_FP_CONVERT
1704 FP_CONVERT.i64 = (int64_t) ldq(A0);
1705 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1706 #else
1707 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1708 #endif
1709 }
1710 #endif
1711
1712 /* fp load ST0 */
1713
1714 void OPPROTO op_flds_ST0_A0(void)
1715 {
1716 int new_fpstt;
1717 new_fpstt = (env->fpstt - 1) & 7;
1718 #ifdef USE_FP_CONVERT
1719 FP_CONVERT.i32 = ldl(A0);
1720 env->fpregs[new_fpstt].d = FP_CONVERT.f;
1721 #else
1722 env->fpregs[new_fpstt].d = ldfl(A0);
1723 #endif
1724 env->fpstt = new_fpstt;
1725 env->fptags[new_fpstt] = 0; /* validate stack entry */
1726 }
1727
1728 void OPPROTO op_fldl_ST0_A0(void)
1729 {
1730 int new_fpstt;
1731 new_fpstt = (env->fpstt - 1) & 7;
1732 #ifdef USE_FP_CONVERT
1733 FP_CONVERT.i64 = ldq(A0);
1734 env->fpregs[new_fpstt].d = FP_CONVERT.d;
1735 #else
1736 env->fpregs[new_fpstt].d = ldfq(A0);
1737 #endif
1738 env->fpstt = new_fpstt;
1739 env->fptags[new_fpstt] = 0; /* validate stack entry */
1740 }
1741
1742 void OPPROTO op_fldt_ST0_A0(void)
1743 {
1744 helper_fldt_ST0_A0();
1745 }
1746
1747 /* helpers are needed to avoid static constant reference. XXX: find a better way */
1748 #ifdef USE_INT_TO_FLOAT_HELPERS
1749
1750 void helper_fild_ST0_A0(void)
1751 {
1752 int new_fpstt;
1753 new_fpstt = (env->fpstt - 1) & 7;
1754 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1755 env->fpstt = new_fpstt;
1756 env->fptags[new_fpstt] = 0; /* validate stack entry */
1757 }
1758
1759 void helper_fildl_ST0_A0(void)
1760 {
1761 int new_fpstt;
1762 new_fpstt = (env->fpstt - 1) & 7;
1763 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1764 env->fpstt = new_fpstt;
1765 env->fptags[new_fpstt] = 0; /* validate stack entry */
1766 }
1767
1768 void helper_fildll_ST0_A0(void)
1769 {
1770 int new_fpstt;
1771 new_fpstt = (env->fpstt - 1) & 7;
1772 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1773 env->fpstt = new_fpstt;
1774 env->fptags[new_fpstt] = 0; /* validate stack entry */
1775 }
1776
1777 void OPPROTO op_fild_ST0_A0(void)
1778 {
1779 helper_fild_ST0_A0();
1780 }
1781
1782 void OPPROTO op_fildl_ST0_A0(void)
1783 {
1784 helper_fildl_ST0_A0();
1785 }
1786
1787 void OPPROTO op_fildll_ST0_A0(void)
1788 {
1789 helper_fildll_ST0_A0();
1790 }
1791
1792 #else
1793
1794 void OPPROTO op_fild_ST0_A0(void)
1795 {
1796 int new_fpstt;
1797 new_fpstt = (env->fpstt - 1) & 7;
1798 #ifdef USE_FP_CONVERT
1799 FP_CONVERT.i32 = ldsw(A0);
1800 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1801 #else
1802 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1803 #endif
1804 env->fpstt = new_fpstt;
1805 env->fptags[new_fpstt] = 0; /* validate stack entry */
1806 }
1807
1808 void OPPROTO op_fildl_ST0_A0(void)
1809 {
1810 int new_fpstt;
1811 new_fpstt = (env->fpstt - 1) & 7;
1812 #ifdef USE_FP_CONVERT
1813 FP_CONVERT.i32 = (int32_t) ldl(A0);
1814 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1815 #else
1816 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1817 #endif
1818 env->fpstt = new_fpstt;
1819 env->fptags[new_fpstt] = 0; /* validate stack entry */
1820 }
1821
1822 void OPPROTO op_fildll_ST0_A0(void)
1823 {
1824 int new_fpstt;
1825 new_fpstt = (env->fpstt - 1) & 7;
1826 #ifdef USE_FP_CONVERT
1827 FP_CONVERT.i64 = (int64_t) ldq(A0);
1828 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
1829 #else
1830 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1831 #endif
1832 env->fpstt = new_fpstt;
1833 env->fptags[new_fpstt] = 0; /* validate stack entry */
1834 }
1835
1836 #endif
1837
1838 /* fp store */
1839
1840 void OPPROTO op_fsts_ST0_A0(void)
1841 {
1842 #ifdef USE_FP_CONVERT
1843 FP_CONVERT.f = (float)ST0;
1844 stfl(A0, FP_CONVERT.f);
1845 #else
1846 stfl(A0, (float)ST0);
1847 #endif
1848 FORCE_RET();
1849 }
1850
1851 void OPPROTO op_fstl_ST0_A0(void)
1852 {
1853 stfq(A0, (double)ST0);
1854 FORCE_RET();
1855 }
1856
1857 void OPPROTO op_fstt_ST0_A0(void)
1858 {
1859 helper_fstt_ST0_A0();
1860 }
1861
1862 void OPPROTO op_fist_ST0_A0(void)
1863 {
1864 #if defined(__sparc__) && !defined(__sparc_v9__)
1865 register CPU86_LDouble d asm("o0");
1866 #else
1867 CPU86_LDouble d;
1868 #endif
1869 int val;
1870
1871 d = ST0;
1872 val = floatx_to_int32(d, &env->fp_status);
1873 if (val != (int16_t)val)
1874 val = -32768;
1875 stw(A0, val);
1876 FORCE_RET();
1877 }
1878
1879 void OPPROTO op_fistl_ST0_A0(void)
1880 {
1881 #if defined(__sparc__) && !defined(__sparc_v9__)
1882 register CPU86_LDouble d asm("o0");
1883 #else
1884 CPU86_LDouble d;
1885 #endif
1886 int val;
1887
1888 d = ST0;
1889 val = floatx_to_int32(d, &env->fp_status);
1890 stl(A0, val);
1891 FORCE_RET();
1892 }
1893
1894 void OPPROTO op_fistll_ST0_A0(void)
1895 {
1896 #if defined(__sparc__) && !defined(__sparc_v9__)
1897 register CPU86_LDouble d asm("o0");
1898 #else
1899 CPU86_LDouble d;
1900 #endif
1901 int64_t val;
1902
1903 d = ST0;
1904 val = floatx_to_int64(d, &env->fp_status);
1905 stq(A0, val);
1906 FORCE_RET();
1907 }
1908
1909 void OPPROTO op_fbld_ST0_A0(void)
1910 {
1911 helper_fbld_ST0_A0();
1912 }
1913
1914 void OPPROTO op_fbst_ST0_A0(void)
1915 {
1916 helper_fbst_ST0_A0();
1917 }
1918
1919 /* FPU move */
1920
1921 void OPPROTO op_fpush(void)
1922 {
1923 fpush();
1924 }
1925
1926 void OPPROTO op_fpop(void)
1927 {
1928 fpop();
1929 }
1930
1931 void OPPROTO op_fdecstp(void)
1932 {
1933 env->fpstt = (env->fpstt - 1) & 7;
1934 env->fpus &= (~0x4700);
1935 }
1936
1937 void OPPROTO op_fincstp(void)
1938 {
1939 env->fpstt = (env->fpstt + 1) & 7;
1940 env->fpus &= (~0x4700);
1941 }
1942
1943 void OPPROTO op_ffree_STN(void)
1944 {
1945 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
1946 }
1947
1948 void OPPROTO op_fmov_ST0_FT0(void)
1949 {
1950 ST0 = FT0;
1951 }
1952
1953 void OPPROTO op_fmov_FT0_STN(void)
1954 {
1955 FT0 = ST(PARAM1);
1956 }
1957
1958 void OPPROTO op_fmov_ST0_STN(void)
1959 {
1960 ST0 = ST(PARAM1);
1961 }
1962
1963 void OPPROTO op_fmov_STN_ST0(void)
1964 {
1965 ST(PARAM1) = ST0;
1966 }
1967
1968 void OPPROTO op_fxchg_ST0_STN(void)
1969 {
1970 CPU86_LDouble tmp;
1971 tmp = ST(PARAM1);
1972 ST(PARAM1) = ST0;
1973 ST0 = tmp;
1974 }
1975
1976 /* FPU operations */
1977
1978 const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
1979
1980 void OPPROTO op_fcom_ST0_FT0(void)
1981 {
1982 int ret;
1983
1984 ret = floatx_compare(ST0, FT0, &env->fp_status);
1985 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
1986 FORCE_RET();
1987 }
1988
1989 void OPPROTO op_fucom_ST0_FT0(void)
1990 {
1991 int ret;
1992
1993 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
1994 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
1995 FORCE_RET();
1996 }
1997
1998 const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
1999
2000 void OPPROTO op_fcomi_ST0_FT0(void)
2001 {
2002 int eflags;
2003 int ret;
2004
2005 ret = floatx_compare(ST0, FT0, &env->fp_status);
2006 eflags = cc_table[CC_OP].compute_all();
2007 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2008 CC_SRC = eflags;
2009 FORCE_RET();
2010 }
2011
2012 void OPPROTO op_fucomi_ST0_FT0(void)
2013 {
2014 int eflags;
2015 int ret;
2016
2017 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2018 eflags = cc_table[CC_OP].compute_all();
2019 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2020 CC_SRC = eflags;
2021 FORCE_RET();
2022 }
2023
2024 void OPPROTO op_fcmov_ST0_STN_T0(void)
2025 {
2026 if (T0) {
2027 ST0 = ST(PARAM1);
2028 }
2029 FORCE_RET();
2030 }
2031
2032 void OPPROTO op_fadd_ST0_FT0(void)
2033 {
2034 ST0 += FT0;
2035 }
2036
2037 void OPPROTO op_fmul_ST0_FT0(void)
2038 {
2039 ST0 *= FT0;
2040 }
2041
2042 void OPPROTO op_fsub_ST0_FT0(void)
2043 {
2044 ST0 -= FT0;
2045 }
2046
2047 void OPPROTO op_fsubr_ST0_FT0(void)
2048 {
2049 ST0 = FT0 - ST0;
2050 }
2051
2052 void OPPROTO op_fdiv_ST0_FT0(void)
2053 {
2054 ST0 = helper_fdiv(ST0, FT0);
2055 }
2056
2057 void OPPROTO op_fdivr_ST0_FT0(void)
2058 {
2059 ST0 = helper_fdiv(FT0, ST0);
2060 }
2061
2062 /* fp operations between STN and ST0 */
2063
2064 void OPPROTO op_fadd_STN_ST0(void)
2065 {
2066 ST(PARAM1) += ST0;
2067 }
2068
2069 void OPPROTO op_fmul_STN_ST0(void)
2070 {
2071 ST(PARAM1) *= ST0;
2072 }
2073
2074 void OPPROTO op_fsub_STN_ST0(void)
2075 {
2076 ST(PARAM1) -= ST0;
2077 }
2078
2079 void OPPROTO op_fsubr_STN_ST0(void)
2080 {
2081 CPU86_LDouble *p;
2082 p = &ST(PARAM1);
2083 *p = ST0 - *p;
2084 }
2085
2086 void OPPROTO op_fdiv_STN_ST0(void)
2087 {
2088 CPU86_LDouble *p;
2089 p = &ST(PARAM1);
2090 *p = helper_fdiv(*p, ST0);
2091 }
2092
2093 void OPPROTO op_fdivr_STN_ST0(void)
2094 {
2095 CPU86_LDouble *p;
2096 p = &ST(PARAM1);
2097 *p = helper_fdiv(ST0, *p);
2098 }
2099
2100 /* misc FPU operations */
2101 void OPPROTO op_fchs_ST0(void)
2102 {
2103 ST0 = floatx_chs(ST0);
2104 }
2105
2106 void OPPROTO op_fabs_ST0(void)
2107 {
2108 ST0 = floatx_abs(ST0);
2109 }
2110
2111 void OPPROTO op_fxam_ST0(void)
2112 {
2113 helper_fxam_ST0();
2114 }
2115
2116 void OPPROTO op_fld1_ST0(void)
2117 {
2118 ST0 = f15rk[1];
2119 }
2120
2121 void OPPROTO op_fldl2t_ST0(void)
2122 {
2123 ST0 = f15rk[6];
2124 }
2125
2126 void OPPROTO op_fldl2e_ST0(void)
2127 {
2128 ST0 = f15rk[5];
2129 }
2130
2131 void OPPROTO op_fldpi_ST0(void)
2132 {
2133 ST0 = f15rk[2];
2134 }
2135
2136 void OPPROTO op_fldlg2_ST0(void)
2137 {
2138 ST0 = f15rk[3];
2139 }
2140
2141 void OPPROTO op_fldln2_ST0(void)
2142 {
2143 ST0 = f15rk[4];
2144 }
2145
2146 void OPPROTO op_fldz_ST0(void)
2147 {
2148 ST0 = f15rk[0];
2149 }
2150
2151 void OPPROTO op_fldz_FT0(void)
2152 {
2153 FT0 = f15rk[0];
2154 }
2155
2156 /* associated heplers to reduce generated code length and to simplify
2157 relocation (FP constants are usually stored in .rodata section) */
2158
2159 void OPPROTO op_f2xm1(void)
2160 {
2161 helper_f2xm1();
2162 }
2163
2164 void OPPROTO op_fyl2x(void)
2165 {
2166 helper_fyl2x();
2167 }
2168
2169 void OPPROTO op_fptan(void)
2170 {
2171 helper_fptan();
2172 }
2173
2174 void OPPROTO op_fpatan(void)
2175 {
2176 helper_fpatan();
2177 }
2178
2179 void OPPROTO op_fxtract(void)
2180 {
2181 helper_fxtract();
2182 }
2183
2184 void OPPROTO op_fprem1(void)
2185 {
2186 helper_fprem1();
2187 }
2188
2189
2190 void OPPROTO op_fprem(void)
2191 {
2192 helper_fprem();
2193 }
2194
2195 void OPPROTO op_fyl2xp1(void)
2196 {
2197 helper_fyl2xp1();
2198 }
2199
2200 void OPPROTO op_fsqrt(void)
2201 {
2202 helper_fsqrt();
2203 }
2204
2205 void OPPROTO op_fsincos(void)
2206 {
2207 helper_fsincos();
2208 }
2209
2210 void OPPROTO op_frndint(void)
2211 {
2212 helper_frndint();
2213 }
2214
2215 void OPPROTO op_fscale(void)
2216 {
2217 helper_fscale();
2218 }
2219
2220 void OPPROTO op_fsin(void)
2221 {
2222 helper_fsin();
2223 }
2224
2225 void OPPROTO op_fcos(void)
2226 {
2227 helper_fcos();
2228 }
2229
2230 void OPPROTO op_fnstsw_A0(void)
2231 {
2232 int fpus;
2233 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2234 stw(A0, fpus);
2235 FORCE_RET();
2236 }
2237
2238 void OPPROTO op_fnstsw_EAX(void)
2239 {
2240 int fpus;
2241 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2242 EAX = (EAX & ~0xffff) | fpus;
2243 }
2244
2245 void OPPROTO op_fnstcw_A0(void)
2246 {
2247 stw(A0, env->fpuc);
2248 FORCE_RET();
2249 }
2250
2251 void OPPROTO op_fldcw_A0(void)
2252 {
2253 env->fpuc = lduw(A0);
2254 update_fp_status();
2255 }
2256
2257 void OPPROTO op_fclex(void)
2258 {
2259 env->fpus &= 0x7f00;
2260 }
2261
2262 void OPPROTO op_fwait(void)
2263 {
2264 if (env->fpus & FPUS_SE)
2265 fpu_raise_exception();
2266 FORCE_RET();
2267 }
2268
2269 void OPPROTO op_fninit(void)
2270 {
2271 env->fpus = 0;
2272 env->fpstt = 0;
2273 env->fpuc = 0x37f;
2274 env->fptags[0] = 1;
2275 env->fptags[1] = 1;
2276 env->fptags[2] = 1;
2277 env->fptags[3] = 1;
2278 env->fptags[4] = 1;
2279 env->fptags[5] = 1;
2280 env->fptags[6] = 1;
2281 env->fptags[7] = 1;
2282 }
2283
2284 void OPPROTO op_fnstenv_A0(void)
2285 {
2286 helper_fstenv(A0, PARAM1);
2287 }
2288
2289 void OPPROTO op_fldenv_A0(void)
2290 {
2291 helper_fldenv(A0, PARAM1);
2292 }
2293
2294 void OPPROTO op_fnsave_A0(void)
2295 {
2296 helper_fsave(A0, PARAM1);
2297 }
2298
2299 void OPPROTO op_frstor_A0(void)
2300 {
2301 helper_frstor(A0, PARAM1);
2302 }
2303
2304 /* threading support */
2305 void OPPROTO op_lock(void)
2306 {
2307 cpu_lock();
2308 }
2309
2310 void OPPROTO op_unlock(void)
2311 {
2312 cpu_unlock();
2313 }
2314
2315 /* SSE support */
2316 static inline void memcpy16(void *d, void *s)
2317 {
2318 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2319 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2320 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2321 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2322 }
2323
2324 void OPPROTO op_movo(void)
2325 {
2326 /* XXX: badly generated code */
2327 XMMReg *d, *s;
2328 d = (XMMReg *)((char *)env + PARAM1);
2329 s = (XMMReg *)((char *)env + PARAM2);
2330 memcpy16(d, s);
2331 }
2332
2333 void OPPROTO op_movq(void)
2334 {
2335 uint64_t *d, *s;
2336 d = (uint64_t *)((char *)env + PARAM1);
2337 s = (uint64_t *)((char *)env + PARAM2);
2338 *d = *s;
2339 }
2340
2341 void OPPROTO op_movl(void)
2342 {
2343 uint32_t *d, *s;
2344 d = (uint32_t *)((char *)env + PARAM1);
2345 s = (uint32_t *)((char *)env + PARAM2);
2346 *d = *s;
2347 }
2348
2349 void OPPROTO op_movq_env_0(void)
2350 {
2351 uint64_t *d;
2352 d = (uint64_t *)((char *)env + PARAM1);
2353 *d = 0;
2354 }
2355
2356 void OPPROTO op_fxsave_A0(void)
2357 {
2358 helper_fxsave(A0, PARAM1);
2359 }
2360
2361 void OPPROTO op_fxrstor_A0(void)
2362 {
2363 helper_fxrstor(A0, PARAM1);
2364 }
2365
2366 /* XXX: optimize by storing fptt and fptags in the static cpu state */
2367 void OPPROTO op_enter_mmx(void)
2368 {
2369 env->fpstt = 0;
2370 *(uint32_t *)(env->fptags) = 0;
2371 *(uint32_t *)(env->fptags + 4) = 0;
2372 }
2373
2374 void OPPROTO op_emms(void)
2375 {
2376 /* set to empty state */
2377 *(uint32_t *)(env->fptags) = 0x01010101;
2378 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2379 }
2380
2381 #define SHIFT 0
2382 #include "ops_sse.h"
2383
2384 #define SHIFT 1
2385 #include "ops_sse.h"