]>
git.proxmox.com Git - qemu.git/blob - target-i386/translate-copy.c
2 * i386 on i386 translation
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 #include <sys/ucontext.h>
39 extern char exec_loop
;
49 #define PREFIX_REPZ 0x01
50 #define PREFIX_REPNZ 0x02
51 #define PREFIX_LOCK 0x04
52 #define PREFIX_DATA 0x08
53 #define PREFIX_ADR 0x10
55 typedef struct DisasContext
{
56 /* current insn context */
57 int override
; /* -1 if no override */
60 uint8_t *pc
; /* pc = eip + cs_base */
61 int is_jmp
; /* 1 = means jump (stop translation), 2 means CPU
62 static state change (stop translation) */
64 uint8_t *gen_code_ptr
;
65 uint8_t *gen_code_start
;
67 /* current block context */
68 uint8_t *cs_base
; /* base of CS segment */
69 int pe
; /* protected mode */
70 int code32
; /* 32 bit code segment */
71 int f_st
; /* currently unused */
72 int vm86
; /* vm86 mode */
76 struct TranslationBlock
*tb
;
79 #define CPU_FIELD_OFFSET(field) offsetof(CPUState, field)
81 #define CPU_SEG 0x64 /* fs override */
83 static inline void gb(DisasContext
*s
, uint32_t val
)
85 *s
->gen_code_ptr
++ = val
;
88 static inline void gw(DisasContext
*s
, uint32_t val
)
90 *s
->gen_code_ptr
++ = val
;
91 *s
->gen_code_ptr
++ = val
>> 8;
94 static inline void gl(DisasContext
*s
, uint32_t val
)
96 *s
->gen_code_ptr
++ = val
;
97 *s
->gen_code_ptr
++ = val
>> 8;
98 *s
->gen_code_ptr
++ = val
>> 16;
99 *s
->gen_code_ptr
++ = val
>> 24;
102 static inline void gjmp(DisasContext
*s
, long val
)
104 gb(s
, 0xe9); /* jmp */
105 gl(s
, val
- (long)(s
->gen_code_ptr
+ 4));
108 static inline void gen_movl_addr_im(DisasContext
*s
,
109 uint32_t addr
, uint32_t val
)
111 gb(s
, CPU_SEG
); /* seg movl im, addr */
118 static inline void gen_movw_addr_im(DisasContext
*s
,
119 uint32_t addr
, uint32_t val
)
121 gb(s
, CPU_SEG
); /* seg movl im, addr */
130 static void gen_jmp(DisasContext
*s
, uint32_t target_eip
)
132 TranslationBlock
*tb
= s
->tb
;
134 gb(s
, 0xe9); /* jmp */
135 tb
->tb_jmp_offset
[0] = s
->gen_code_ptr
- s
->gen_code_start
;
138 tb
->tb_next_offset
[0] = s
->gen_code_ptr
- s
->gen_code_start
;
139 gen_movl_addr_im(s
, CPU_FIELD_OFFSET(eip
), target_eip
);
140 gen_movl_addr_im(s
, CPU_FIELD_OFFSET(tmp0
), (uint32_t)tb
);
141 gjmp(s
, (long)&exec_loop
);
146 static void gen_jcc(DisasContext
*s
, int op
,
147 uint32_t target_eip
, uint32_t next_eip
)
149 TranslationBlock
*tb
= s
->tb
;
151 gb(s
, 0x0f); /* jcc */
153 tb
->tb_jmp_offset
[0] = s
->gen_code_ptr
- s
->gen_code_start
;
155 gb(s
, 0xe9); /* jmp */
156 tb
->tb_jmp_offset
[1] = s
->gen_code_ptr
- s
->gen_code_start
;
159 tb
->tb_next_offset
[0] = s
->gen_code_ptr
- s
->gen_code_start
;
160 gen_movl_addr_im(s
, CPU_FIELD_OFFSET(eip
), target_eip
);
161 gen_movl_addr_im(s
, CPU_FIELD_OFFSET(tmp0
), (uint32_t)tb
);
162 gjmp(s
, (long)&exec_loop
);
164 tb
->tb_next_offset
[1] = s
->gen_code_ptr
- s
->gen_code_start
;
165 gen_movl_addr_im(s
, CPU_FIELD_OFFSET(eip
), next_eip
);
166 gen_movl_addr_im(s
, CPU_FIELD_OFFSET(tmp0
), (uint32_t)tb
| 1);
167 gjmp(s
, (long)&exec_loop
);
172 static void gen_eob(DisasContext
*s
)
174 gen_movl_addr_im(s
, CPU_FIELD_OFFSET(tmp0
), 0);
175 gjmp(s
, (long)&exec_loop
);
180 static inline void gen_lea_modrm(DisasContext
*s
, int modrm
)
188 mod
= (modrm
>> 6) & 3;
200 code
= ldub_code(s
->pc
++);
201 scale
= (code
>> 6) & 3;
202 index
= (code
>> 3) & 7;
210 disp
= ldl_code(s
->pc
);
217 disp
= (int8_t)ldub_code(s
->pc
++);
221 disp
= ldl_code(s
->pc
);
230 disp
= lduw_code(s
->pc
);
237 disp
= (int8_t)ldub_code(s
->pc
++);
241 disp
= lduw_code(s
->pc
);
248 static inline void parse_modrm(DisasContext
*s
, int modrm
)
250 if ((modrm
& 0xc0) != 0xc0)
251 gen_lea_modrm(s
, modrm
);
254 static inline uint32_t insn_get(DisasContext
*s
, int ot
)
260 ret
= ldub_code(s
->pc
);
264 ret
= lduw_code(s
->pc
);
269 ret
= ldl_code(s
->pc
);
276 /* convert one instruction. s->is_jmp is set if the translation must
278 static int disas_insn(DisasContext
*s
)
280 uint8_t *pc_start
, *pc_tmp
, *pc_start_insn
;
281 int b
, prefixes
, aflag
, dflag
, next_eip
, val
;
283 int modrm
, mod
, op
, rm
;
291 b
= ldub_code(s
->pc
);
296 prefixes
|= PREFIX_REPZ
;
299 prefixes
|= PREFIX_REPNZ
;
302 prefixes
|= PREFIX_LOCK
;
323 prefixes
|= PREFIX_DATA
;
326 prefixes
|= PREFIX_ADR
;
330 if (prefixes
& PREFIX_DATA
)
332 if (prefixes
& PREFIX_ADR
)
335 s
->prefix
= prefixes
;
339 /* lock generation */
340 if (prefixes
& PREFIX_LOCK
)
342 if (s
->override
== R_FS
|| s
->override
== R_GS
|| s
->override
== R_CS
)
345 pc_start_insn
= s
->pc
- 1;
346 /* now check op code */
350 /**************************/
351 /* extended op code */
352 b
= ldub_code(s
->pc
++) | 0x100;
355 /**************************/
372 ot
= dflag
? OT_LONG
: OT_WORD
;
375 case 0: /* OP Ev, Gv */
376 modrm
= ldub_code(s
->pc
++);
377 parse_modrm(s
, modrm
);
379 case 1: /* OP Gv, Ev */
380 modrm
= ldub_code(s
->pc
++);
381 parse_modrm(s
, modrm
);
383 case 2: /* OP A, Iv */
390 case 0x80: /* GRP1 */
398 ot
= dflag
? OT_LONG
: OT_WORD
;
400 modrm
= ldub_code(s
->pc
++);
401 parse_modrm(s
, modrm
);
411 insn_get(s
, OT_BYTE
);
417 /**************************/
418 /* inc, dec, and other misc arith */
419 case 0x40 ... 0x47: /* inc Gv */
421 case 0x48 ... 0x4f: /* dec Gv */
423 case 0xf6: /* GRP3 */
428 ot
= dflag
? OT_LONG
: OT_WORD
;
430 modrm
= ldub_code(s
->pc
++);
431 op
= (modrm
>> 3) & 7;
432 parse_modrm(s
, modrm
);
455 case 0xfe: /* GRP4 */
456 case 0xff: /* GRP5 */
460 ot
= dflag
? OT_LONG
: OT_WORD
;
462 modrm
= ldub_code(s
->pc
++);
463 mod
= (modrm
>> 6) & 3;
464 op
= (modrm
>> 3) & 7;
465 if (op
>= 2 && b
== 0xfe) {
469 parse_modrm(s
, modrm
);
476 case 2: /* call Ev */
477 /* XXX: optimize and handle MEM exceptions specifically
478 fs movl %eax, regs[0]
484 case 3: /* lcall Ev */
487 /* XXX: optimize and handle MEM exceptions specifically
488 fs movl %eax, regs[0]
493 case 5: /* ljmp Ev */
495 case 6: /* push Ev */
501 case 0xa8: /* test eAX, Iv */
506 ot
= dflag
? OT_LONG
: OT_WORD
;
510 case 0x98: /* CWDE/CBW */
512 case 0x99: /* CDQ/CWD */
514 case 0x1af: /* imul Gv, Ev */
515 case 0x69: /* imul Gv, Ev, I */
517 ot
= dflag
? OT_LONG
: OT_WORD
;
518 modrm
= ldub_code(s
->pc
++);
519 parse_modrm(s
, modrm
);
522 } else if (b
== 0x6b) {
523 insn_get(s
, OT_BYTE
);
528 case 0x84: /* test Ev, Gv */
532 case 0x1c1: /* xadd Ev, Gv */
535 case 0x1b1: /* cmpxchg Ev, Gv */
537 case 0x8f: /* pop Ev */
540 case 0x89: /* mov Gv, Ev */
543 case 0x8b: /* mov Ev, Gv */
545 case 0x1b6: /* movzbS Gv, Eb */
546 case 0x1b7: /* movzwS Gv, Eb */
547 case 0x1be: /* movsbS Gv, Eb */
548 case 0x1bf: /* movswS Gv, Eb */
551 case 0x87: /* xchg Ev, Gv */
554 case 0xd1: /* shift Ev,1 */
557 case 0xd3: /* shift Ev,cl */
559 case 0x1a5: /* shld cl */
560 case 0x1ad: /* shrd cl */
562 case 0x190 ... 0x19f: /* setcc Gv */
564 /* XXX: emulate cmov if not available ? */
565 case 0x140 ... 0x14f: /* cmov Gv, Ev */
567 case 0x1a3: /* bt Gv, Ev */
568 case 0x1ab: /* bts */
569 case 0x1b3: /* btr */
570 case 0x1bb: /* btc */
572 case 0x1bc: /* bsf */
573 case 0x1bd: /* bsr */
575 modrm
= ldub_code(s
->pc
++);
576 parse_modrm(s
, modrm
);
579 case 0x1c7: /* cmpxchg8b */
580 modrm
= ldub_code(s
->pc
++);
581 mod
= (modrm
>> 6) & 3;
584 parse_modrm(s
, modrm
);
587 /**************************/
589 case 0x50 ... 0x57: /* push */
590 case 0x58 ... 0x5f: /* pop */
591 case 0x60: /* pusha */
592 case 0x61: /* popa */
595 case 0x68: /* push Iv */
597 ot
= dflag
? OT_LONG
: OT_WORD
;
601 insn_get(s
, OT_BYTE
);
603 case 0xc8: /* enter */
608 case 0xc9: /* leave */
611 case 0x06: /* push es */
612 case 0x0e: /* push cs */
613 case 0x16: /* push ss */
614 case 0x1e: /* push ds */
616 push segs[n].selector
619 case 0x1a0: /* push fs */
620 case 0x1a8: /* push gs */
622 case 0x07: /* pop es */
623 case 0x17: /* pop ss */
624 case 0x1f: /* pop ds */
626 case 0x1a1: /* pop fs */
627 case 0x1a9: /* pop gs */
629 case 0x8e: /* mov seg, Gv */
632 movl segs[].selector, r
637 case 0x8c: /* mov Gv, seg */
639 case 0xc4: /* les Gv */
642 case 0xc5: /* lds Gv */
645 case 0x1b2: /* lss Gv */
648 case 0x1b4: /* lfs Gv */
651 case 0x1b5: /* lgs Gv */
655 /************************/
659 /* currently not stable enough */
662 if (s
->flags
& (HF_EM_MASK
| HF_TS_MASK
))
666 /* for testing FPU context switch */
669 count
= (count
+ 1) % 3;
674 modrm
= ldub_code(s
->pc
++);
675 mod
= (modrm
>> 6) & 3;
677 op
= ((b
& 7) << 3) | ((modrm
>> 3) & 7);
680 parse_modrm(s
, modrm
);
682 case 0x00 ... 0x07: /* fxxxs */
683 case 0x10 ... 0x17: /* fixxxl */
684 case 0x20 ... 0x27: /* fxxxl */
685 case 0x30 ... 0x37: /* fixxx */
687 case 0x08: /* flds */
688 case 0x0a: /* fsts */
689 case 0x0b: /* fstps */
690 case 0x18: /* fildl */
691 case 0x1a: /* fistl */
692 case 0x1b: /* fistpl */
693 case 0x28: /* fldl */
694 case 0x2a: /* fstl */
695 case 0x2b: /* fstpl */
696 case 0x38: /* filds */
697 case 0x3a: /* fists */
698 case 0x3b: /* fistps */
699 case 0x0c: /* fldenv mem */
700 case 0x0d: /* fldcw mem */
701 case 0x0e: /* fnstenv mem */
702 case 0x0f: /* fnstcw mem */
703 case 0x1d: /* fldt mem */
704 case 0x1f: /* fstpt mem */
705 case 0x2c: /* frstor mem */
706 case 0x2e: /* fnsave mem */
707 case 0x2f: /* fnstsw mem */
708 case 0x3c: /* fbld */
709 case 0x3e: /* fbstp */
710 case 0x3d: /* fildll */
711 case 0x3f: /* fistpll */
717 /* register float ops */
719 case 0x08: /* fld sti */
720 case 0x09: /* fxchg sti */
722 case 0x0a: /* grp d9/2 */
730 case 0x0c: /* grp d9/4 */
741 case 0x0d: /* grp d9/5 */
755 case 0x0e: /* grp d9/6 */
757 case 0x0f: /* grp d9/7 */
759 case 0x00: case 0x01: case 0x04 ... 0x07: /* fxxx st, sti */
760 case 0x20: case 0x21: case 0x24 ... 0x27: /* fxxx sti, st */
761 case 0x30: case 0x31: case 0x34 ... 0x37: /* fxxxp sti, st */
763 case 0x02: /* fcom */
765 case 0x03: /* fcomp */
767 case 0x15: /* da/5 */
769 case 1: /* fucompp */
777 case 0: /* feni (287 only, just do nop here) */
778 case 1: /* fdisi (287 only, just do nop here) */
782 case 4: /* fsetpm (287 only, just do nop here) */
788 case 0x1d: /* fucomi */
790 case 0x1e: /* fcomi */
792 case 0x2a: /* fst sti */
794 case 0x2b: /* fstp sti */
796 case 0x2c: /* fucom st(i) */
798 case 0x2d: /* fucomp st(i) */
800 case 0x33: /* de/3 */
808 case 0x3c: /* df/4 */
816 case 0x3d: /* fucomip */
818 case 0x3e: /* fcomip */
820 case 0x10 ... 0x13: /* fcmovxx */
827 s
->tb
->cflags
|= CF_TB_FP_USED
;
830 /**************************/
833 case 0xc7: /* mov Ev, Iv */
837 ot
= dflag
? OT_LONG
: OT_WORD
;
838 modrm
= ldub_code(s
->pc
++);
839 parse_modrm(s
, modrm
);
844 ot
= dflag
? OT_LONG
: OT_WORD
;
845 modrm
= ldub_code(s
->pc
++);
846 mod
= (modrm
>> 6) & 3;
849 parse_modrm(s
, modrm
);
852 case 0xa0: /* mov EAX, Ov */
854 case 0xa2: /* mov Ov, EAX */
859 ot
= dflag
? OT_LONG
: OT_WORD
;
861 insn_get(s
, OT_LONG
);
863 insn_get(s
, OT_WORD
);
865 case 0xd7: /* xlat */
867 case 0xb0 ... 0xb7: /* mov R, Ib */
868 insn_get(s
, OT_BYTE
);
870 case 0xb8 ... 0xbf: /* mov R, Iv */
871 ot
= dflag
? OT_LONG
: OT_WORD
;
875 case 0x91 ... 0x97: /* xchg R, EAX */
878 /************************/
881 case 0xc1: /* shift Ev,imm */
883 case 0x1a4: /* shld imm */
884 case 0x1ac: /* shrd imm */
885 modrm
= ldub_code(s
->pc
++);
886 parse_modrm(s
, modrm
);
890 /************************/
893 case 0xa4: /* movsS */
897 case 0xaa: /* stosS */
901 case 0xac: /* lodsS */
905 case 0xae: /* scasS */
909 case 0xa6: /* cmpsS */
913 case 0x6c: /* insS */
917 case 0x6e: /* outsS */
921 /************************/
939 /************************/
942 case 0xc2: /* ret im */
943 val
= ldsw_code(s
->pc
);
946 gen_stack_update(s
, val
+ (2 << s
->dflag
));
948 gen_op_andl_T0_ffff();
957 gb(s
, 0x66); /* d16 */
958 gb(s
, 0x8f); /* pop addr */
960 gl(s
, CPU_FIELD_OFFSET(eip
));
962 /* reset high bits of EIP */
963 gen_movw_addr_im(s
, CPU_FIELD_OFFSET(eip
) + 2, 0);
967 case 0xca: /* lret im */
968 case 0xcb: /* lret */
969 case 0xcf: /* iret */
970 case 0x9a: /* lcall im */
971 case 0xea: /* ljmp im */
974 case 0xe8: /* call im */
975 ot
= dflag
? OT_LONG
: OT_WORD
;
976 val
= insn_get(s
, ot
);
977 next_eip
= s
->pc
- s
->cs_base
;
980 gb(s
, 0x68); /* pushl imm */
983 gb(s
, 0x66); /* pushw imm */
991 ot
= dflag
? OT_LONG
: OT_WORD
;
992 val
= insn_get(s
, ot
);
993 val
+= s
->pc
- s
->cs_base
;
998 case 0xeb: /* jmp Jb */
999 val
= (int8_t)insn_get(s
, OT_BYTE
);
1000 val
+= s
->pc
- s
->cs_base
;
1005 case 0x70 ... 0x7f: /* jcc Jb */
1006 val
= (int8_t)insn_get(s
, OT_BYTE
);
1008 case 0x180 ... 0x18f: /* jcc Jv */
1010 val
= insn_get(s
, OT_LONG
);
1012 val
= (int16_t)insn_get(s
, OT_WORD
);
1015 next_eip
= s
->pc
- s
->cs_base
;
1019 gen_jcc(s
, b
& 0xf, val
, next_eip
);
1022 /************************/
1024 case 0x9c: /* pushf */
1025 /* XXX: put specific code ? */
1026 goto unsupported_op
;
1027 case 0x9d: /* popf */
1028 goto unsupported_op
;
1030 case 0x9e: /* sahf */
1031 case 0x9f: /* lahf */
1032 case 0xf5: /* cmc */
1033 case 0xf8: /* clc */
1034 case 0xf9: /* stc */
1035 case 0xfc: /* cld */
1036 case 0xfd: /* std */
1039 /************************/
1040 /* bit operations */
1041 case 0x1ba: /* bt/bts/btr/btc Gv, im */
1042 ot
= dflag
? OT_LONG
: OT_WORD
;
1043 modrm
= ldub_code(s
->pc
++);
1044 op
= (modrm
>> 3) & 7;
1045 parse_modrm(s
, modrm
);
1051 /************************/
1053 case 0x27: /* daa */
1055 case 0x2f: /* das */
1057 case 0x37: /* aaa */
1059 case 0x3f: /* aas */
1061 case 0xd4: /* aam */
1064 case 0xd5: /* aad */
1067 /************************/
1069 case 0x90: /* nop */
1071 case 0x9b: /* fwait */
1072 if ((s
->flags
& (HF_MP_MASK
| HF_TS_MASK
)) ==
1073 (HF_MP_MASK
| HF_TS_MASK
)) {
1074 goto unsupported_op
;
1077 case 0xcc: /* int3 */
1078 goto unsupported_op
;
1079 case 0xcd: /* int N */
1080 goto unsupported_op
;
1081 case 0xce: /* into */
1082 goto unsupported_op
;
1083 case 0xf1: /* icebp (undocumented, exits to external debugger) */
1084 goto unsupported_op
;
1085 case 0xfa: /* cli */
1086 goto unsupported_op
;
1087 case 0xfb: /* sti */
1088 goto unsupported_op
;
1089 case 0x62: /* bound */
1090 modrm
= ldub_code(s
->pc
++);
1091 mod
= (modrm
>> 6) & 3;
1094 parse_modrm(s
, modrm
);
1096 case 0x1c8 ... 0x1cf: /* bswap reg */
1098 case 0xd6: /* salc */
1100 case 0xe0: /* loopnz */
1101 case 0xe1: /* loopz */
1102 case 0xe2: /* loop */
1103 case 0xe3: /* jecxz */
1104 goto unsupported_op
;
1106 case 0x130: /* wrmsr */
1107 case 0x132: /* rdmsr */
1108 goto unsupported_op
;
1109 case 0x131: /* rdtsc */
1110 goto unsupported_op
;
1111 case 0x1a2: /* cpuid */
1112 goto unsupported_op
;
1113 case 0xf4: /* hlt */
1114 goto unsupported_op
;
1116 goto unsupported_op
;
1118 goto unsupported_op
;
1119 case 0x108: /* invd */
1120 case 0x109: /* wbinvd */
1121 goto unsupported_op
;
1122 case 0x63: /* arpl */
1123 goto unsupported_op
;
1124 case 0x102: /* lar */
1125 case 0x103: /* lsl */
1126 goto unsupported_op
;
1128 goto unsupported_op
;
1129 case 0x120: /* mov reg, crN */
1130 case 0x122: /* mov crN, reg */
1131 goto unsupported_op
;
1132 case 0x121: /* mov reg, drN */
1133 case 0x123: /* mov drN, reg */
1134 goto unsupported_op
;
1135 case 0x106: /* clts */
1136 goto unsupported_op
;
1141 /* just copy the code */
1143 /* no override yet */
1148 if (prefixes
& PREFIX_REPZ
)
1150 else if (prefixes
& PREFIX_REPNZ
)
1154 len
= s
->pc
- pc_start_insn
;
1155 for(i
= 0; i
< len
; i
++) {
1156 *s
->gen_code_ptr
++ = ldub_code(pc_start_insn
+ i
);
1163 /* fall back to slower code gen necessary */
1168 #define GEN_CODE_MAX_SIZE 8192
1169 #define GEN_CODE_MAX_INSN_SIZE 512
1171 static inline int gen_intermediate_code_internal(CPUState
*env
,
1172 TranslationBlock
*tb
,
1173 uint8_t *gen_code_ptr
,
1174 int *gen_code_size_ptr
,
1178 DisasContext dc1
, *dc
= &dc1
;
1179 uint8_t *pc_insn
, *pc_start
, *gen_code_end
;
1183 if (env
->nb_breakpoints
> 0 ||
1184 env
->singlestep_enabled
)
1187 if (flags
& (HF_TF_MASK
| HF_ADDSEG_MASK
|
1188 HF_SOFTMMU_MASK
| HF_INHIBIT_IRQ_MASK
))
1190 if (!(flags
& HF_SS32_MASK
))
1192 if (tb
->cflags
& CF_SINGLE_INSN
)
1194 gen_code_end
= gen_code_ptr
+
1195 GEN_CODE_MAX_SIZE
- GEN_CODE_MAX_INSN_SIZE
;
1196 dc
->gen_code_ptr
= gen_code_ptr
;
1197 dc
->gen_code_start
= gen_code_ptr
;
1199 /* generate intermediate code */
1200 pc_start
= (uint8_t *)tb
->pc
;
1201 cs_base
= (uint8_t *)tb
->cs_base
;
1203 dc
->cs_base
= cs_base
;
1204 dc
->pe
= (flags
>> HF_PE_SHIFT
) & 1;
1205 dc
->code32
= (flags
>> HF_CS32_SHIFT
) & 1;
1207 dc
->vm86
= (flags
>> VM_SHIFT
) & 1;
1208 dc
->cpl
= (flags
>> HF_CPL_SHIFT
) & 3;
1209 dc
->iopl
= (flags
>> IOPL_SHIFT
) & 3;
1217 ret
= disas_insn(dc
);
1219 /* unsupported insn */
1220 if (dc
->pc
== pc_start
) {
1221 /* if first instruction, signal that no copying was done */
1224 gen_jmp(dc
, dc
->pc
- dc
->cs_base
);
1229 /* search pc mode */
1230 if (tc_ptr
< dc
->gen_code_ptr
) {
1231 env
->eip
= pc_insn
- cs_base
;
1235 /* stop translation if indicated */
1238 /* if too long translation, stop generation */
1239 if (dc
->gen_code_ptr
>= gen_code_end
||
1240 (dc
->pc
- pc_start
) >= (TARGET_PAGE_SIZE
- 32)) {
1241 gen_jmp(dc
, dc
->pc
- dc
->cs_base
);
1247 if (loglevel
& CPU_LOG_TB_IN_ASM
) {
1248 fprintf(logfile
, "----------------\n");
1249 fprintf(logfile
, "IN: COPY: %s fpu=%d\n",
1250 lookup_symbol(pc_start
),
1251 tb
->cflags
& CF_TB_FP_USED
? 1 : 0);
1252 disas(logfile
, pc_start
, dc
->pc
- pc_start
, 0, !dc
->code32
);
1253 fprintf(logfile
, "\n");
1258 *gen_code_size_ptr
= dc
->gen_code_ptr
- dc
->gen_code_start
;
1259 tb
->size
= dc
->pc
- pc_start
;
1260 tb
->cflags
|= CF_CODE_COPY
;
1267 /* generate code by just copying data. Return -1 if cannot generate
1268 any code. Return 0 if code was generated */
1269 int cpu_gen_code_copy(CPUState
*env
, TranslationBlock
*tb
,
1270 int max_code_size
, int *gen_code_size_ptr
)
1272 /* generate machine code */
1273 tb
->tb_next_offset
[0] = 0xffff;
1274 tb
->tb_next_offset
[1] = 0xffff;
1275 #ifdef USE_DIRECT_JUMP
1276 /* the following two entries are optional (only used for string ops) */
1277 tb
->tb_jmp_offset
[2] = 0xffff;
1278 tb
->tb_jmp_offset
[3] = 0xffff;
1280 return gen_intermediate_code_internal(env
, tb
,
1281 tb
->tc_ptr
, gen_code_size_ptr
,
1285 static uint8_t dummy_gen_code_buf
[GEN_CODE_MAX_SIZE
];
1287 int cpu_restore_state_copy(TranslationBlock
*tb
,
1288 CPUState
*env
, unsigned long searched_pc
,
1291 struct ucontext
*uc
= puc
;
1294 /* find opc index corresponding to search_pc */
1295 if (searched_pc
< (unsigned long)tb
->tc_ptr
)
1297 searched_pc
= searched_pc
- (long)tb
->tc_ptr
+ (long)dummy_gen_code_buf
;
1298 ret
= gen_intermediate_code_internal(env
, tb
,
1299 dummy_gen_code_buf
, NULL
,
1300 1, (uint8_t *)searched_pc
);
1303 /* restore all the CPU state from the CPU context from the
1304 signal. The FPU context stays in the host CPU. */
1306 env
->regs
[R_EAX
] = uc
->uc_mcontext
.gregs
[REG_EAX
];
1307 env
->regs
[R_ECX
] = uc
->uc_mcontext
.gregs
[REG_ECX
];
1308 env
->regs
[R_EDX
] = uc
->uc_mcontext
.gregs
[REG_EDX
];
1309 env
->regs
[R_EBX
] = uc
->uc_mcontext
.gregs
[REG_EBX
];
1310 env
->regs
[R_ESP
] = uc
->uc_mcontext
.gregs
[REG_ESP
];
1311 env
->regs
[R_EBP
] = uc
->uc_mcontext
.gregs
[REG_EBP
];
1312 env
->regs
[R_ESI
] = uc
->uc_mcontext
.gregs
[REG_ESI
];
1313 env
->regs
[R_EDI
] = uc
->uc_mcontext
.gregs
[REG_EDI
];
1314 eflags
= uc
->uc_mcontext
.gregs
[REG_EFL
];
1315 env
->df
= 1 - (2 * ((eflags
>> 10) & 1));
1316 env
->cc_src
= eflags
& (CC_O
| CC_S
| CC_Z
| CC_A
| CC_P
| CC_C
);
1317 env
->cc_op
= CC_OP_EFLAGS
;
1321 #endif /* USE_CODE_COPY */