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1 /*
2 * PowerPC emulation micro-operations for qemu.
3 *
4 * Copyright (c) 2003-2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 //#define DEBUG_OP
22
23 #include "config.h"
24 #include "exec.h"
25 #include "host-utils.h"
26 #include "helper_regs.h"
27 #include "op_helper.h"
28
29 #if !defined(CONFIG_USER_ONLY)
30 void OPPROTO op_load_sdr1 (void)
31 {
32 T0 = env->sdr1;
33 RETURN();
34 }
35
36 void OPPROTO op_store_sdr1 (void)
37 {
38 do_store_sdr1(env, T0);
39 RETURN();
40 }
41
42 #if defined (TARGET_PPC64)
43 void OPPROTO op_load_asr (void)
44 {
45 T0 = env->asr;
46 RETURN();
47 }
48
49 void OPPROTO op_store_asr (void)
50 {
51 ppc_store_asr(env, T0);
52 RETURN();
53 }
54 #endif
55 #endif
56
57 /* SPR */
58 void OPPROTO op_load_spr (void)
59 {
60 T0 = env->spr[PARAM1];
61 RETURN();
62 }
63
64 void OPPROTO op_store_spr (void)
65 {
66 env->spr[PARAM1] = T0;
67 RETURN();
68 }
69
70 void OPPROTO op_load_dump_spr (void)
71 {
72 T0 = ppc_load_dump_spr(PARAM1);
73 RETURN();
74 }
75
76 void OPPROTO op_store_dump_spr (void)
77 {
78 ppc_store_dump_spr(PARAM1, T0);
79 RETURN();
80 }
81
82 void OPPROTO op_mask_spr (void)
83 {
84 env->spr[PARAM1] &= ~T0;
85 RETURN();
86 }
87
88 void OPPROTO op_load_tbl (void)
89 {
90 T0 = cpu_ppc_load_tbl(env);
91 RETURN();
92 }
93
94 void OPPROTO op_load_tbu (void)
95 {
96 T0 = cpu_ppc_load_tbu(env);
97 RETURN();
98 }
99
100 void OPPROTO op_load_atbl (void)
101 {
102 T0 = cpu_ppc_load_atbl(env);
103 RETURN();
104 }
105
106 void OPPROTO op_load_atbu (void)
107 {
108 T0 = cpu_ppc_load_atbu(env);
109 RETURN();
110 }
111
112 #if !defined(CONFIG_USER_ONLY)
113 void OPPROTO op_store_tbl (void)
114 {
115 cpu_ppc_store_tbl(env, T0);
116 RETURN();
117 }
118
119 void OPPROTO op_store_tbu (void)
120 {
121 cpu_ppc_store_tbu(env, T0);
122 RETURN();
123 }
124
125 void OPPROTO op_store_atbl (void)
126 {
127 cpu_ppc_store_atbl(env, T0);
128 RETURN();
129 }
130
131 void OPPROTO op_store_atbu (void)
132 {
133 cpu_ppc_store_atbu(env, T0);
134 RETURN();
135 }
136
137 void OPPROTO op_load_decr (void)
138 {
139 T0 = cpu_ppc_load_decr(env);
140 RETURN();
141 }
142
143 void OPPROTO op_store_decr (void)
144 {
145 cpu_ppc_store_decr(env, T0);
146 RETURN();
147 }
148
149 void OPPROTO op_load_ibat (void)
150 {
151 T0 = env->IBAT[PARAM1][PARAM2];
152 RETURN();
153 }
154
155 void OPPROTO op_store_ibatu (void)
156 {
157 do_store_ibatu(env, PARAM1, T0);
158 RETURN();
159 }
160
161 void OPPROTO op_store_ibatl (void)
162 {
163 #if 1
164 env->IBAT[1][PARAM1] = T0;
165 #else
166 do_store_ibatl(env, PARAM1, T0);
167 #endif
168 RETURN();
169 }
170
171 void OPPROTO op_load_dbat (void)
172 {
173 T0 = env->DBAT[PARAM1][PARAM2];
174 RETURN();
175 }
176
177 void OPPROTO op_store_dbatu (void)
178 {
179 do_store_dbatu(env, PARAM1, T0);
180 RETURN();
181 }
182
183 void OPPROTO op_store_dbatl (void)
184 {
185 #if 1
186 env->DBAT[1][PARAM1] = T0;
187 #else
188 do_store_dbatl(env, PARAM1, T0);
189 #endif
190 RETURN();
191 }
192 #endif /* !defined(CONFIG_USER_ONLY) */
193
194 /* Return from interrupt */
195 #if !defined(CONFIG_USER_ONLY)
196 /* Exception vectors */
197 void OPPROTO op_store_excp_prefix (void)
198 {
199 T0 &= env->ivpr_mask;
200 env->excp_prefix = T0;
201 RETURN();
202 }
203
204 void OPPROTO op_store_excp_vector (void)
205 {
206 T0 &= env->ivor_mask;
207 env->excp_vectors[PARAM1] = T0;
208 RETURN();
209 }
210 #endif
211
212 /* 601 specific */
213 void OPPROTO op_load_601_rtcl (void)
214 {
215 T0 = cpu_ppc601_load_rtcl(env);
216 RETURN();
217 }
218
219 void OPPROTO op_load_601_rtcu (void)
220 {
221 T0 = cpu_ppc601_load_rtcu(env);
222 RETURN();
223 }
224
225 #if !defined(CONFIG_USER_ONLY)
226 void OPPROTO op_store_601_rtcl (void)
227 {
228 cpu_ppc601_store_rtcl(env, T0);
229 RETURN();
230 }
231
232 void OPPROTO op_store_601_rtcu (void)
233 {
234 cpu_ppc601_store_rtcu(env, T0);
235 RETURN();
236 }
237
238 void OPPROTO op_store_hid0_601 (void)
239 {
240 do_store_hid0_601();
241 RETURN();
242 }
243
244 void OPPROTO op_load_601_bat (void)
245 {
246 T0 = env->IBAT[PARAM1][PARAM2];
247 RETURN();
248 }
249
250 void OPPROTO op_store_601_batl (void)
251 {
252 do_store_ibatl_601(env, PARAM1, T0);
253 RETURN();
254 }
255
256 void OPPROTO op_store_601_batu (void)
257 {
258 do_store_ibatu_601(env, PARAM1, T0);
259 RETURN();
260 }
261 #endif /* !defined(CONFIG_USER_ONLY) */
262
263 /* SPR micro-ops */
264 /* 440 specific */
265 #if !defined(CONFIG_USER_ONLY)
266 void OPPROTO op_store_pir (void)
267 {
268 env->spr[SPR_PIR] = T0 & 0x0000000FUL;
269 RETURN();
270 }
271
272 void OPPROTO op_load_403_pb (void)
273 {
274 do_load_403_pb(PARAM1);
275 RETURN();
276 }
277
278 void OPPROTO op_store_403_pb (void)
279 {
280 do_store_403_pb(PARAM1);
281 RETURN();
282 }
283
284 void OPPROTO op_load_40x_pit (void)
285 {
286 T0 = load_40x_pit(env);
287 RETURN();
288 }
289
290 void OPPROTO op_store_40x_pit (void)
291 {
292 store_40x_pit(env, T0);
293 RETURN();
294 }
295
296 void OPPROTO op_store_40x_dbcr0 (void)
297 {
298 store_40x_dbcr0(env, T0);
299 RETURN();
300 }
301
302 void OPPROTO op_store_40x_sler (void)
303 {
304 store_40x_sler(env, T0);
305 RETURN();
306 }
307
308 void OPPROTO op_store_booke_tcr (void)
309 {
310 store_booke_tcr(env, T0);
311 RETURN();
312 }
313
314 void OPPROTO op_store_booke_tsr (void)
315 {
316 store_booke_tsr(env, T0);
317 RETURN();
318 }
319 #endif /* !defined(CONFIG_USER_ONLY) */
320