]> git.proxmox.com Git - qemu.git/blob - target-ppc/op.c
ppc: Convert op_andi to TCG
[qemu.git] / target-ppc / op.c
1 /*
2 * PowerPC emulation micro-operations for qemu.
3 *
4 * Copyright (c) 2003-2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 //#define DEBUG_OP
22
23 #include "config.h"
24 #include "exec.h"
25 #include "host-utils.h"
26 #include "helper_regs.h"
27 #include "op_helper.h"
28
29 void OPPROTO op_print_mem_EA (void)
30 {
31 do_print_mem_EA(T0);
32 RETURN();
33 }
34
35 /* PowerPC state maintenance operations */
36 /* set_Rc0 */
37 void OPPROTO op_set_Rc0 (void)
38 {
39 env->crf[0] = T0 | xer_so;
40 RETURN();
41 }
42
43 /* Generate exceptions */
44 void OPPROTO op_raise_exception_err (void)
45 {
46 do_raise_exception_err(PARAM1, PARAM2);
47 }
48
49 void OPPROTO op_debug (void)
50 {
51 do_raise_exception(EXCP_DEBUG);
52 }
53
54 /* Load/store special registers */
55 void OPPROTO op_load_cr (void)
56 {
57 do_load_cr();
58 RETURN();
59 }
60
61 void OPPROTO op_store_cr (void)
62 {
63 do_store_cr(PARAM1);
64 RETURN();
65 }
66
67 void OPPROTO op_load_xer_cr (void)
68 {
69 T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1);
70 RETURN();
71 }
72
73 void OPPROTO op_clear_xer_ov (void)
74 {
75 xer_so = 0;
76 xer_ov = 0;
77 RETURN();
78 }
79
80 void OPPROTO op_clear_xer_ca (void)
81 {
82 xer_ca = 0;
83 RETURN();
84 }
85
86 void OPPROTO op_load_xer_bc (void)
87 {
88 T1 = xer_bc;
89 RETURN();
90 }
91
92 void OPPROTO op_store_xer_bc (void)
93 {
94 xer_bc = T0;
95 RETURN();
96 }
97
98 void OPPROTO op_load_xer (void)
99 {
100 T0 = hreg_load_xer(env);
101 RETURN();
102 }
103
104 void OPPROTO op_store_xer (void)
105 {
106 hreg_store_xer(env, T0);
107 RETURN();
108 }
109
110 #if defined(TARGET_PPC64)
111 void OPPROTO op_store_pri (void)
112 {
113 do_store_pri(PARAM1);
114 RETURN();
115 }
116 #endif
117
118 #if !defined(CONFIG_USER_ONLY)
119 /* Segment registers load and store */
120 void OPPROTO op_load_sr (void)
121 {
122 T0 = env->sr[T1];
123 RETURN();
124 }
125
126 void OPPROTO op_store_sr (void)
127 {
128 do_store_sr(env, T1, T0);
129 RETURN();
130 }
131
132 #if defined(TARGET_PPC64)
133 void OPPROTO op_load_slb (void)
134 {
135 T0 = ppc_load_slb(env, T1);
136 RETURN();
137 }
138
139 void OPPROTO op_store_slb (void)
140 {
141 ppc_store_slb(env, T1, T0);
142 RETURN();
143 }
144 #endif /* defined(TARGET_PPC64) */
145
146 void OPPROTO op_load_sdr1 (void)
147 {
148 T0 = env->sdr1;
149 RETURN();
150 }
151
152 void OPPROTO op_store_sdr1 (void)
153 {
154 do_store_sdr1(env, T0);
155 RETURN();
156 }
157
158 #if defined (TARGET_PPC64)
159 void OPPROTO op_load_asr (void)
160 {
161 T0 = env->asr;
162 RETURN();
163 }
164
165 void OPPROTO op_store_asr (void)
166 {
167 ppc_store_asr(env, T0);
168 RETURN();
169 }
170 #endif
171
172 void OPPROTO op_load_msr (void)
173 {
174 T0 = env->msr;
175 RETURN();
176 }
177
178 void OPPROTO op_store_msr (void)
179 {
180 do_store_msr();
181 RETURN();
182 }
183
184 #if defined (TARGET_PPC64)
185 void OPPROTO op_store_msr_32 (void)
186 {
187 T0 = (env->msr & ~0xFFFFFFFFULL) | (T0 & 0xFFFFFFFF);
188 do_store_msr();
189 RETURN();
190 }
191 #endif
192
193 void OPPROTO op_update_riee (void)
194 {
195 /* We don't call do_store_msr here as we won't trigger
196 * any special case nor change hflags
197 */
198 T0 &= (1 << MSR_RI) | (1 << MSR_EE);
199 env->msr &= ~(1 << MSR_RI) | (1 << MSR_EE);
200 env->msr |= T0;
201 RETURN();
202 }
203 #endif
204
205 /* SPR */
206 void OPPROTO op_load_spr (void)
207 {
208 T0 = env->spr[PARAM1];
209 RETURN();
210 }
211
212 void OPPROTO op_store_spr (void)
213 {
214 env->spr[PARAM1] = T0;
215 RETURN();
216 }
217
218 void OPPROTO op_load_dump_spr (void)
219 {
220 T0 = ppc_load_dump_spr(PARAM1);
221 RETURN();
222 }
223
224 void OPPROTO op_store_dump_spr (void)
225 {
226 ppc_store_dump_spr(PARAM1, T0);
227 RETURN();
228 }
229
230 void OPPROTO op_mask_spr (void)
231 {
232 env->spr[PARAM1] &= ~T0;
233 RETURN();
234 }
235
236 void OPPROTO op_load_tbl (void)
237 {
238 T0 = cpu_ppc_load_tbl(env);
239 RETURN();
240 }
241
242 void OPPROTO op_load_tbu (void)
243 {
244 T0 = cpu_ppc_load_tbu(env);
245 RETURN();
246 }
247
248 void OPPROTO op_load_atbl (void)
249 {
250 T0 = cpu_ppc_load_atbl(env);
251 RETURN();
252 }
253
254 void OPPROTO op_load_atbu (void)
255 {
256 T0 = cpu_ppc_load_atbu(env);
257 RETURN();
258 }
259
260 #if !defined(CONFIG_USER_ONLY)
261 void OPPROTO op_store_tbl (void)
262 {
263 cpu_ppc_store_tbl(env, T0);
264 RETURN();
265 }
266
267 void OPPROTO op_store_tbu (void)
268 {
269 cpu_ppc_store_tbu(env, T0);
270 RETURN();
271 }
272
273 void OPPROTO op_store_atbl (void)
274 {
275 cpu_ppc_store_atbl(env, T0);
276 RETURN();
277 }
278
279 void OPPROTO op_store_atbu (void)
280 {
281 cpu_ppc_store_atbu(env, T0);
282 RETURN();
283 }
284
285 void OPPROTO op_load_decr (void)
286 {
287 T0 = cpu_ppc_load_decr(env);
288 RETURN();
289 }
290
291 void OPPROTO op_store_decr (void)
292 {
293 cpu_ppc_store_decr(env, T0);
294 RETURN();
295 }
296
297 void OPPROTO op_load_ibat (void)
298 {
299 T0 = env->IBAT[PARAM1][PARAM2];
300 RETURN();
301 }
302
303 void OPPROTO op_store_ibatu (void)
304 {
305 do_store_ibatu(env, PARAM1, T0);
306 RETURN();
307 }
308
309 void OPPROTO op_store_ibatl (void)
310 {
311 #if 1
312 env->IBAT[1][PARAM1] = T0;
313 #else
314 do_store_ibatl(env, PARAM1, T0);
315 #endif
316 RETURN();
317 }
318
319 void OPPROTO op_load_dbat (void)
320 {
321 T0 = env->DBAT[PARAM1][PARAM2];
322 RETURN();
323 }
324
325 void OPPROTO op_store_dbatu (void)
326 {
327 do_store_dbatu(env, PARAM1, T0);
328 RETURN();
329 }
330
331 void OPPROTO op_store_dbatl (void)
332 {
333 #if 1
334 env->DBAT[1][PARAM1] = T0;
335 #else
336 do_store_dbatl(env, PARAM1, T0);
337 #endif
338 RETURN();
339 }
340 #endif /* !defined(CONFIG_USER_ONLY) */
341
342 /* FPSCR */
343 #ifdef CONFIG_SOFTFLOAT
344 void OPPROTO op_reset_fpstatus (void)
345 {
346 env->fp_status.float_exception_flags = 0;
347 RETURN();
348 }
349 #endif
350
351 void OPPROTO op_compute_fprf (void)
352 {
353 do_compute_fprf(PARAM1);
354 RETURN();
355 }
356
357 #ifdef CONFIG_SOFTFLOAT
358 void OPPROTO op_float_check_status (void)
359 {
360 do_float_check_status();
361 RETURN();
362 }
363 #else
364 void OPPROTO op_float_check_status (void)
365 {
366 if (env->exception_index == POWERPC_EXCP_PROGRAM &&
367 (env->error_code & POWERPC_EXCP_FP)) {
368 /* Differred floating-point exception after target FPR update */
369 if (msr_fe0 != 0 || msr_fe1 != 0)
370 do_raise_exception_err(env->exception_index, env->error_code);
371 }
372 RETURN();
373 }
374 #endif
375
376 void OPPROTO op_load_fpscr_FT0 (void)
377 {
378 /* The 32 MSB of the target fpr are undefined.
379 * They'll be zero...
380 */
381 CPU_DoubleU u;
382
383 u.l.upper = 0;
384 u.l.lower = env->fpscr;
385 FT0 = u.d;
386 RETURN();
387 }
388
389 void OPPROTO op_load_fpscr_T0 (void)
390 {
391 T0 = (env->fpscr >> PARAM1) & 0xF;
392 RETURN();
393 }
394
395 void OPPROTO op_load_fpcc (void)
396 {
397 T0 = fpscr_fpcc;
398 RETURN();
399 }
400
401 void OPPROTO op_fpscr_resetbit (void)
402 {
403 env->fpscr &= PARAM1;
404 RETURN();
405 }
406
407 void OPPROTO op_fpscr_setbit (void)
408 {
409 do_fpscr_setbit(PARAM1);
410 RETURN();
411 }
412
413 void OPPROTO op_store_fpscr (void)
414 {
415 do_store_fpscr(PARAM1);
416 RETURN();
417 }
418
419 /* Branch */
420 void OPPROTO op_setlr (void)
421 {
422 env->lr = (uint32_t)PARAM1;
423 RETURN();
424 }
425
426 #if defined (TARGET_PPC64)
427 void OPPROTO op_setlr_64 (void)
428 {
429 env->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
430 RETURN();
431 }
432 #endif
433
434 void OPPROTO op_jz_T0 (void)
435 {
436 if (!T0)
437 GOTO_LABEL_PARAM(1);
438 RETURN();
439 }
440
441 void OPPROTO op_btest_T1 (void)
442 {
443 if (T0) {
444 env->nip = (uint32_t)(T1 & ~3);
445 } else {
446 env->nip = (uint32_t)PARAM1;
447 }
448 RETURN();
449 }
450
451 #if defined (TARGET_PPC64)
452 void OPPROTO op_btest_T1_64 (void)
453 {
454 if (T0) {
455 env->nip = (uint64_t)(T1 & ~3);
456 } else {
457 env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
458 }
459 RETURN();
460 }
461 #endif
462
463 void OPPROTO op_movl_T1_ctr (void)
464 {
465 T1 = env->ctr;
466 RETURN();
467 }
468
469 void OPPROTO op_movl_T1_lr (void)
470 {
471 T1 = env->lr;
472 RETURN();
473 }
474
475 /* tests with result in T0 */
476 void OPPROTO op_test_ctr (void)
477 {
478 T0 = (uint32_t)env->ctr;
479 RETURN();
480 }
481
482 #if defined(TARGET_PPC64)
483 void OPPROTO op_test_ctr_64 (void)
484 {
485 T0 = (uint64_t)env->ctr;
486 RETURN();
487 }
488 #endif
489
490 void OPPROTO op_test_ctr_true (void)
491 {
492 T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) != 0);
493 RETURN();
494 }
495
496 #if defined(TARGET_PPC64)
497 void OPPROTO op_test_ctr_true_64 (void)
498 {
499 T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) != 0);
500 RETURN();
501 }
502 #endif
503
504 void OPPROTO op_test_ctr_false (void)
505 {
506 T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) == 0);
507 RETURN();
508 }
509
510 #if defined(TARGET_PPC64)
511 void OPPROTO op_test_ctr_false_64 (void)
512 {
513 T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) == 0);
514 RETURN();
515 }
516 #endif
517
518 void OPPROTO op_test_ctrz (void)
519 {
520 T0 = ((uint32_t)env->ctr == 0);
521 RETURN();
522 }
523
524 #if defined(TARGET_PPC64)
525 void OPPROTO op_test_ctrz_64 (void)
526 {
527 T0 = ((uint64_t)env->ctr == 0);
528 RETURN();
529 }
530 #endif
531
532 void OPPROTO op_test_ctrz_true (void)
533 {
534 T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) != 0);
535 RETURN();
536 }
537
538 #if defined(TARGET_PPC64)
539 void OPPROTO op_test_ctrz_true_64 (void)
540 {
541 T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) != 0);
542 RETURN();
543 }
544 #endif
545
546 void OPPROTO op_test_ctrz_false (void)
547 {
548 T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) == 0);
549 RETURN();
550 }
551
552 #if defined(TARGET_PPC64)
553 void OPPROTO op_test_ctrz_false_64 (void)
554 {
555 T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) == 0);
556 RETURN();
557 }
558 #endif
559
560 void OPPROTO op_test_true (void)
561 {
562 T0 = (T0 & PARAM1);
563 RETURN();
564 }
565
566 void OPPROTO op_test_false (void)
567 {
568 T0 = ((T0 & PARAM1) == 0);
569 RETURN();
570 }
571
572 /* CTR maintenance */
573 void OPPROTO op_dec_ctr (void)
574 {
575 env->ctr--;
576 RETURN();
577 }
578
579 /*** Integer arithmetic ***/
580 /* add */
581 void OPPROTO op_check_addo (void)
582 {
583 xer_ov = (((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) &
584 ((uint32_t)T2 ^ (uint32_t)T0)) >> 31;
585 xer_so |= xer_ov;
586 RETURN();
587 }
588
589 #if defined(TARGET_PPC64)
590 void OPPROTO op_check_addo_64 (void)
591 {
592 xer_ov = (((uint64_t)T2 ^ (uint64_t)T1 ^ UINT64_MAX) &
593 ((uint64_t)T2 ^ (uint64_t)T0)) >> 63;
594 xer_so |= xer_ov;
595 RETURN();
596 }
597 #endif
598
599 /* add carrying */
600 void OPPROTO op_check_addc (void)
601 {
602 if (likely((uint32_t)T0 >= (uint32_t)T2)) {
603 xer_ca = 0;
604 } else {
605 xer_ca = 1;
606 }
607 RETURN();
608 }
609
610 #if defined(TARGET_PPC64)
611 void OPPROTO op_check_addc_64 (void)
612 {
613 if (likely((uint64_t)T0 >= (uint64_t)T2)) {
614 xer_ca = 0;
615 } else {
616 xer_ca = 1;
617 }
618 RETURN();
619 }
620 #endif
621
622 /* add extended */
623 void OPPROTO op_adde (void)
624 {
625 do_adde();
626 RETURN();
627 }
628
629 #if defined(TARGET_PPC64)
630 void OPPROTO op_adde_64 (void)
631 {
632 do_adde_64();
633 RETURN();
634 }
635 #endif
636
637 /* add to minus one extended */
638 void OPPROTO op_add_me (void)
639 {
640 T0 += xer_ca + (-1);
641 if (likely((uint32_t)T1 != 0))
642 xer_ca = 1;
643 else
644 xer_ca = 0;
645 RETURN();
646 }
647
648 #if defined(TARGET_PPC64)
649 void OPPROTO op_add_me_64 (void)
650 {
651 T0 += xer_ca + (-1);
652 if (likely((uint64_t)T1 != 0))
653 xer_ca = 1;
654 else
655 xer_ca = 0;
656 RETURN();
657 }
658 #endif
659
660 void OPPROTO op_addmeo (void)
661 {
662 do_addmeo();
663 RETURN();
664 }
665
666 void OPPROTO op_addmeo_64 (void)
667 {
668 do_addmeo();
669 RETURN();
670 }
671
672 /* add to zero extended */
673 void OPPROTO op_add_ze (void)
674 {
675 T0 += xer_ca;
676 RETURN();
677 }
678
679 /* divide word */
680 void OPPROTO op_divw (void)
681 {
682 if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == (int32_t)-1) ||
683 (int32_t)T1 == 0)) {
684 T0 = (int32_t)(UINT32_MAX * ((uint32_t)T0 >> 31));
685 } else {
686 T0 = (int32_t)T0 / (int32_t)T1;
687 }
688 RETURN();
689 }
690
691 #if defined(TARGET_PPC64)
692 void OPPROTO op_divd (void)
693 {
694 if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == (int64_t)-1LL) ||
695 (int64_t)T1 == 0)) {
696 T0 = (int64_t)(UINT64_MAX * ((uint64_t)T0 >> 63));
697 } else {
698 T0 = (int64_t)T0 / (int64_t)T1;
699 }
700 RETURN();
701 }
702 #endif
703
704 void OPPROTO op_divwo (void)
705 {
706 do_divwo();
707 RETURN();
708 }
709
710 #if defined(TARGET_PPC64)
711 void OPPROTO op_divdo (void)
712 {
713 do_divdo();
714 RETURN();
715 }
716 #endif
717
718 /* divide word unsigned */
719 void OPPROTO op_divwu (void)
720 {
721 if (unlikely(T1 == 0)) {
722 T0 = 0;
723 } else {
724 T0 = (uint32_t)T0 / (uint32_t)T1;
725 }
726 RETURN();
727 }
728
729 #if defined(TARGET_PPC64)
730 void OPPROTO op_divdu (void)
731 {
732 if (unlikely(T1 == 0)) {
733 T0 = 0;
734 } else {
735 T0 /= T1;
736 }
737 RETURN();
738 }
739 #endif
740
741 void OPPROTO op_divwuo (void)
742 {
743 do_divwuo();
744 RETURN();
745 }
746
747 #if defined(TARGET_PPC64)
748 void OPPROTO op_divduo (void)
749 {
750 do_divduo();
751 RETURN();
752 }
753 #endif
754
755 /* multiply high word */
756 void OPPROTO op_mulhw (void)
757 {
758 T0 = ((int64_t)((int32_t)T0) * (int64_t)((int32_t)T1)) >> 32;
759 RETURN();
760 }
761
762 #if defined(TARGET_PPC64)
763 void OPPROTO op_mulhd (void)
764 {
765 uint64_t tl, th;
766
767 muls64(&tl, &th, T0, T1);
768 T0 = th;
769 RETURN();
770 }
771 #endif
772
773 /* multiply high word unsigned */
774 void OPPROTO op_mulhwu (void)
775 {
776 T0 = ((uint64_t)(uint32_t)T0 * (uint64_t)(uint32_t)T1) >> 32;
777 RETURN();
778 }
779
780 #if defined(TARGET_PPC64)
781 void OPPROTO op_mulhdu (void)
782 {
783 uint64_t tl, th;
784
785 mulu64(&tl, &th, T0, T1);
786 T0 = th;
787 RETURN();
788 }
789 #endif
790
791 /* multiply low immediate */
792 void OPPROTO op_mulli (void)
793 {
794 T0 = ((int32_t)T0 * (int32_t)PARAM1);
795 RETURN();
796 }
797
798 /* multiply low word */
799 void OPPROTO op_mullw (void)
800 {
801 T0 = (int32_t)(T0 * T1);
802 RETURN();
803 }
804
805 #if defined(TARGET_PPC64)
806 void OPPROTO op_mulld (void)
807 {
808 T0 *= T1;
809 RETURN();
810 }
811 #endif
812
813 void OPPROTO op_mullwo (void)
814 {
815 do_mullwo();
816 RETURN();
817 }
818
819 #if defined(TARGET_PPC64)
820 void OPPROTO op_mulldo (void)
821 {
822 do_mulldo();
823 RETURN();
824 }
825 #endif
826
827 /* negate */
828 void OPPROTO op_neg (void)
829 {
830 if (likely(T0 != INT32_MIN)) {
831 T0 = -(int32_t)T0;
832 }
833 RETURN();
834 }
835
836 #if defined(TARGET_PPC64)
837 void OPPROTO op_neg_64 (void)
838 {
839 if (likely(T0 != INT64_MIN)) {
840 T0 = -(int64_t)T0;
841 }
842 RETURN();
843 }
844 #endif
845
846 void OPPROTO op_nego (void)
847 {
848 do_nego();
849 RETURN();
850 }
851
852 #if defined(TARGET_PPC64)
853 void OPPROTO op_nego_64 (void)
854 {
855 do_nego_64();
856 RETURN();
857 }
858 #endif
859
860 /* subtract from carrying */
861 void OPPROTO op_check_subfc (void)
862 {
863 if (likely((uint32_t)T0 > (uint32_t)T1)) {
864 xer_ca = 0;
865 } else {
866 xer_ca = 1;
867 }
868 RETURN();
869 }
870
871 #if defined(TARGET_PPC64)
872 void OPPROTO op_check_subfc_64 (void)
873 {
874 if (likely((uint64_t)T0 > (uint64_t)T1)) {
875 xer_ca = 0;
876 } else {
877 xer_ca = 1;
878 }
879 RETURN();
880 }
881 #endif
882
883 /* subtract from extended */
884 void OPPROTO op_subfe (void)
885 {
886 do_subfe();
887 RETURN();
888 }
889
890 #if defined(TARGET_PPC64)
891 void OPPROTO op_subfe_64 (void)
892 {
893 do_subfe_64();
894 RETURN();
895 }
896 #endif
897
898 /* subtract from immediate carrying */
899 void OPPROTO op_subfic (void)
900 {
901 T0 = (int32_t)PARAM1 + ~T0 + 1;
902 if ((uint32_t)T0 <= (uint32_t)PARAM1) {
903 xer_ca = 1;
904 } else {
905 xer_ca = 0;
906 }
907 RETURN();
908 }
909
910 #if defined(TARGET_PPC64)
911 void OPPROTO op_subfic_64 (void)
912 {
913 T0 = (int64_t)PARAM1 + ~T0 + 1;
914 if ((uint64_t)T0 <= (uint64_t)PARAM1) {
915 xer_ca = 1;
916 } else {
917 xer_ca = 0;
918 }
919 RETURN();
920 }
921 #endif
922
923 /* subtract from minus one extended */
924 void OPPROTO op_subfme (void)
925 {
926 T0 = ~T0 + xer_ca - 1;
927 if (likely((uint32_t)T0 != UINT32_MAX))
928 xer_ca = 1;
929 else
930 xer_ca = 0;
931 RETURN();
932 }
933
934 #if defined(TARGET_PPC64)
935 void OPPROTO op_subfme_64 (void)
936 {
937 T0 = ~T0 + xer_ca - 1;
938 if (likely((uint64_t)T0 != UINT64_MAX))
939 xer_ca = 1;
940 else
941 xer_ca = 0;
942 RETURN();
943 }
944 #endif
945
946 void OPPROTO op_subfmeo (void)
947 {
948 do_subfmeo();
949 RETURN();
950 }
951
952 #if defined(TARGET_PPC64)
953 void OPPROTO op_subfmeo_64 (void)
954 {
955 do_subfmeo_64();
956 RETURN();
957 }
958 #endif
959
960 /* subtract from zero extended */
961 void OPPROTO op_subfze (void)
962 {
963 T1 = ~T0;
964 T0 = T1 + xer_ca;
965 if ((uint32_t)T0 < (uint32_t)T1) {
966 xer_ca = 1;
967 } else {
968 xer_ca = 0;
969 }
970 RETURN();
971 }
972
973 #if defined(TARGET_PPC64)
974 void OPPROTO op_subfze_64 (void)
975 {
976 T1 = ~T0;
977 T0 = T1 + xer_ca;
978 if ((uint64_t)T0 < (uint64_t)T1) {
979 xer_ca = 1;
980 } else {
981 xer_ca = 0;
982 }
983 RETURN();
984 }
985 #endif
986
987 void OPPROTO op_subfzeo (void)
988 {
989 do_subfzeo();
990 RETURN();
991 }
992
993 #if defined(TARGET_PPC64)
994 void OPPROTO op_subfzeo_64 (void)
995 {
996 do_subfzeo_64();
997 RETURN();
998 }
999 #endif
1000
1001 /*** Integer comparison ***/
1002 /* compare */
1003 void OPPROTO op_cmp (void)
1004 {
1005 if ((int32_t)T0 < (int32_t)T1) {
1006 T0 = 0x08;
1007 } else if ((int32_t)T0 > (int32_t)T1) {
1008 T0 = 0x04;
1009 } else {
1010 T0 = 0x02;
1011 }
1012 T0 |= xer_so;
1013 RETURN();
1014 }
1015
1016 #if defined(TARGET_PPC64)
1017 void OPPROTO op_cmp_64 (void)
1018 {
1019 if ((int64_t)T0 < (int64_t)T1) {
1020 T0 = 0x08;
1021 } else if ((int64_t)T0 > (int64_t)T1) {
1022 T0 = 0x04;
1023 } else {
1024 T0 = 0x02;
1025 }
1026 T0 |= xer_so;
1027 RETURN();
1028 }
1029 #endif
1030
1031 /* compare immediate */
1032 void OPPROTO op_cmpi (void)
1033 {
1034 if ((int32_t)T0 < (int32_t)PARAM1) {
1035 T0 = 0x08;
1036 } else if ((int32_t)T0 > (int32_t)PARAM1) {
1037 T0 = 0x04;
1038 } else {
1039 T0 = 0x02;
1040 }
1041 T0 |= xer_so;
1042 RETURN();
1043 }
1044
1045 #if defined(TARGET_PPC64)
1046 void OPPROTO op_cmpi_64 (void)
1047 {
1048 if ((int64_t)T0 < (int64_t)((int32_t)PARAM1)) {
1049 T0 = 0x08;
1050 } else if ((int64_t)T0 > (int64_t)((int32_t)PARAM1)) {
1051 T0 = 0x04;
1052 } else {
1053 T0 = 0x02;
1054 }
1055 T0 |= xer_so;
1056 RETURN();
1057 }
1058 #endif
1059
1060 /* compare logical */
1061 void OPPROTO op_cmpl (void)
1062 {
1063 if ((uint32_t)T0 < (uint32_t)T1) {
1064 T0 = 0x08;
1065 } else if ((uint32_t)T0 > (uint32_t)T1) {
1066 T0 = 0x04;
1067 } else {
1068 T0 = 0x02;
1069 }
1070 T0 |= xer_so;
1071 RETURN();
1072 }
1073
1074 #if defined(TARGET_PPC64)
1075 void OPPROTO op_cmpl_64 (void)
1076 {
1077 if ((uint64_t)T0 < (uint64_t)T1) {
1078 T0 = 0x08;
1079 } else if ((uint64_t)T0 > (uint64_t)T1) {
1080 T0 = 0x04;
1081 } else {
1082 T0 = 0x02;
1083 }
1084 T0 |= xer_so;
1085 RETURN();
1086 }
1087 #endif
1088
1089 /* compare logical immediate */
1090 void OPPROTO op_cmpli (void)
1091 {
1092 if ((uint32_t)T0 < (uint32_t)PARAM1) {
1093 T0 = 0x08;
1094 } else if ((uint32_t)T0 > (uint32_t)PARAM1) {
1095 T0 = 0x04;
1096 } else {
1097 T0 = 0x02;
1098 }
1099 T0 |= xer_so;
1100 RETURN();
1101 }
1102
1103 #if defined(TARGET_PPC64)
1104 void OPPROTO op_cmpli_64 (void)
1105 {
1106 if ((uint64_t)T0 < (uint64_t)PARAM1) {
1107 T0 = 0x08;
1108 } else if ((uint64_t)T0 > (uint64_t)PARAM1) {
1109 T0 = 0x04;
1110 } else {
1111 T0 = 0x02;
1112 }
1113 T0 |= xer_so;
1114 RETURN();
1115 }
1116 #endif
1117
1118 void OPPROTO op_isel (void)
1119 {
1120 if (T0)
1121 T0 = T1;
1122 else
1123 T0 = T2;
1124 RETURN();
1125 }
1126
1127 void OPPROTO op_popcntb (void)
1128 {
1129 do_popcntb();
1130 RETURN();
1131 }
1132
1133 #if defined(TARGET_PPC64)
1134 void OPPROTO op_popcntb_64 (void)
1135 {
1136 do_popcntb_64();
1137 RETURN();
1138 }
1139 #endif
1140
1141 /*** Integer logical ***/
1142 /* and */
1143 void OPPROTO op_and (void)
1144 {
1145 T0 &= T1;
1146 RETURN();
1147 }
1148
1149 /* andc */
1150 void OPPROTO op_andc (void)
1151 {
1152 T0 &= ~T1;
1153 RETURN();
1154 }
1155
1156 /* count leading zero */
1157 void OPPROTO op_cntlzw (void)
1158 {
1159 do_cntlzw();
1160 RETURN();
1161 }
1162
1163 #if defined(TARGET_PPC64)
1164 void OPPROTO op_cntlzd (void)
1165 {
1166 do_cntlzd();
1167 RETURN();
1168 }
1169 #endif
1170
1171 /* eqv */
1172 void OPPROTO op_eqv (void)
1173 {
1174 T0 = ~(T0 ^ T1);
1175 RETURN();
1176 }
1177
1178 /* extend sign byte */
1179 void OPPROTO op_extsb (void)
1180 {
1181 #if defined (TARGET_PPC64)
1182 T0 = (int64_t)((int8_t)T0);
1183 #else
1184 T0 = (int32_t)((int8_t)T0);
1185 #endif
1186 RETURN();
1187 }
1188
1189 /* extend sign half word */
1190 void OPPROTO op_extsh (void)
1191 {
1192 #if defined (TARGET_PPC64)
1193 T0 = (int64_t)((int16_t)T0);
1194 #else
1195 T0 = (int32_t)((int16_t)T0);
1196 #endif
1197 RETURN();
1198 }
1199
1200 #if defined (TARGET_PPC64)
1201 void OPPROTO op_extsw (void)
1202 {
1203 T0 = (int64_t)((int32_t)T0);
1204 RETURN();
1205 }
1206 #endif
1207
1208 /* nand */
1209 void OPPROTO op_nand (void)
1210 {
1211 T0 = ~(T0 & T1);
1212 RETURN();
1213 }
1214
1215 /* nor */
1216 void OPPROTO op_nor (void)
1217 {
1218 T0 = ~(T0 | T1);
1219 RETURN();
1220 }
1221
1222 /* or */
1223 void OPPROTO op_or (void)
1224 {
1225 T0 |= T1;
1226 RETURN();
1227 }
1228
1229 /* orc */
1230 void OPPROTO op_orc (void)
1231 {
1232 T0 |= ~T1;
1233 RETURN();
1234 }
1235
1236 /* ori */
1237 void OPPROTO op_ori (void)
1238 {
1239 T0 |= (uint32_t)PARAM1;
1240 RETURN();
1241 }
1242
1243 /* xor */
1244 void OPPROTO op_xor (void)
1245 {
1246 T0 ^= T1;
1247 RETURN();
1248 }
1249
1250 /* xori */
1251 void OPPROTO op_xori (void)
1252 {
1253 T0 ^= (uint32_t)PARAM1;
1254 RETURN();
1255 }
1256
1257 /*** Integer rotate ***/
1258 void OPPROTO op_rotl32_T0_T1 (void)
1259 {
1260 T0 = rotl32(T0, T1 & 0x1F);
1261 RETURN();
1262 }
1263
1264 void OPPROTO op_rotli32_T0 (void)
1265 {
1266 T0 = rotl32(T0, PARAM1);
1267 RETURN();
1268 }
1269
1270 #if defined(TARGET_PPC64)
1271 void OPPROTO op_rotl64_T0_T1 (void)
1272 {
1273 T0 = rotl64(T0, T1 & 0x3F);
1274 RETURN();
1275 }
1276
1277 void OPPROTO op_rotli64_T0 (void)
1278 {
1279 T0 = rotl64(T0, PARAM1);
1280 RETURN();
1281 }
1282 #endif
1283
1284 /*** Integer shift ***/
1285 /* shift left word */
1286 void OPPROTO op_slw (void)
1287 {
1288 if (T1 & 0x20) {
1289 T0 = 0;
1290 } else {
1291 T0 = (uint32_t)(T0 << T1);
1292 }
1293 RETURN();
1294 }
1295
1296 #if defined(TARGET_PPC64)
1297 void OPPROTO op_sld (void)
1298 {
1299 if (T1 & 0x40) {
1300 T0 = 0;
1301 } else {
1302 T0 = T0 << T1;
1303 }
1304 RETURN();
1305 }
1306 #endif
1307
1308 /* shift right algebraic word */
1309 void OPPROTO op_sraw (void)
1310 {
1311 do_sraw();
1312 RETURN();
1313 }
1314
1315 #if defined(TARGET_PPC64)
1316 void OPPROTO op_srad (void)
1317 {
1318 do_srad();
1319 RETURN();
1320 }
1321 #endif
1322
1323 /* shift right algebraic word immediate */
1324 void OPPROTO op_srawi (void)
1325 {
1326 uint32_t mask = (uint32_t)PARAM2;
1327
1328 T0 = (int32_t)T0 >> PARAM1;
1329 if ((int32_t)T1 < 0 && (T1 & mask) != 0) {
1330 xer_ca = 1;
1331 } else {
1332 xer_ca = 0;
1333 }
1334 RETURN();
1335 }
1336
1337 #if defined(TARGET_PPC64)
1338 void OPPROTO op_sradi (void)
1339 {
1340 uint64_t mask = ((uint64_t)PARAM2 << 32) | (uint64_t)PARAM3;
1341
1342 T0 = (int64_t)T0 >> PARAM1;
1343 if ((int64_t)T1 < 0 && ((uint64_t)T1 & mask) != 0) {
1344 xer_ca = 1;
1345 } else {
1346 xer_ca = 0;
1347 }
1348 RETURN();
1349 }
1350 #endif
1351
1352 /* shift right word */
1353 void OPPROTO op_srw (void)
1354 {
1355 if (T1 & 0x20) {
1356 T0 = 0;
1357 } else {
1358 T0 = (uint32_t)T0 >> T1;
1359 }
1360 RETURN();
1361 }
1362
1363 #if defined(TARGET_PPC64)
1364 void OPPROTO op_srd (void)
1365 {
1366 if (T1 & 0x40) {
1367 T0 = 0;
1368 } else {
1369 T0 = (uint64_t)T0 >> T1;
1370 }
1371 RETURN();
1372 }
1373 #endif
1374
1375 void OPPROTO op_sl_T0_T1 (void)
1376 {
1377 T0 = T0 << T1;
1378 RETURN();
1379 }
1380
1381 void OPPROTO op_sli_T0 (void)
1382 {
1383 T0 = T0 << PARAM1;
1384 RETURN();
1385 }
1386
1387 void OPPROTO op_sli_T1 (void)
1388 {
1389 T1 = T1 << PARAM1;
1390 RETURN();
1391 }
1392
1393 void OPPROTO op_srl_T0_T1 (void)
1394 {
1395 T0 = (uint32_t)T0 >> T1;
1396 RETURN();
1397 }
1398
1399 #if defined(TARGET_PPC64)
1400 void OPPROTO op_srl_T0_T1_64 (void)
1401 {
1402 T0 = (uint32_t)T0 >> T1;
1403 RETURN();
1404 }
1405 #endif
1406
1407 void OPPROTO op_srli_T0 (void)
1408 {
1409 T0 = (uint32_t)T0 >> PARAM1;
1410 RETURN();
1411 }
1412
1413 #if defined(TARGET_PPC64)
1414 void OPPROTO op_srli_T0_64 (void)
1415 {
1416 T0 = (uint64_t)T0 >> PARAM1;
1417 RETURN();
1418 }
1419 #endif
1420
1421 void OPPROTO op_srli_T1 (void)
1422 {
1423 T1 = (uint32_t)T1 >> PARAM1;
1424 RETURN();
1425 }
1426
1427 #if defined(TARGET_PPC64)
1428 void OPPROTO op_srli_T1_64 (void)
1429 {
1430 T1 = (uint64_t)T1 >> PARAM1;
1431 RETURN();
1432 }
1433 #endif
1434
1435 /*** Floating-Point arithmetic ***/
1436 /* fadd - fadd. */
1437 void OPPROTO op_fadd (void)
1438 {
1439 #if USE_PRECISE_EMULATION
1440 do_fadd();
1441 #else
1442 FT0 = float64_add(FT0, FT1, &env->fp_status);
1443 #endif
1444 RETURN();
1445 }
1446
1447 /* fsub - fsub. */
1448 void OPPROTO op_fsub (void)
1449 {
1450 #if USE_PRECISE_EMULATION
1451 do_fsub();
1452 #else
1453 FT0 = float64_sub(FT0, FT1, &env->fp_status);
1454 #endif
1455 RETURN();
1456 }
1457
1458 /* fmul - fmul. */
1459 void OPPROTO op_fmul (void)
1460 {
1461 #if USE_PRECISE_EMULATION
1462 do_fmul();
1463 #else
1464 FT0 = float64_mul(FT0, FT1, &env->fp_status);
1465 #endif
1466 RETURN();
1467 }
1468
1469 /* fdiv - fdiv. */
1470 void OPPROTO op_fdiv (void)
1471 {
1472 #if USE_PRECISE_EMULATION
1473 do_fdiv();
1474 #else
1475 FT0 = float64_div(FT0, FT1, &env->fp_status);
1476 #endif
1477 RETURN();
1478 }
1479
1480 /* fsqrt - fsqrt. */
1481 void OPPROTO op_fsqrt (void)
1482 {
1483 do_fsqrt();
1484 RETURN();
1485 }
1486
1487 /* fre - fre. */
1488 void OPPROTO op_fre (void)
1489 {
1490 do_fre();
1491 RETURN();
1492 }
1493
1494 /* fres - fres. */
1495 void OPPROTO op_fres (void)
1496 {
1497 do_fres();
1498 RETURN();
1499 }
1500
1501 /* frsqrte - frsqrte. */
1502 void OPPROTO op_frsqrte (void)
1503 {
1504 do_frsqrte();
1505 RETURN();
1506 }
1507
1508 /* fsel - fsel. */
1509 void OPPROTO op_fsel (void)
1510 {
1511 do_fsel();
1512 RETURN();
1513 }
1514
1515 /*** Floating-Point multiply-and-add ***/
1516 /* fmadd - fmadd. */
1517 void OPPROTO op_fmadd (void)
1518 {
1519 #if USE_PRECISE_EMULATION
1520 do_fmadd();
1521 #else
1522 FT0 = float64_mul(FT0, FT1, &env->fp_status);
1523 FT0 = float64_add(FT0, FT2, &env->fp_status);
1524 #endif
1525 RETURN();
1526 }
1527
1528 /* fmsub - fmsub. */
1529 void OPPROTO op_fmsub (void)
1530 {
1531 #if USE_PRECISE_EMULATION
1532 do_fmsub();
1533 #else
1534 FT0 = float64_mul(FT0, FT1, &env->fp_status);
1535 FT0 = float64_sub(FT0, FT2, &env->fp_status);
1536 #endif
1537 RETURN();
1538 }
1539
1540 /* fnmadd - fnmadd. - fnmadds - fnmadds. */
1541 void OPPROTO op_fnmadd (void)
1542 {
1543 do_fnmadd();
1544 RETURN();
1545 }
1546
1547 /* fnmsub - fnmsub. */
1548 void OPPROTO op_fnmsub (void)
1549 {
1550 do_fnmsub();
1551 RETURN();
1552 }
1553
1554 /*** Floating-Point round & convert ***/
1555 /* frsp - frsp. */
1556 void OPPROTO op_frsp (void)
1557 {
1558 #if USE_PRECISE_EMULATION
1559 do_frsp();
1560 #else
1561 FT0 = float64_to_float32(FT0, &env->fp_status);
1562 #endif
1563 RETURN();
1564 }
1565
1566 /* fctiw - fctiw. */
1567 void OPPROTO op_fctiw (void)
1568 {
1569 do_fctiw();
1570 RETURN();
1571 }
1572
1573 /* fctiwz - fctiwz. */
1574 void OPPROTO op_fctiwz (void)
1575 {
1576 do_fctiwz();
1577 RETURN();
1578 }
1579
1580 #if defined(TARGET_PPC64)
1581 /* fcfid - fcfid. */
1582 void OPPROTO op_fcfid (void)
1583 {
1584 do_fcfid();
1585 RETURN();
1586 }
1587
1588 /* fctid - fctid. */
1589 void OPPROTO op_fctid (void)
1590 {
1591 do_fctid();
1592 RETURN();
1593 }
1594
1595 /* fctidz - fctidz. */
1596 void OPPROTO op_fctidz (void)
1597 {
1598 do_fctidz();
1599 RETURN();
1600 }
1601 #endif
1602
1603 void OPPROTO op_frin (void)
1604 {
1605 do_frin();
1606 RETURN();
1607 }
1608
1609 void OPPROTO op_friz (void)
1610 {
1611 do_friz();
1612 RETURN();
1613 }
1614
1615 void OPPROTO op_frip (void)
1616 {
1617 do_frip();
1618 RETURN();
1619 }
1620
1621 void OPPROTO op_frim (void)
1622 {
1623 do_frim();
1624 RETURN();
1625 }
1626
1627 /*** Floating-Point compare ***/
1628 /* fcmpu */
1629 void OPPROTO op_fcmpu (void)
1630 {
1631 do_fcmpu();
1632 RETURN();
1633 }
1634
1635 /* fcmpo */
1636 void OPPROTO op_fcmpo (void)
1637 {
1638 do_fcmpo();
1639 RETURN();
1640 }
1641
1642 /*** Floating-point move ***/
1643 /* fabs */
1644 void OPPROTO op_fabs (void)
1645 {
1646 FT0 = float64_abs(FT0);
1647 RETURN();
1648 }
1649
1650 /* fnabs */
1651 void OPPROTO op_fnabs (void)
1652 {
1653 FT0 = float64_abs(FT0);
1654 FT0 = float64_chs(FT0);
1655 RETURN();
1656 }
1657
1658 /* fneg */
1659 void OPPROTO op_fneg (void)
1660 {
1661 FT0 = float64_chs(FT0);
1662 RETURN();
1663 }
1664
1665 /* Load and store */
1666 #define MEMSUFFIX _raw
1667 #include "op_helper.h"
1668 #include "op_mem.h"
1669 #if !defined(CONFIG_USER_ONLY)
1670 #define MEMSUFFIX _user
1671 #include "op_helper.h"
1672 #include "op_mem.h"
1673 #define MEMSUFFIX _kernel
1674 #include "op_helper.h"
1675 #include "op_mem.h"
1676 #define MEMSUFFIX _hypv
1677 #include "op_helper.h"
1678 #include "op_mem.h"
1679 #endif
1680
1681 /* Special op to check and maybe clear reservation */
1682 void OPPROTO op_check_reservation (void)
1683 {
1684 if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003))
1685 env->reserve = (target_ulong)-1ULL;
1686 RETURN();
1687 }
1688
1689 #if defined(TARGET_PPC64)
1690 void OPPROTO op_check_reservation_64 (void)
1691 {
1692 if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003))
1693 env->reserve = (target_ulong)-1ULL;
1694 RETURN();
1695 }
1696 #endif
1697
1698 void OPPROTO op_wait (void)
1699 {
1700 env->halted = 1;
1701 RETURN();
1702 }
1703
1704 /* Return from interrupt */
1705 #if !defined(CONFIG_USER_ONLY)
1706 void OPPROTO op_rfi (void)
1707 {
1708 do_rfi();
1709 RETURN();
1710 }
1711
1712 #if defined(TARGET_PPC64)
1713 void OPPROTO op_rfid (void)
1714 {
1715 do_rfid();
1716 RETURN();
1717 }
1718
1719 void OPPROTO op_hrfid (void)
1720 {
1721 do_hrfid();
1722 RETURN();
1723 }
1724 #endif
1725
1726 /* Exception vectors */
1727 void OPPROTO op_store_excp_prefix (void)
1728 {
1729 T0 &= env->ivpr_mask;
1730 env->excp_prefix = T0;
1731 RETURN();
1732 }
1733
1734 void OPPROTO op_store_excp_vector (void)
1735 {
1736 T0 &= env->ivor_mask;
1737 env->excp_vectors[PARAM1] = T0;
1738 RETURN();
1739 }
1740 #endif
1741
1742 /* Trap word */
1743 void OPPROTO op_tw (void)
1744 {
1745 do_tw(PARAM1);
1746 RETURN();
1747 }
1748
1749 #if defined(TARGET_PPC64)
1750 void OPPROTO op_td (void)
1751 {
1752 do_td(PARAM1);
1753 RETURN();
1754 }
1755 #endif
1756
1757 #if !defined(CONFIG_USER_ONLY)
1758 /* tlbia */
1759 void OPPROTO op_tlbia (void)
1760 {
1761 ppc_tlb_invalidate_all(env);
1762 RETURN();
1763 }
1764
1765 /* tlbie */
1766 void OPPROTO op_tlbie (void)
1767 {
1768 ppc_tlb_invalidate_one(env, (uint32_t)T0);
1769 RETURN();
1770 }
1771
1772 #if defined(TARGET_PPC64)
1773 void OPPROTO op_tlbie_64 (void)
1774 {
1775 ppc_tlb_invalidate_one(env, T0);
1776 RETURN();
1777 }
1778 #endif
1779
1780 #if defined(TARGET_PPC64)
1781 void OPPROTO op_slbia (void)
1782 {
1783 ppc_slb_invalidate_all(env);
1784 RETURN();
1785 }
1786
1787 void OPPROTO op_slbie (void)
1788 {
1789 ppc_slb_invalidate_one(env, (uint32_t)T0);
1790 RETURN();
1791 }
1792
1793 void OPPROTO op_slbie_64 (void)
1794 {
1795 ppc_slb_invalidate_one(env, T0);
1796 RETURN();
1797 }
1798 #endif
1799 #endif
1800
1801 #if !defined(CONFIG_USER_ONLY)
1802 /* PowerPC 602/603/755 software TLB load instructions */
1803 void OPPROTO op_6xx_tlbld (void)
1804 {
1805 do_load_6xx_tlb(0);
1806 RETURN();
1807 }
1808
1809 void OPPROTO op_6xx_tlbli (void)
1810 {
1811 do_load_6xx_tlb(1);
1812 RETURN();
1813 }
1814
1815 /* PowerPC 74xx software TLB load instructions */
1816 void OPPROTO op_74xx_tlbld (void)
1817 {
1818 do_load_74xx_tlb(0);
1819 RETURN();
1820 }
1821
1822 void OPPROTO op_74xx_tlbli (void)
1823 {
1824 do_load_74xx_tlb(1);
1825 RETURN();
1826 }
1827 #endif
1828
1829 /* 601 specific */
1830 void OPPROTO op_load_601_rtcl (void)
1831 {
1832 T0 = cpu_ppc601_load_rtcl(env);
1833 RETURN();
1834 }
1835
1836 void OPPROTO op_load_601_rtcu (void)
1837 {
1838 T0 = cpu_ppc601_load_rtcu(env);
1839 RETURN();
1840 }
1841
1842 #if !defined(CONFIG_USER_ONLY)
1843 void OPPROTO op_store_601_rtcl (void)
1844 {
1845 cpu_ppc601_store_rtcl(env, T0);
1846 RETURN();
1847 }
1848
1849 void OPPROTO op_store_601_rtcu (void)
1850 {
1851 cpu_ppc601_store_rtcu(env, T0);
1852 RETURN();
1853 }
1854
1855 void OPPROTO op_store_hid0_601 (void)
1856 {
1857 do_store_hid0_601();
1858 RETURN();
1859 }
1860
1861 void OPPROTO op_load_601_bat (void)
1862 {
1863 T0 = env->IBAT[PARAM1][PARAM2];
1864 RETURN();
1865 }
1866
1867 void OPPROTO op_store_601_batl (void)
1868 {
1869 do_store_ibatl_601(env, PARAM1, T0);
1870 RETURN();
1871 }
1872
1873 void OPPROTO op_store_601_batu (void)
1874 {
1875 do_store_ibatu_601(env, PARAM1, T0);
1876 RETURN();
1877 }
1878 #endif /* !defined(CONFIG_USER_ONLY) */
1879
1880 /* PowerPC 601 specific instructions (POWER bridge) */
1881 /* XXX: those micro-ops need tests ! */
1882 void OPPROTO op_POWER_abs (void)
1883 {
1884 if ((int32_t)T0 == INT32_MIN)
1885 T0 = INT32_MAX;
1886 else if ((int32_t)T0 < 0)
1887 T0 = -T0;
1888 RETURN();
1889 }
1890
1891 void OPPROTO op_POWER_abso (void)
1892 {
1893 do_POWER_abso();
1894 RETURN();
1895 }
1896
1897 void OPPROTO op_POWER_clcs (void)
1898 {
1899 do_POWER_clcs();
1900 RETURN();
1901 }
1902
1903 void OPPROTO op_POWER_div (void)
1904 {
1905 do_POWER_div();
1906 RETURN();
1907 }
1908
1909 void OPPROTO op_POWER_divo (void)
1910 {
1911 do_POWER_divo();
1912 RETURN();
1913 }
1914
1915 void OPPROTO op_POWER_divs (void)
1916 {
1917 do_POWER_divs();
1918 RETURN();
1919 }
1920
1921 void OPPROTO op_POWER_divso (void)
1922 {
1923 do_POWER_divso();
1924 RETURN();
1925 }
1926
1927 void OPPROTO op_POWER_doz (void)
1928 {
1929 if ((int32_t)T1 > (int32_t)T0)
1930 T0 = T1 - T0;
1931 else
1932 T0 = 0;
1933 RETURN();
1934 }
1935
1936 void OPPROTO op_POWER_dozo (void)
1937 {
1938 do_POWER_dozo();
1939 RETURN();
1940 }
1941
1942 void OPPROTO op_load_xer_cmp (void)
1943 {
1944 T2 = xer_cmp;
1945 RETURN();
1946 }
1947
1948 void OPPROTO op_POWER_maskg (void)
1949 {
1950 do_POWER_maskg();
1951 RETURN();
1952 }
1953
1954 void OPPROTO op_POWER_maskir (void)
1955 {
1956 T0 = (T0 & ~T2) | (T1 & T2);
1957 RETURN();
1958 }
1959
1960 void OPPROTO op_POWER_mul (void)
1961 {
1962 uint64_t tmp;
1963
1964 tmp = (uint64_t)T0 * (uint64_t)T1;
1965 env->spr[SPR_MQ] = tmp >> 32;
1966 T0 = tmp;
1967 RETURN();
1968 }
1969
1970 void OPPROTO op_POWER_mulo (void)
1971 {
1972 do_POWER_mulo();
1973 RETURN();
1974 }
1975
1976 void OPPROTO op_POWER_nabs (void)
1977 {
1978 if (T0 > 0)
1979 T0 = -T0;
1980 RETURN();
1981 }
1982
1983 void OPPROTO op_POWER_nabso (void)
1984 {
1985 /* nabs never overflows */
1986 if (T0 > 0)
1987 T0 = -T0;
1988 xer_ov = 0;
1989 RETURN();
1990 }
1991
1992 /* XXX: factorise POWER rotates... */
1993 void OPPROTO op_POWER_rlmi (void)
1994 {
1995 T0 = rotl32(T0, T2) & PARAM1;
1996 T0 |= T1 & (uint32_t)PARAM2;
1997 RETURN();
1998 }
1999
2000 void OPPROTO op_POWER_rrib (void)
2001 {
2002 T2 &= 0x1FUL;
2003 T0 = rotl32(T0 & INT32_MIN, T2);
2004 T0 |= T1 & ~rotl32(INT32_MIN, T2);
2005 RETURN();
2006 }
2007
2008 void OPPROTO op_POWER_sle (void)
2009 {
2010 T1 &= 0x1FUL;
2011 env->spr[SPR_MQ] = rotl32(T0, T1);
2012 T0 = T0 << T1;
2013 RETURN();
2014 }
2015
2016 void OPPROTO op_POWER_sleq (void)
2017 {
2018 uint32_t tmp = env->spr[SPR_MQ];
2019
2020 T1 &= 0x1FUL;
2021 env->spr[SPR_MQ] = rotl32(T0, T1);
2022 T0 = T0 << T1;
2023 T0 |= tmp >> (32 - T1);
2024 RETURN();
2025 }
2026
2027 void OPPROTO op_POWER_sllq (void)
2028 {
2029 uint32_t msk = UINT32_MAX;
2030
2031 msk = msk << (T1 & 0x1FUL);
2032 if (T1 & 0x20UL)
2033 msk = ~msk;
2034 T1 &= 0x1FUL;
2035 T0 = (T0 << T1) & msk;
2036 T0 |= env->spr[SPR_MQ] & ~msk;
2037 RETURN();
2038 }
2039
2040 void OPPROTO op_POWER_slq (void)
2041 {
2042 uint32_t msk = UINT32_MAX, tmp;
2043
2044 msk = msk << (T1 & 0x1FUL);
2045 if (T1 & 0x20UL)
2046 msk = ~msk;
2047 T1 &= 0x1FUL;
2048 tmp = rotl32(T0, T1);
2049 T0 = tmp & msk;
2050 env->spr[SPR_MQ] = tmp;
2051 RETURN();
2052 }
2053
2054 void OPPROTO op_POWER_sraq (void)
2055 {
2056 env->spr[SPR_MQ] = rotl32(T0, 32 - (T1 & 0x1FUL));
2057 if (T1 & 0x20UL)
2058 T0 = UINT32_MAX;
2059 else
2060 T0 = (int32_t)T0 >> T1;
2061 RETURN();
2062 }
2063
2064 void OPPROTO op_POWER_sre (void)
2065 {
2066 T1 &= 0x1FUL;
2067 env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
2068 T0 = (int32_t)T0 >> T1;
2069 RETURN();
2070 }
2071
2072 void OPPROTO op_POWER_srea (void)
2073 {
2074 T1 &= 0x1FUL;
2075 env->spr[SPR_MQ] = T0 >> T1;
2076 T0 = (int32_t)T0 >> T1;
2077 RETURN();
2078 }
2079
2080 void OPPROTO op_POWER_sreq (void)
2081 {
2082 uint32_t tmp;
2083 int32_t msk;
2084
2085 T1 &= 0x1FUL;
2086 msk = INT32_MIN >> T1;
2087 tmp = env->spr[SPR_MQ];
2088 env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
2089 T0 = T0 >> T1;
2090 T0 |= tmp & msk;
2091 RETURN();
2092 }
2093
2094 void OPPROTO op_POWER_srlq (void)
2095 {
2096 uint32_t tmp;
2097 int32_t msk;
2098
2099 msk = INT32_MIN >> (T1 & 0x1FUL);
2100 if (T1 & 0x20UL)
2101 msk = ~msk;
2102 T1 &= 0x1FUL;
2103 tmp = env->spr[SPR_MQ];
2104 env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
2105 T0 = T0 >> T1;
2106 T0 &= msk;
2107 T0 |= tmp & ~msk;
2108 RETURN();
2109 }
2110
2111 void OPPROTO op_POWER_srq (void)
2112 {
2113 T1 &= 0x1FUL;
2114 env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
2115 T0 = T0 >> T1;
2116 RETURN();
2117 }
2118
2119 /* POWER instructions not implemented in PowerPC 601 */
2120 #if !defined(CONFIG_USER_ONLY)
2121 void OPPROTO op_POWER_mfsri (void)
2122 {
2123 T1 = T0 >> 28;
2124 T0 = env->sr[T1];
2125 RETURN();
2126 }
2127
2128 void OPPROTO op_POWER_rac (void)
2129 {
2130 do_POWER_rac();
2131 RETURN();
2132 }
2133
2134 void OPPROTO op_POWER_rfsvc (void)
2135 {
2136 do_POWER_rfsvc();
2137 RETURN();
2138 }
2139 #endif
2140
2141 /* PowerPC 602 specific instruction */
2142 #if !defined(CONFIG_USER_ONLY)
2143 void OPPROTO op_602_mfrom (void)
2144 {
2145 do_op_602_mfrom();
2146 RETURN();
2147 }
2148 #endif
2149
2150 /* PowerPC 4xx specific micro-ops */
2151 void OPPROTO op_405_add_T0_T2 (void)
2152 {
2153 T0 = (int32_t)T0 + (int32_t)T2;
2154 RETURN();
2155 }
2156
2157 void OPPROTO op_405_mulchw (void)
2158 {
2159 T0 = ((int16_t)T0) * ((int16_t)(T1 >> 16));
2160 RETURN();
2161 }
2162
2163 void OPPROTO op_405_mulchwu (void)
2164 {
2165 T0 = ((uint16_t)T0) * ((uint16_t)(T1 >> 16));
2166 RETURN();
2167 }
2168
2169 void OPPROTO op_405_mulhhw (void)
2170 {
2171 T0 = ((int16_t)(T0 >> 16)) * ((int16_t)(T1 >> 16));
2172 RETURN();
2173 }
2174
2175 void OPPROTO op_405_mulhhwu (void)
2176 {
2177 T0 = ((uint16_t)(T0 >> 16)) * ((uint16_t)(T1 >> 16));
2178 RETURN();
2179 }
2180
2181 void OPPROTO op_405_mullhw (void)
2182 {
2183 T0 = ((int16_t)T0) * ((int16_t)T1);
2184 RETURN();
2185 }
2186
2187 void OPPROTO op_405_mullhwu (void)
2188 {
2189 T0 = ((uint16_t)T0) * ((uint16_t)T1);
2190 RETURN();
2191 }
2192
2193 void OPPROTO op_405_check_sat (void)
2194 {
2195 do_405_check_sat();
2196 RETURN();
2197 }
2198
2199 void OPPROTO op_405_check_ovu (void)
2200 {
2201 if (likely(T0 >= T2)) {
2202 xer_ov = 0;
2203 } else {
2204 xer_ov = 1;
2205 xer_so = 1;
2206 }
2207 RETURN();
2208 }
2209
2210 void OPPROTO op_405_check_satu (void)
2211 {
2212 if (unlikely(T0 < T2)) {
2213 /* Saturate result */
2214 T0 = UINT32_MAX;
2215 }
2216 RETURN();
2217 }
2218
2219 void OPPROTO op_load_dcr (void)
2220 {
2221 do_load_dcr();
2222 RETURN();
2223 }
2224
2225 void OPPROTO op_store_dcr (void)
2226 {
2227 do_store_dcr();
2228 RETURN();
2229 }
2230
2231 #if !defined(CONFIG_USER_ONLY)
2232 /* Return from critical interrupt :
2233 * same as rfi, except nip & MSR are loaded from SRR2/3 instead of SRR0/1
2234 */
2235 void OPPROTO op_40x_rfci (void)
2236 {
2237 do_40x_rfci();
2238 RETURN();
2239 }
2240
2241 void OPPROTO op_rfci (void)
2242 {
2243 do_rfci();
2244 RETURN();
2245 }
2246
2247 void OPPROTO op_rfdi (void)
2248 {
2249 do_rfdi();
2250 RETURN();
2251 }
2252
2253 void OPPROTO op_rfmci (void)
2254 {
2255 do_rfmci();
2256 RETURN();
2257 }
2258
2259 void OPPROTO op_wrte (void)
2260 {
2261 /* We don't call do_store_msr here as we won't trigger
2262 * any special case nor change hflags
2263 */
2264 T0 &= 1 << MSR_EE;
2265 env->msr &= ~(1 << MSR_EE);
2266 env->msr |= T0;
2267 RETURN();
2268 }
2269
2270 void OPPROTO op_440_tlbre (void)
2271 {
2272 do_440_tlbre(PARAM1);
2273 RETURN();
2274 }
2275
2276 void OPPROTO op_440_tlbsx (void)
2277 {
2278 T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF);
2279 RETURN();
2280 }
2281
2282 void OPPROTO op_4xx_tlbsx_check (void)
2283 {
2284 int tmp;
2285
2286 tmp = xer_so;
2287 if ((int)T0 != -1)
2288 tmp |= 0x02;
2289 env->crf[0] = tmp;
2290 RETURN();
2291 }
2292
2293 void OPPROTO op_440_tlbwe (void)
2294 {
2295 do_440_tlbwe(PARAM1);
2296 RETURN();
2297 }
2298
2299 void OPPROTO op_4xx_tlbre_lo (void)
2300 {
2301 do_4xx_tlbre_lo();
2302 RETURN();
2303 }
2304
2305 void OPPROTO op_4xx_tlbre_hi (void)
2306 {
2307 do_4xx_tlbre_hi();
2308 RETURN();
2309 }
2310
2311 void OPPROTO op_4xx_tlbsx (void)
2312 {
2313 T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]);
2314 RETURN();
2315 }
2316
2317 void OPPROTO op_4xx_tlbwe_lo (void)
2318 {
2319 do_4xx_tlbwe_lo();
2320 RETURN();
2321 }
2322
2323 void OPPROTO op_4xx_tlbwe_hi (void)
2324 {
2325 do_4xx_tlbwe_hi();
2326 RETURN();
2327 }
2328 #endif
2329
2330 /* SPR micro-ops */
2331 /* 440 specific */
2332 void OPPROTO op_440_dlmzb (void)
2333 {
2334 do_440_dlmzb();
2335 RETURN();
2336 }
2337
2338 void OPPROTO op_440_dlmzb_update_Rc (void)
2339 {
2340 if (T0 == 8)
2341 T0 = 0x2;
2342 else if (T0 < 4)
2343 T0 = 0x4;
2344 else
2345 T0 = 0x8;
2346 RETURN();
2347 }
2348
2349 #if !defined(CONFIG_USER_ONLY)
2350 void OPPROTO op_store_pir (void)
2351 {
2352 env->spr[SPR_PIR] = T0 & 0x0000000FUL;
2353 RETURN();
2354 }
2355
2356 void OPPROTO op_load_403_pb (void)
2357 {
2358 do_load_403_pb(PARAM1);
2359 RETURN();
2360 }
2361
2362 void OPPROTO op_store_403_pb (void)
2363 {
2364 do_store_403_pb(PARAM1);
2365 RETURN();
2366 }
2367
2368 void OPPROTO op_load_40x_pit (void)
2369 {
2370 T0 = load_40x_pit(env);
2371 RETURN();
2372 }
2373
2374 void OPPROTO op_store_40x_pit (void)
2375 {
2376 store_40x_pit(env, T0);
2377 RETURN();
2378 }
2379
2380 void OPPROTO op_store_40x_dbcr0 (void)
2381 {
2382 store_40x_dbcr0(env, T0);
2383 RETURN();
2384 }
2385
2386 void OPPROTO op_store_40x_sler (void)
2387 {
2388 store_40x_sler(env, T0);
2389 RETURN();
2390 }
2391
2392 void OPPROTO op_store_booke_tcr (void)
2393 {
2394 store_booke_tcr(env, T0);
2395 RETURN();
2396 }
2397
2398 void OPPROTO op_store_booke_tsr (void)
2399 {
2400 store_booke_tsr(env, T0);
2401 RETURN();
2402 }
2403 #endif /* !defined(CONFIG_USER_ONLY) */
2404
2405 /* SPE extension */
2406 void OPPROTO op_splatw_T1_64 (void)
2407 {
2408 T1_64 = (T1_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL);
2409 RETURN();
2410 }
2411
2412 void OPPROTO op_splatwi_T0_64 (void)
2413 {
2414 uint64_t tmp = PARAM1;
2415
2416 T0_64 = (tmp << 32) | tmp;
2417 RETURN();
2418 }
2419
2420 void OPPROTO op_splatwi_T1_64 (void)
2421 {
2422 uint64_t tmp = PARAM1;
2423
2424 T1_64 = (tmp << 32) | tmp;
2425 RETURN();
2426 }
2427
2428 void OPPROTO op_extsh_T1_64 (void)
2429 {
2430 T1_64 = (int32_t)((int16_t)T1_64);
2431 RETURN();
2432 }
2433
2434 void OPPROTO op_sli16_T1_64 (void)
2435 {
2436 T1_64 = T1_64 << 16;
2437 RETURN();
2438 }
2439
2440 void OPPROTO op_sli32_T1_64 (void)
2441 {
2442 T1_64 = T1_64 << 32;
2443 RETURN();
2444 }
2445
2446 void OPPROTO op_srli32_T1_64 (void)
2447 {
2448 T1_64 = T1_64 >> 32;
2449 RETURN();
2450 }
2451
2452 void OPPROTO op_evsel (void)
2453 {
2454 do_evsel();
2455 RETURN();
2456 }
2457
2458 void OPPROTO op_evaddw (void)
2459 {
2460 do_evaddw();
2461 RETURN();
2462 }
2463
2464 void OPPROTO op_evsubfw (void)
2465 {
2466 do_evsubfw();
2467 RETURN();
2468 }
2469
2470 void OPPROTO op_evneg (void)
2471 {
2472 do_evneg();
2473 RETURN();
2474 }
2475
2476 void OPPROTO op_evabs (void)
2477 {
2478 do_evabs();
2479 RETURN();
2480 }
2481
2482 void OPPROTO op_evextsh (void)
2483 {
2484 T0_64 = ((uint64_t)((int32_t)(int16_t)(T0_64 >> 32)) << 32) |
2485 (uint64_t)((int32_t)(int16_t)T0_64);
2486 RETURN();
2487 }
2488
2489 void OPPROTO op_evextsb (void)
2490 {
2491 T0_64 = ((uint64_t)((int32_t)(int8_t)(T0_64 >> 32)) << 32) |
2492 (uint64_t)((int32_t)(int8_t)T0_64);
2493 RETURN();
2494 }
2495
2496 void OPPROTO op_evcntlzw (void)
2497 {
2498 do_evcntlzw();
2499 RETURN();
2500 }
2501
2502 void OPPROTO op_evrndw (void)
2503 {
2504 do_evrndw();
2505 RETURN();
2506 }
2507
2508 void OPPROTO op_brinc (void)
2509 {
2510 do_brinc();
2511 RETURN();
2512 }
2513
2514 void OPPROTO op_evcntlsw (void)
2515 {
2516 do_evcntlsw();
2517 RETURN();
2518 }
2519
2520 void OPPROTO op_evand (void)
2521 {
2522 T0_64 &= T1_64;
2523 RETURN();
2524 }
2525
2526 void OPPROTO op_evandc (void)
2527 {
2528 T0_64 &= ~T1_64;
2529 RETURN();
2530 }
2531
2532 void OPPROTO op_evor (void)
2533 {
2534 T0_64 |= T1_64;
2535 RETURN();
2536 }
2537
2538 void OPPROTO op_evxor (void)
2539 {
2540 T0_64 ^= T1_64;
2541 RETURN();
2542 }
2543
2544 void OPPROTO op_eveqv (void)
2545 {
2546 T0_64 = ~(T0_64 ^ T1_64);
2547 RETURN();
2548 }
2549
2550 void OPPROTO op_evnor (void)
2551 {
2552 T0_64 = ~(T0_64 | T1_64);
2553 RETURN();
2554 }
2555
2556 void OPPROTO op_evorc (void)
2557 {
2558 T0_64 |= ~T1_64;
2559 RETURN();
2560 }
2561
2562 void OPPROTO op_evnand (void)
2563 {
2564 T0_64 = ~(T0_64 & T1_64);
2565 RETURN();
2566 }
2567
2568 void OPPROTO op_evsrws (void)
2569 {
2570 do_evsrws();
2571 RETURN();
2572 }
2573
2574 void OPPROTO op_evsrwu (void)
2575 {
2576 do_evsrwu();
2577 RETURN();
2578 }
2579
2580 void OPPROTO op_evslw (void)
2581 {
2582 do_evslw();
2583 RETURN();
2584 }
2585
2586 void OPPROTO op_evrlw (void)
2587 {
2588 do_evrlw();
2589 RETURN();
2590 }
2591
2592 void OPPROTO op_evmergelo (void)
2593 {
2594 T0_64 = (T0_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL);
2595 RETURN();
2596 }
2597
2598 void OPPROTO op_evmergehi (void)
2599 {
2600 T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 >> 32);
2601 RETURN();
2602 }
2603
2604 void OPPROTO op_evmergelohi (void)
2605 {
2606 T0_64 = (T0_64 << 32) | (T1_64 >> 32);
2607 RETURN();
2608 }
2609
2610 void OPPROTO op_evmergehilo (void)
2611 {
2612 T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 & 0x00000000FFFFFFFFULL);
2613 RETURN();
2614 }
2615
2616 void OPPROTO op_evcmpgts (void)
2617 {
2618 do_evcmpgts();
2619 RETURN();
2620 }
2621
2622 void OPPROTO op_evcmpgtu (void)
2623 {
2624 do_evcmpgtu();
2625 RETURN();
2626 }
2627
2628 void OPPROTO op_evcmplts (void)
2629 {
2630 do_evcmplts();
2631 RETURN();
2632 }
2633
2634 void OPPROTO op_evcmpltu (void)
2635 {
2636 do_evcmpltu();
2637 RETURN();
2638 }
2639
2640 void OPPROTO op_evcmpeq (void)
2641 {
2642 do_evcmpeq();
2643 RETURN();
2644 }
2645
2646 void OPPROTO op_evfssub (void)
2647 {
2648 do_evfssub();
2649 RETURN();
2650 }
2651
2652 void OPPROTO op_evfsadd (void)
2653 {
2654 do_evfsadd();
2655 RETURN();
2656 }
2657
2658 void OPPROTO op_evfsnabs (void)
2659 {
2660 do_evfsnabs();
2661 RETURN();
2662 }
2663
2664 void OPPROTO op_evfsabs (void)
2665 {
2666 do_evfsabs();
2667 RETURN();
2668 }
2669
2670 void OPPROTO op_evfsneg (void)
2671 {
2672 do_evfsneg();
2673 RETURN();
2674 }
2675
2676 void OPPROTO op_evfsdiv (void)
2677 {
2678 do_evfsdiv();
2679 RETURN();
2680 }
2681
2682 void OPPROTO op_evfsmul (void)
2683 {
2684 do_evfsmul();
2685 RETURN();
2686 }
2687
2688 void OPPROTO op_evfscmplt (void)
2689 {
2690 do_evfscmplt();
2691 RETURN();
2692 }
2693
2694 void OPPROTO op_evfscmpgt (void)
2695 {
2696 do_evfscmpgt();
2697 RETURN();
2698 }
2699
2700 void OPPROTO op_evfscmpeq (void)
2701 {
2702 do_evfscmpeq();
2703 RETURN();
2704 }
2705
2706 void OPPROTO op_evfscfsi (void)
2707 {
2708 do_evfscfsi();
2709 RETURN();
2710 }
2711
2712 void OPPROTO op_evfscfui (void)
2713 {
2714 do_evfscfui();
2715 RETURN();
2716 }
2717
2718 void OPPROTO op_evfscfsf (void)
2719 {
2720 do_evfscfsf();
2721 RETURN();
2722 }
2723
2724 void OPPROTO op_evfscfuf (void)
2725 {
2726 do_evfscfuf();
2727 RETURN();
2728 }
2729
2730 void OPPROTO op_evfsctsi (void)
2731 {
2732 do_evfsctsi();
2733 RETURN();
2734 }
2735
2736 void OPPROTO op_evfsctui (void)
2737 {
2738 do_evfsctui();
2739 RETURN();
2740 }
2741
2742 void OPPROTO op_evfsctsf (void)
2743 {
2744 do_evfsctsf();
2745 RETURN();
2746 }
2747
2748 void OPPROTO op_evfsctuf (void)
2749 {
2750 do_evfsctuf();
2751 RETURN();
2752 }
2753
2754 void OPPROTO op_evfsctuiz (void)
2755 {
2756 do_evfsctuiz();
2757 RETURN();
2758 }
2759
2760 void OPPROTO op_evfsctsiz (void)
2761 {
2762 do_evfsctsiz();
2763 RETURN();
2764 }
2765
2766 void OPPROTO op_evfststlt (void)
2767 {
2768 do_evfststlt();
2769 RETURN();
2770 }
2771
2772 void OPPROTO op_evfststgt (void)
2773 {
2774 do_evfststgt();
2775 RETURN();
2776 }
2777
2778 void OPPROTO op_evfststeq (void)
2779 {
2780 do_evfststeq();
2781 RETURN();
2782 }
2783
2784 void OPPROTO op_efssub (void)
2785 {
2786 T0_64 = _do_efssub(T0_64, T1_64);
2787 RETURN();
2788 }
2789
2790 void OPPROTO op_efsadd (void)
2791 {
2792 T0_64 = _do_efsadd(T0_64, T1_64);
2793 RETURN();
2794 }
2795
2796 void OPPROTO op_efsnabs (void)
2797 {
2798 T0_64 = _do_efsnabs(T0_64);
2799 RETURN();
2800 }
2801
2802 void OPPROTO op_efsabs (void)
2803 {
2804 T0_64 = _do_efsabs(T0_64);
2805 RETURN();
2806 }
2807
2808 void OPPROTO op_efsneg (void)
2809 {
2810 T0_64 = _do_efsneg(T0_64);
2811 RETURN();
2812 }
2813
2814 void OPPROTO op_efsdiv (void)
2815 {
2816 T0_64 = _do_efsdiv(T0_64, T1_64);
2817 RETURN();
2818 }
2819
2820 void OPPROTO op_efsmul (void)
2821 {
2822 T0_64 = _do_efsmul(T0_64, T1_64);
2823 RETURN();
2824 }
2825
2826 void OPPROTO op_efscmplt (void)
2827 {
2828 do_efscmplt();
2829 RETURN();
2830 }
2831
2832 void OPPROTO op_efscmpgt (void)
2833 {
2834 do_efscmpgt();
2835 RETURN();
2836 }
2837
2838 void OPPROTO op_efscfd (void)
2839 {
2840 do_efscfd();
2841 RETURN();
2842 }
2843
2844 void OPPROTO op_efscmpeq (void)
2845 {
2846 do_efscmpeq();
2847 RETURN();
2848 }
2849
2850 void OPPROTO op_efscfsi (void)
2851 {
2852 do_efscfsi();
2853 RETURN();
2854 }
2855
2856 void OPPROTO op_efscfui (void)
2857 {
2858 do_efscfui();
2859 RETURN();
2860 }
2861
2862 void OPPROTO op_efscfsf (void)
2863 {
2864 do_efscfsf();
2865 RETURN();
2866 }
2867
2868 void OPPROTO op_efscfuf (void)
2869 {
2870 do_efscfuf();
2871 RETURN();
2872 }
2873
2874 void OPPROTO op_efsctsi (void)
2875 {
2876 do_efsctsi();
2877 RETURN();
2878 }
2879
2880 void OPPROTO op_efsctui (void)
2881 {
2882 do_efsctui();
2883 RETURN();
2884 }
2885
2886 void OPPROTO op_efsctsf (void)
2887 {
2888 do_efsctsf();
2889 RETURN();
2890 }
2891
2892 void OPPROTO op_efsctuf (void)
2893 {
2894 do_efsctuf();
2895 RETURN();
2896 }
2897
2898 void OPPROTO op_efsctsiz (void)
2899 {
2900 do_efsctsiz();
2901 RETURN();
2902 }
2903
2904 void OPPROTO op_efsctuiz (void)
2905 {
2906 do_efsctuiz();
2907 RETURN();
2908 }
2909
2910 void OPPROTO op_efststlt (void)
2911 {
2912 T0 = _do_efststlt(T0_64, T1_64);
2913 RETURN();
2914 }
2915
2916 void OPPROTO op_efststgt (void)
2917 {
2918 T0 = _do_efststgt(T0_64, T1_64);
2919 RETURN();
2920 }
2921
2922 void OPPROTO op_efststeq (void)
2923 {
2924 T0 = _do_efststeq(T0_64, T1_64);
2925 RETURN();
2926 }
2927
2928 void OPPROTO op_efdsub (void)
2929 {
2930 CPU_DoubleU u1, u2;
2931 u1.ll = T0_64;
2932 u2.ll = T1_64;
2933 u1.d = float64_sub(u1.d, u2.d, &env->spe_status);
2934 T0_64 = u1.ll;
2935 RETURN();
2936 }
2937
2938 void OPPROTO op_efdadd (void)
2939 {
2940 CPU_DoubleU u1, u2;
2941 u1.ll = T0_64;
2942 u2.ll = T1_64;
2943 u1.d = float64_add(u1.d, u2.d, &env->spe_status);
2944 T0_64 = u1.ll;
2945 RETURN();
2946 }
2947
2948 void OPPROTO op_efdcfsid (void)
2949 {
2950 do_efdcfsi();
2951 RETURN();
2952 }
2953
2954 void OPPROTO op_efdcfuid (void)
2955 {
2956 do_efdcfui();
2957 RETURN();
2958 }
2959
2960 void OPPROTO op_efdnabs (void)
2961 {
2962 T0_64 |= 0x8000000000000000ULL;
2963 RETURN();
2964 }
2965
2966 void OPPROTO op_efdabs (void)
2967 {
2968 T0_64 &= ~0x8000000000000000ULL;
2969 RETURN();
2970 }
2971
2972 void OPPROTO op_efdneg (void)
2973 {
2974 T0_64 ^= 0x8000000000000000ULL;
2975 RETURN();
2976 }
2977
2978 void OPPROTO op_efddiv (void)
2979 {
2980 CPU_DoubleU u1, u2;
2981 u1.ll = T0_64;
2982 u2.ll = T1_64;
2983 u1.d = float64_div(u1.d, u2.d, &env->spe_status);
2984 T0_64 = u1.ll;
2985 RETURN();
2986 }
2987
2988 void OPPROTO op_efdmul (void)
2989 {
2990 CPU_DoubleU u1, u2;
2991 u1.ll = T0_64;
2992 u2.ll = T1_64;
2993 u1.d = float64_mul(u1.d, u2.d, &env->spe_status);
2994 T0_64 = u1.ll;
2995 RETURN();
2996 }
2997
2998 void OPPROTO op_efdctsidz (void)
2999 {
3000 do_efdctsiz();
3001 RETURN();
3002 }
3003
3004 void OPPROTO op_efdctuidz (void)
3005 {
3006 do_efdctuiz();
3007 RETURN();
3008 }
3009
3010 void OPPROTO op_efdcmplt (void)
3011 {
3012 do_efdcmplt();
3013 RETURN();
3014 }
3015
3016 void OPPROTO op_efdcmpgt (void)
3017 {
3018 do_efdcmpgt();
3019 RETURN();
3020 }
3021
3022 void OPPROTO op_efdcfs (void)
3023 {
3024 do_efdcfs();
3025 RETURN();
3026 }
3027
3028 void OPPROTO op_efdcmpeq (void)
3029 {
3030 do_efdcmpeq();
3031 RETURN();
3032 }
3033
3034 void OPPROTO op_efdcfsi (void)
3035 {
3036 do_efdcfsi();
3037 RETURN();
3038 }
3039
3040 void OPPROTO op_efdcfui (void)
3041 {
3042 do_efdcfui();
3043 RETURN();
3044 }
3045
3046 void OPPROTO op_efdcfsf (void)
3047 {
3048 do_efdcfsf();
3049 RETURN();
3050 }
3051
3052 void OPPROTO op_efdcfuf (void)
3053 {
3054 do_efdcfuf();
3055 RETURN();
3056 }
3057
3058 void OPPROTO op_efdctsi (void)
3059 {
3060 do_efdctsi();
3061 RETURN();
3062 }
3063
3064 void OPPROTO op_efdctui (void)
3065 {
3066 do_efdctui();
3067 RETURN();
3068 }
3069
3070 void OPPROTO op_efdctsf (void)
3071 {
3072 do_efdctsf();
3073 RETURN();
3074 }
3075
3076 void OPPROTO op_efdctuf (void)
3077 {
3078 do_efdctuf();
3079 RETURN();
3080 }
3081
3082 void OPPROTO op_efdctuiz (void)
3083 {
3084 do_efdctuiz();
3085 RETURN();
3086 }
3087
3088 void OPPROTO op_efdctsiz (void)
3089 {
3090 do_efdctsiz();
3091 RETURN();
3092 }
3093
3094 void OPPROTO op_efdtstlt (void)
3095 {
3096 T0 = _do_efdtstlt(T0_64, T1_64);
3097 RETURN();
3098 }
3099
3100 void OPPROTO op_efdtstgt (void)
3101 {
3102 T0 = _do_efdtstgt(T0_64, T1_64);
3103 RETURN();
3104 }
3105
3106 void OPPROTO op_efdtsteq (void)
3107 {
3108 T0 = _do_efdtsteq(T0_64, T1_64);
3109 RETURN();
3110 }