target-ppc/op_mem.h

   1 /*
   2  *  PowerPC emulation micro-operations for qemu.
   3  *
   4  *  Copyright (c) 2003-2007 Jocelyn Mayer
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #include "op_mem_access.h"
  22
  23 /***                    Integer load and store multiple                    ***/
  24 void OPPROTO glue(op_lmw, MEMSUFFIX) (void)
  25 {
  26     glue(do_lmw, MEMSUFFIX)(PARAM1);
  27     RETURN();
  28 }
  29
  30 #if defined(TARGET_PPC64)
  31 void OPPROTO glue(op_lmw_64, MEMSUFFIX) (void)
  32 {
  33     glue(do_lmw_64, MEMSUFFIX)(PARAM1);
  34     RETURN();
  35 }
  36 #endif
  37
  38 void OPPROTO glue(op_lmw_le, MEMSUFFIX) (void)
  39 {
  40     glue(do_lmw_le, MEMSUFFIX)(PARAM1);
  41     RETURN();
  42 }
  43
  44 #if defined(TARGET_PPC64)
  45 void OPPROTO glue(op_lmw_le_64, MEMSUFFIX) (void)
  46 {
  47     glue(do_lmw_le_64, MEMSUFFIX)(PARAM1);
  48     RETURN();
  49 }
  50 #endif
  51
  52 void OPPROTO glue(op_stmw, MEMSUFFIX) (void)
  53 {
  54     glue(do_stmw, MEMSUFFIX)(PARAM1);
  55     RETURN();
  56 }
  57
  58 #if defined(TARGET_PPC64)
  59 void OPPROTO glue(op_stmw_64, MEMSUFFIX) (void)
  60 {
  61     glue(do_stmw_64, MEMSUFFIX)(PARAM1);
  62     RETURN();
  63 }
  64 #endif
  65
  66 void OPPROTO glue(op_stmw_le, MEMSUFFIX) (void)
  67 {
  68     glue(do_stmw_le, MEMSUFFIX)(PARAM1);
  69     RETURN();
  70 }
  71
  72 #if defined(TARGET_PPC64)
  73 void OPPROTO glue(op_stmw_le_64, MEMSUFFIX) (void)
  74 {
  75     glue(do_stmw_le_64, MEMSUFFIX)(PARAM1);
  76     RETURN();
  77 }
  78 #endif
  79
  80 /***                    Integer load and store strings                     ***/
  81 void OPPROTO glue(op_lswi, MEMSUFFIX) (void)
  82 {
  83     glue(do_lsw, MEMSUFFIX)(PARAM1);
  84     RETURN();
  85 }
  86
  87 #if defined(TARGET_PPC64)
  88 void OPPROTO glue(op_lswi_64, MEMSUFFIX) (void)
  89 {
  90     glue(do_lsw_64, MEMSUFFIX)(PARAM1);
  91     RETURN();
  92 }
  93 #endif
  94
  95 /* PPC32 specification says we must generate an exception if
  96  * rA is in the range of registers to be loaded.
  97  * In an other hand, IBM says this is valid, but rA won't be loaded.
  98  * For now, I'll follow the spec...
  99  */
 100 void OPPROTO glue(op_lswx, MEMSUFFIX) (void)
 101 {
 102     /* Note: T1 comes from xer_bc then no cast is needed */
 103     if (likely(T1 != 0)) {
 104         if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
 105                      (PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) {
 106             raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 107                                 POWERPC_EXCP_INVAL |
 108                                 POWERPC_EXCP_INVAL_LSWX);
 109         } else {
 110             glue(do_lsw, MEMSUFFIX)(PARAM1);
 111         }
 112     }
 113     RETURN();
 114 }
 115
 116 #if defined(TARGET_PPC64)
 117 void OPPROTO glue(op_lswx_64, MEMSUFFIX) (void)
 118 {
 119     /* Note: T1 comes from xer_bc then no cast is needed */
 120     if (likely(T1 != 0)) {
 121         if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
 122                      (PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) {
 123             raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 124                                 POWERPC_EXCP_INVAL |
 125                                 POWERPC_EXCP_INVAL_LSWX);
 126         } else {
 127             glue(do_lsw_64, MEMSUFFIX)(PARAM1);
 128         }
 129     }
 130     RETURN();
 131 }
 132 #endif
 133
 134 void OPPROTO glue(op_stsw, MEMSUFFIX) (void)
 135 {
 136     glue(do_stsw, MEMSUFFIX)(PARAM1);
 137     RETURN();
 138 }
 139
 140 #if defined(TARGET_PPC64)
 141 void OPPROTO glue(op_stsw_64, MEMSUFFIX) (void)
 142 {
 143     glue(do_stsw_64, MEMSUFFIX)(PARAM1);
 144     RETURN();
 145 }
 146 #endif
 147
 148 /* Load and set reservation */
 149 void OPPROTO glue(op_lwarx, MEMSUFFIX) (void)
 150 {
 151     if (unlikely(T0 & 0x03)) {
 152         raise_exception(env, POWERPC_EXCP_ALIGN);
 153     } else {
 154         T1 = glue(ldu32, MEMSUFFIX)((uint32_t)T0);
 155         env->reserve = (uint32_t)T0;
 156     }
 157     RETURN();
 158 }
 159
 160 #if defined(TARGET_PPC64)
 161 void OPPROTO glue(op_lwarx_64, MEMSUFFIX) (void)
 162 {
 163     if (unlikely(T0 & 0x03)) {
 164         raise_exception(env, POWERPC_EXCP_ALIGN);
 165     } else {
 166         T1 = glue(ldu32, MEMSUFFIX)((uint64_t)T0);
 167         env->reserve = (uint64_t)T0;
 168     }
 169     RETURN();
 170 }
 171
 172 void OPPROTO glue(op_ldarx, MEMSUFFIX) (void)
 173 {
 174     if (unlikely(T0 & 0x03)) {
 175         raise_exception(env, POWERPC_EXCP_ALIGN);
 176     } else {
 177         T1 = glue(ldu64, MEMSUFFIX)((uint32_t)T0);
 178         env->reserve = (uint32_t)T0;
 179     }
 180     RETURN();
 181 }
 182
 183 void OPPROTO glue(op_ldarx_64, MEMSUFFIX) (void)
 184 {
 185     if (unlikely(T0 & 0x03)) {
 186         raise_exception(env, POWERPC_EXCP_ALIGN);
 187     } else {
 188         T1 = glue(ldu64, MEMSUFFIX)((uint64_t)T0);
 189         env->reserve = (uint64_t)T0;
 190     }
 191     RETURN();
 192 }
 193 #endif
 194
 195 void OPPROTO glue(op_lwarx_le, MEMSUFFIX) (void)
 196 {
 197     if (unlikely(T0 & 0x03)) {
 198         raise_exception(env, POWERPC_EXCP_ALIGN);
 199     } else {
 200         T1 = glue(ldu32r, MEMSUFFIX)((uint32_t)T0);
 201         env->reserve = (uint32_t)T0;
 202     }
 203     RETURN();
 204 }
 205
 206 #if defined(TARGET_PPC64)
 207 void OPPROTO glue(op_lwarx_le_64, MEMSUFFIX) (void)
 208 {
 209     if (unlikely(T0 & 0x03)) {
 210         raise_exception(env, POWERPC_EXCP_ALIGN);
 211     } else {
 212         T1 = glue(ldu32r, MEMSUFFIX)((uint64_t)T0);
 213         env->reserve = (uint64_t)T0;
 214     }
 215     RETURN();
 216 }
 217
 218 void OPPROTO glue(op_ldarx_le, MEMSUFFIX) (void)
 219 {
 220     if (unlikely(T0 & 0x03)) {
 221         raise_exception(env, POWERPC_EXCP_ALIGN);
 222     } else {
 223         T1 = glue(ldu64r, MEMSUFFIX)((uint32_t)T0);
 224         env->reserve = (uint32_t)T0;
 225     }
 226     RETURN();
 227 }
 228
 229 void OPPROTO glue(op_ldarx_le_64, MEMSUFFIX) (void)
 230 {
 231     if (unlikely(T0 & 0x03)) {
 232         raise_exception(env, POWERPC_EXCP_ALIGN);
 233     } else {
 234         T1 = glue(ldu64r, MEMSUFFIX)((uint64_t)T0);
 235         env->reserve = (uint64_t)T0;
 236     }
 237     RETURN();
 238 }
 239 #endif
 240
 241 /* Store with reservation */
 242 void OPPROTO glue(op_stwcx, MEMSUFFIX) (void)
 243 {
 244     if (unlikely(T0 & 0x03)) {
 245         raise_exception(env, POWERPC_EXCP_ALIGN);
 246     } else {
 247         if (unlikely(env->reserve != (uint32_t)T0)) {
 248             env->crf[0] = xer_so;
 249         } else {
 250             glue(st32, MEMSUFFIX)((uint32_t)T0, T1);
 251             env->crf[0] = xer_so | 0x02;
 252         }
 253     }
 254     env->reserve = (target_ulong)-1ULL;
 255     RETURN();
 256 }
 257
 258 #if defined(TARGET_PPC64)
 259 void OPPROTO glue(op_stwcx_64, MEMSUFFIX) (void)
 260 {
 261     if (unlikely(T0 & 0x03)) {
 262         raise_exception(env, POWERPC_EXCP_ALIGN);
 263     } else {
 264         if (unlikely(env->reserve != (uint64_t)T0)) {
 265             env->crf[0] = xer_so;
 266         } else {
 267             glue(st32, MEMSUFFIX)((uint64_t)T0, T1);
 268             env->crf[0] = xer_so | 0x02;
 269         }
 270     }
 271     env->reserve = (target_ulong)-1ULL;
 272     RETURN();
 273 }
 274
 275 void OPPROTO glue(op_stdcx, MEMSUFFIX) (void)
 276 {
 277     if (unlikely(T0 & 0x03)) {
 278         raise_exception(env, POWERPC_EXCP_ALIGN);
 279     } else {
 280         if (unlikely(env->reserve != (uint32_t)T0)) {
 281             env->crf[0] = xer_so;
 282         } else {
 283             glue(st64, MEMSUFFIX)((uint32_t)T0, T1);
 284             env->crf[0] = xer_so | 0x02;
 285         }
 286     }
 287     env->reserve = (target_ulong)-1ULL;
 288     RETURN();
 289 }
 290
 291 void OPPROTO glue(op_stdcx_64, MEMSUFFIX) (void)
 292 {
 293     if (unlikely(T0 & 0x03)) {
 294         raise_exception(env, POWERPC_EXCP_ALIGN);
 295     } else {
 296         if (unlikely(env->reserve != (uint64_t)T0)) {
 297             env->crf[0] = xer_so;
 298         } else {
 299             glue(st64, MEMSUFFIX)((uint64_t)T0, T1);
 300             env->crf[0] = xer_so | 0x02;
 301         }
 302     }
 303     env->reserve = (target_ulong)-1ULL;
 304     RETURN();
 305 }
 306 #endif
 307
 308 void OPPROTO glue(op_stwcx_le, MEMSUFFIX) (void)
 309 {
 310     if (unlikely(T0 & 0x03)) {
 311         raise_exception(env, POWERPC_EXCP_ALIGN);
 312     } else {
 313         if (unlikely(env->reserve != (uint32_t)T0)) {
 314             env->crf[0] = xer_so;
 315         } else {
 316             glue(st32r, MEMSUFFIX)((uint32_t)T0, T1);
 317             env->crf[0] = xer_so | 0x02;
 318         }
 319     }
 320     env->reserve = (target_ulong)-1ULL;
 321     RETURN();
 322 }
 323
 324 #if defined(TARGET_PPC64)
 325 void OPPROTO glue(op_stwcx_le_64, MEMSUFFIX) (void)
 326 {
 327     if (unlikely(T0 & 0x03)) {
 328         raise_exception(env, POWERPC_EXCP_ALIGN);
 329     } else {
 330         if (unlikely(env->reserve != (uint64_t)T0)) {
 331             env->crf[0] = xer_so;
 332         } else {
 333             glue(st32r, MEMSUFFIX)((uint64_t)T0, T1);
 334             env->crf[0] = xer_so | 0x02;
 335         }
 336     }
 337     env->reserve = (target_ulong)-1ULL;
 338     RETURN();
 339 }
 340
 341 void OPPROTO glue(op_stdcx_le, MEMSUFFIX) (void)
 342 {
 343     if (unlikely(T0 & 0x03)) {
 344         raise_exception(env, POWERPC_EXCP_ALIGN);
 345     } else {
 346         if (unlikely(env->reserve != (uint32_t)T0)) {
 347             env->crf[0] = xer_so;
 348         } else {
 349             glue(st64r, MEMSUFFIX)((uint32_t)T0, T1);
 350             env->crf[0] = xer_so | 0x02;
 351         }
 352     }
 353     env->reserve = (target_ulong)-1ULL;
 354     RETURN();
 355 }
 356
 357 void OPPROTO glue(op_stdcx_le_64, MEMSUFFIX) (void)
 358 {
 359     if (unlikely(T0 & 0x03)) {
 360         raise_exception(env, POWERPC_EXCP_ALIGN);
 361     } else {
 362         if (unlikely(env->reserve != (uint64_t)T0)) {
 363             env->crf[0] = xer_so;
 364         } else {
 365             glue(st64r, MEMSUFFIX)((uint64_t)T0, T1);
 366             env->crf[0] = xer_so | 0x02;
 367         }
 368     }
 369     env->reserve = (target_ulong)-1ULL;
 370     RETURN();
 371 }
 372 #endif
 373
 374 void OPPROTO glue(op_dcbz_l32, MEMSUFFIX) (void)
 375 {
 376     T0 &= ~((uint32_t)31);
 377     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
 378     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
 379     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
 380     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
 381     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
 382     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
 383     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
 384     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
 385     RETURN();
 386 }
 387
 388 void OPPROTO glue(op_dcbz_l64, MEMSUFFIX) (void)
 389 {
 390     T0 &= ~((uint32_t)63);
 391     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
 392     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
 393     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
 394     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
 395     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
 396     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
 397     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
 398     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
 399     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0);
 400     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0);
 401     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0);
 402     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0);
 403     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0);
 404     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0);
 405     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0);
 406     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0);
 407     RETURN();
 408 }
 409
 410 void OPPROTO glue(op_dcbz_l128, MEMSUFFIX) (void)
 411 {
 412     T0 &= ~((uint32_t)127);
 413     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
 414     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
 415     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
 416     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
 417     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
 418     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
 419     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
 420     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
 421     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0);
 422     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0);
 423     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0);
 424     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0);
 425     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0);
 426     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0);
 427     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0);
 428     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0);
 429     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x40UL), 0);
 430     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x44UL), 0);
 431     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x48UL), 0);
 432     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x4CUL), 0);
 433     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x50UL), 0);
 434     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x54UL), 0);
 435     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x58UL), 0);
 436     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x5CUL), 0);
 437     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x60UL), 0);
 438     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x64UL), 0);
 439     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x68UL), 0);
 440     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x6CUL), 0);
 441     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x70UL), 0);
 442     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x74UL), 0);
 443     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x78UL), 0);
 444     glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x7CUL), 0);
 445     RETURN();
 446 }
 447
 448 void OPPROTO glue(op_dcbz, MEMSUFFIX) (void)
 449 {
 450     glue(do_dcbz, MEMSUFFIX)();
 451     RETURN();
 452 }
 453
 454 #if defined(TARGET_PPC64)
 455 void OPPROTO glue(op_dcbz_l32_64, MEMSUFFIX) (void)
 456 {
 457     T0 &= ~((uint64_t)31);
 458     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
 459     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
 460     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
 461     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
 462     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
 463     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
 464     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
 465     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
 466     RETURN();
 467 }
 468
 469 void OPPROTO glue(op_dcbz_l64_64, MEMSUFFIX) (void)
 470 {
 471     T0 &= ~((uint64_t)63);
 472     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
 473     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
 474     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
 475     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
 476     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
 477     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
 478     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
 479     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
 480     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0);
 481     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0);
 482     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0);
 483     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0);
 484     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0);
 485     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0);
 486     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0);
 487     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0);
 488     RETURN();
 489 }
 490
 491 void OPPROTO glue(op_dcbz_l128_64, MEMSUFFIX) (void)
 492 {
 493     T0 &= ~((uint64_t)127);
 494     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
 495     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
 496     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
 497     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
 498     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
 499     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
 500     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
 501     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
 502     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0);
 503     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0);
 504     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0);
 505     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0);
 506     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0);
 507     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0);
 508     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0);
 509     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0);
 510     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x40UL), 0);
 511     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x44UL), 0);
 512     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x48UL), 0);
 513     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x4CUL), 0);
 514     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x50UL), 0);
 515     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x54UL), 0);
 516     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x58UL), 0);
 517     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x5CUL), 0);
 518     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x60UL), 0);
 519     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x64UL), 0);
 520     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x68UL), 0);
 521     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x6CUL), 0);
 522     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x70UL), 0);
 523     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x74UL), 0);
 524     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x78UL), 0);
 525     glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x7CUL), 0);
 526     RETURN();
 527 }
 528
 529 void OPPROTO glue(op_dcbz_64, MEMSUFFIX) (void)
 530 {
 531     glue(do_dcbz_64, MEMSUFFIX)();
 532     RETURN();
 533 }
 534 #endif
 535
 536 /* Instruction cache block invalidate */
 537 void OPPROTO glue(op_icbi, MEMSUFFIX) (void)
 538 {
 539     glue(do_icbi, MEMSUFFIX)();
 540     RETURN();
 541 }
 542
 543 #if defined(TARGET_PPC64)
 544 void OPPROTO glue(op_icbi_64, MEMSUFFIX) (void)
 545 {
 546     glue(do_icbi_64, MEMSUFFIX)();
 547     RETURN();
 548 }
 549 #endif
 550
 551 /* External access */
 552 void OPPROTO glue(op_eciwx, MEMSUFFIX) (void)
 553 {
 554     T1 = glue(ldu32, MEMSUFFIX)((uint32_t)T0);
 555     RETURN();
 556 }
 557
 558 #if defined(TARGET_PPC64)
 559 void OPPROTO glue(op_eciwx_64, MEMSUFFIX) (void)
 560 {
 561     T1 = glue(ldu32, MEMSUFFIX)((uint64_t)T0);
 562     RETURN();
 563 }
 564 #endif
 565
 566 void OPPROTO glue(op_ecowx, MEMSUFFIX) (void)
 567 {
 568     glue(st32, MEMSUFFIX)((uint32_t)T0, T1);
 569     RETURN();
 570 }
 571
 572 #if defined(TARGET_PPC64)
 573 void OPPROTO glue(op_ecowx_64, MEMSUFFIX) (void)
 574 {
 575     glue(st32, MEMSUFFIX)((uint64_t)T0, T1);
 576     RETURN();
 577 }
 578 #endif
 579
 580 void OPPROTO glue(op_eciwx_le, MEMSUFFIX) (void)
 581 {
 582     T1 = glue(ldu32r, MEMSUFFIX)((uint32_t)T0);
 583     RETURN();
 584 }
 585
 586 #if defined(TARGET_PPC64)
 587 void OPPROTO glue(op_eciwx_le_64, MEMSUFFIX) (void)
 588 {
 589     T1 = glue(ldu32r, MEMSUFFIX)((uint64_t)T0);
 590     RETURN();
 591 }
 592 #endif
 593
 594 void OPPROTO glue(op_ecowx_le, MEMSUFFIX) (void)
 595 {
 596     glue(st32r, MEMSUFFIX)((uint32_t)T0, T1);
 597     RETURN();
 598 }
 599
 600 #if defined(TARGET_PPC64)
 601 void OPPROTO glue(op_ecowx_le_64, MEMSUFFIX) (void)
 602 {
 603     glue(st32r, MEMSUFFIX)((uint64_t)T0, T1);
 604     RETURN();
 605 }
 606 #endif
 607
 608 /* XXX: those micro-ops need tests ! */
 609 /* PowerPC 601 specific instructions (POWER bridge) */
 610 void OPPROTO glue(op_POWER_lscbx, MEMSUFFIX) (void)
 611 {
 612     /* When byte count is 0, do nothing */
 613     if (likely(T1 != 0)) {
 614         glue(do_POWER_lscbx, MEMSUFFIX)(PARAM1, PARAM2, PARAM3);
 615     }
 616     RETURN();
 617 }
 618
 619 #undef MEMSUFFIX