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1 /*
2 * S/390 misc helper routines
3 *
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2009 Alexander Graf
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include "cpu.h"
22 #include "exec/memory.h"
23 #include "qemu/host-utils.h"
24 #include "helper.h"
25 #include <string.h>
26 #include "sysemu/kvm.h"
27 #include "qemu/timer.h"
28 #ifdef CONFIG_KVM
29 #include <linux/kvm.h>
30 #endif
31
32 #if !defined(CONFIG_USER_ONLY)
33 #include "exec/softmmu_exec.h"
34 #include "sysemu/sysemu.h"
35 #endif
36
37 /* #define DEBUG_HELPER */
38 #ifdef DEBUG_HELPER
39 #define HELPER_LOG(x...) qemu_log(x)
40 #else
41 #define HELPER_LOG(x...)
42 #endif
43
44 /* Raise an exception dynamically from a helper function. */
45 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
46 uintptr_t retaddr)
47 {
48 int t;
49
50 env->exception_index = EXCP_PGM;
51 env->int_pgm_code = excp;
52
53 /* Use the (ultimate) callers address to find the insn that trapped. */
54 cpu_restore_state(env, retaddr);
55
56 /* Advance past the insn. */
57 t = cpu_ldub_code(env, env->psw.addr);
58 env->int_pgm_ilen = t = get_ilen(t);
59 env->psw.addr += 2 * t;
60
61 cpu_loop_exit(env);
62 }
63
64 /* Raise an exception statically from a TB. */
65 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
66 {
67 HELPER_LOG("%s: exception %d\n", __func__, excp);
68 env->exception_index = excp;
69 cpu_loop_exit(env);
70 }
71
72 #ifndef CONFIG_USER_ONLY
73 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
74 {
75 qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
76 env->psw.addr);
77
78 if (kvm_enabled()) {
79 #ifdef CONFIG_KVM
80 kvm_s390_interrupt(s390_env_get_cpu(env), KVM_S390_PROGRAM_INT, code);
81 #endif
82 } else {
83 env->int_pgm_code = code;
84 env->int_pgm_ilen = ilen;
85 env->exception_index = EXCP_PGM;
86 cpu_loop_exit(env);
87 }
88 }
89
90 /* SCLP service call */
91 uint32_t HELPER(servc)(CPUS390XState *env, uint32_t r1, uint64_t r2)
92 {
93 int r;
94
95 r = sclp_service_call(r1, r2);
96 if (r < 0) {
97 program_interrupt(env, -r, 4);
98 return 0;
99 }
100 return r;
101 }
102
103 /* DIAG */
104 uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
105 uint64_t code)
106 {
107 uint64_t r;
108
109 switch (num) {
110 case 0x500:
111 /* KVM hypercall */
112 r = s390_virtio_hypercall(env, mem, code);
113 break;
114 case 0x44:
115 /* yield */
116 r = 0;
117 break;
118 case 0x308:
119 /* ipl */
120 r = 0;
121 break;
122 default:
123 r = -1;
124 break;
125 }
126
127 if (r) {
128 program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
129 }
130
131 return r;
132 }
133
134 /* Set Prefix */
135 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
136 {
137 uint32_t prefix = a1 & 0x7fffe000;
138 env->psa = prefix;
139 qemu_log("prefix: %#x\n", prefix);
140 tlb_flush_page(env, 0);
141 tlb_flush_page(env, TARGET_PAGE_SIZE);
142 }
143
144 static inline uint64_t clock_value(CPUS390XState *env)
145 {
146 uint64_t time;
147
148 time = env->tod_offset +
149 time2tod(qemu_get_clock_ns(vm_clock) - env->tod_basetime);
150
151 return time;
152 }
153
154 /* Store Clock */
155 uint64_t HELPER(stck)(CPUS390XState *env)
156 {
157 return clock_value(env);
158 }
159
160 /* Store Clock Extended */
161 uint32_t HELPER(stcke)(CPUS390XState *env, uint64_t a1)
162 {
163 cpu_stb_data(env, a1, 0);
164 /* basically the same value as stck */
165 cpu_stq_data(env, a1 + 1, clock_value(env) | env->cpu_num);
166 /* more fine grained than stck */
167 cpu_stq_data(env, a1 + 9, 0);
168 /* XXX programmable fields */
169 cpu_stw_data(env, a1 + 17, 0);
170
171 return 0;
172 }
173
174 /* Set Clock Comparator */
175 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
176 {
177 if (time == -1ULL) {
178 return;
179 }
180
181 /* difference between now and then */
182 time -= clock_value(env);
183 /* nanoseconds */
184 time = (time * 125) >> 9;
185
186 qemu_mod_timer(env->tod_timer, qemu_get_clock_ns(vm_clock) + time);
187 }
188
189 /* Store Clock Comparator */
190 uint64_t HELPER(stckc)(CPUS390XState *env)
191 {
192 /* XXX implement */
193 return 0;
194 }
195
196 /* Set CPU Timer */
197 void HELPER(spt)(CPUS390XState *env, uint64_t time)
198 {
199 if (time == -1ULL) {
200 return;
201 }
202
203 /* nanoseconds */
204 time = (time * 125) >> 9;
205
206 qemu_mod_timer(env->cpu_timer, qemu_get_clock_ns(vm_clock) + time);
207 }
208
209 /* Store CPU Timer */
210 uint64_t HELPER(stpt)(CPUS390XState *env)
211 {
212 /* XXX implement */
213 return 0;
214 }
215
216 /* Store System Information */
217 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint32_t r0,
218 uint32_t r1)
219 {
220 int cc = 0;
221 int sel1, sel2;
222
223 if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
224 ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
225 /* valid function code, invalid reserved bits */
226 program_interrupt(env, PGM_SPECIFICATION, 2);
227 }
228
229 sel1 = r0 & STSI_R0_SEL1_MASK;
230 sel2 = r1 & STSI_R1_SEL2_MASK;
231
232 /* XXX: spec exception if sysib is not 4k-aligned */
233
234 switch (r0 & STSI_LEVEL_MASK) {
235 case STSI_LEVEL_1:
236 if ((sel1 == 1) && (sel2 == 1)) {
237 /* Basic Machine Configuration */
238 struct sysib_111 sysib;
239
240 memset(&sysib, 0, sizeof(sysib));
241 ebcdic_put(sysib.manuf, "QEMU ", 16);
242 /* same as machine type number in STORE CPU ID */
243 ebcdic_put(sysib.type, "QEMU", 4);
244 /* same as model number in STORE CPU ID */
245 ebcdic_put(sysib.model, "QEMU ", 16);
246 ebcdic_put(sysib.sequence, "QEMU ", 16);
247 ebcdic_put(sysib.plant, "QEMU", 4);
248 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
249 } else if ((sel1 == 2) && (sel2 == 1)) {
250 /* Basic Machine CPU */
251 struct sysib_121 sysib;
252
253 memset(&sysib, 0, sizeof(sysib));
254 /* XXX make different for different CPUs? */
255 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
256 ebcdic_put(sysib.plant, "QEMU", 4);
257 stw_p(&sysib.cpu_addr, env->cpu_num);
258 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
259 } else if ((sel1 == 2) && (sel2 == 2)) {
260 /* Basic Machine CPUs */
261 struct sysib_122 sysib;
262
263 memset(&sysib, 0, sizeof(sysib));
264 stl_p(&sysib.capability, 0x443afc29);
265 /* XXX change when SMP comes */
266 stw_p(&sysib.total_cpus, 1);
267 stw_p(&sysib.active_cpus, 1);
268 stw_p(&sysib.standby_cpus, 0);
269 stw_p(&sysib.reserved_cpus, 0);
270 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
271 } else {
272 cc = 3;
273 }
274 break;
275 case STSI_LEVEL_2:
276 {
277 if ((sel1 == 2) && (sel2 == 1)) {
278 /* LPAR CPU */
279 struct sysib_221 sysib;
280
281 memset(&sysib, 0, sizeof(sysib));
282 /* XXX make different for different CPUs? */
283 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
284 ebcdic_put(sysib.plant, "QEMU", 4);
285 stw_p(&sysib.cpu_addr, env->cpu_num);
286 stw_p(&sysib.cpu_id, 0);
287 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
288 } else if ((sel1 == 2) && (sel2 == 2)) {
289 /* LPAR CPUs */
290 struct sysib_222 sysib;
291
292 memset(&sysib, 0, sizeof(sysib));
293 stw_p(&sysib.lpar_num, 0);
294 sysib.lcpuc = 0;
295 /* XXX change when SMP comes */
296 stw_p(&sysib.total_cpus, 1);
297 stw_p(&sysib.conf_cpus, 1);
298 stw_p(&sysib.standby_cpus, 0);
299 stw_p(&sysib.reserved_cpus, 0);
300 ebcdic_put(sysib.name, "QEMU ", 8);
301 stl_p(&sysib.caf, 1000);
302 stw_p(&sysib.dedicated_cpus, 0);
303 stw_p(&sysib.shared_cpus, 0);
304 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
305 } else {
306 cc = 3;
307 }
308 break;
309 }
310 case STSI_LEVEL_3:
311 {
312 if ((sel1 == 2) && (sel2 == 2)) {
313 /* VM CPUs */
314 struct sysib_322 sysib;
315
316 memset(&sysib, 0, sizeof(sysib));
317 sysib.count = 1;
318 /* XXX change when SMP comes */
319 stw_p(&sysib.vm[0].total_cpus, 1);
320 stw_p(&sysib.vm[0].conf_cpus, 1);
321 stw_p(&sysib.vm[0].standby_cpus, 0);
322 stw_p(&sysib.vm[0].reserved_cpus, 0);
323 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
324 stl_p(&sysib.vm[0].caf, 1000);
325 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16);
326 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
327 } else {
328 cc = 3;
329 }
330 break;
331 }
332 case STSI_LEVEL_CURRENT:
333 env->regs[0] = STSI_LEVEL_3;
334 break;
335 default:
336 cc = 3;
337 break;
338 }
339
340 return cc;
341 }
342
343 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
344 uint64_t cpu_addr)
345 {
346 int cc = 0;
347
348 HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
349 __func__, order_code, r1, cpu_addr);
350
351 /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
352 as parameter (input). Status (output) is always R1. */
353
354 switch (order_code) {
355 case SIGP_SET_ARCH:
356 /* switch arch */
357 break;
358 case SIGP_SENSE:
359 /* enumerate CPU status */
360 if (cpu_addr) {
361 /* XXX implement when SMP comes */
362 return 3;
363 }
364 env->regs[r1] &= 0xffffffff00000000ULL;
365 cc = 1;
366 break;
367 #if !defined(CONFIG_USER_ONLY)
368 case SIGP_RESTART:
369 qemu_system_reset_request();
370 cpu_loop_exit(env);
371 break;
372 case SIGP_STOP:
373 qemu_system_shutdown_request();
374 cpu_loop_exit(env);
375 break;
376 #endif
377 default:
378 /* unknown sigp */
379 fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
380 cc = 3;
381 }
382
383 return cc;
384 }
385 #endif