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git.proxmox.com Git - qemu.git/blob - target-sh4/op_helper.c
4 * Copyright (c) 2005 Samuel Tardieu
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
24 static void cpu_restore_state_from_retaddr(void *retaddr
)
30 pc
= (unsigned long) retaddr
;
33 /* the PC is inside the translated code. It means that we have
34 a virtual CPU fault */
35 cpu_restore_state(tb
, env
, pc
, NULL
);
40 #ifndef CONFIG_USER_ONLY
42 #define MMUSUFFIX _mmu
45 #include "softmmu_template.h"
48 #include "softmmu_template.h"
51 #include "softmmu_template.h"
54 #include "softmmu_template.h"
56 void tlb_fill(target_ulong addr
, int is_write
, int mmu_idx
, void *retaddr
)
61 /* XXX: hack to restore env in all cases, even if not called from
65 ret
= cpu_sh4_handle_mmu_fault(env
, addr
, is_write
, mmu_idx
, 1);
67 /* now we have a real cpu fault */
68 cpu_restore_state_from_retaddr(retaddr
);
76 void helper_ldtlb(void)
78 #ifdef CONFIG_USER_ONLY
80 cpu_abort(env
, "Unhandled ldtlb");
86 static inline void raise_exception(int index
, void *retaddr
)
88 env
->exception_index
= index
;
89 cpu_restore_state_from_retaddr(retaddr
);
93 void helper_raise_illegal_instruction(void)
95 raise_exception(0x180, GETPC());
98 void helper_raise_slot_illegal_instruction(void)
100 raise_exception(0x1a0, GETPC());
103 void helper_raise_fpu_disable(void)
105 raise_exception(0x800, GETPC());
108 void helper_raise_slot_fpu_disable(void)
110 raise_exception(0x820, GETPC());
113 void helper_debug(void)
115 env
->exception_index
= EXCP_DEBUG
;
119 void helper_sleep(uint32_t next_pc
)
122 env
->exception_index
= EXCP_HLT
;
127 void helper_trapa(uint32_t tra
)
130 raise_exception(0x160, GETPC());
133 void helper_movcal(uint32_t address
, uint32_t value
)
135 if (cpu_sh4_is_cached (env
, address
))
137 memory_content
*r
= malloc (sizeof(memory_content
));
138 r
->address
= address
;
142 *(env
->movcal_backup_tail
) = r
;
143 env
->movcal_backup_tail
= &(r
->next
);
147 void helper_discard_movcal_backup(void)
149 memory_content
*current
= env
->movcal_backup
;
153 memory_content
*next
= current
->next
;
155 env
->movcal_backup
= current
= next
;
157 env
->movcal_backup_tail
= &(env
->movcal_backup
);
161 void helper_ocbi(uint32_t address
)
163 memory_content
**current
= &(env
->movcal_backup
);
166 uint32_t a
= (*current
)->address
;
167 if ((a
& ~0x1F) == (address
& ~0x1F))
169 memory_content
*next
= (*current
)->next
;
170 stl(a
, (*current
)->value
);
174 env
->movcal_backup_tail
= current
;
184 uint32_t helper_addc(uint32_t arg0
, uint32_t arg1
)
190 arg1
= tmp1
+ (env
->sr
& 1);
200 uint32_t helper_addv(uint32_t arg0
, uint32_t arg1
)
202 uint32_t dest
, src
, ans
;
204 if ((int32_t) arg1
>= 0)
208 if ((int32_t) arg0
>= 0)
214 if ((int32_t) arg1
>= 0)
219 if (src
== 0 || src
== 2) {
229 #define T (env->sr & SR_T)
230 #define Q (env->sr & SR_Q ? 1 : 0)
231 #define M (env->sr & SR_M ? 1 : 0)
232 #define SETT env->sr |= SR_T
233 #define CLRT env->sr &= ~SR_T
234 #define SETQ env->sr |= SR_Q
235 #define CLRQ env->sr &= ~SR_Q
236 #define SETM env->sr |= SR_M
237 #define CLRM env->sr &= ~SR_M
239 uint32_t helper_div1(uint32_t arg0
, uint32_t arg1
)
242 uint8_t old_q
, tmp1
= 0xff;
244 //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
246 if ((0x80000000 & arg1
) != 0)
343 //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
347 void helper_macl(uint32_t arg0
, uint32_t arg1
)
351 res
= ((uint64_t) env
->mach
<< 32) | env
->macl
;
352 res
+= (int64_t) (int32_t) arg0
*(int64_t) (int32_t) arg1
;
353 env
->mach
= (res
>> 32) & 0xffffffff;
354 env
->macl
= res
& 0xffffffff;
355 if (env
->sr
& SR_S
) {
357 env
->mach
|= 0xffff0000;
359 env
->mach
&= 0x00007fff;
363 void helper_macw(uint32_t arg0
, uint32_t arg1
)
367 res
= ((uint64_t) env
->mach
<< 32) | env
->macl
;
368 res
+= (int64_t) (int16_t) arg0
*(int64_t) (int16_t) arg1
;
369 env
->mach
= (res
>> 32) & 0xffffffff;
370 env
->macl
= res
& 0xffffffff;
371 if (env
->sr
& SR_S
) {
372 if (res
< -0x80000000) {
374 env
->macl
= 0x80000000;
375 } else if (res
> 0x000000007fffffff) {
377 env
->macl
= 0x7fffffff;
382 uint32_t helper_negc(uint32_t arg
)
387 arg
= temp
- (env
->sr
& SR_T
);
397 uint32_t helper_subc(uint32_t arg0
, uint32_t arg1
)
403 arg1
= tmp1
- (env
->sr
& SR_T
);
413 uint32_t helper_subv(uint32_t arg0
, uint32_t arg1
)
415 int32_t dest
, src
, ans
;
417 if ((int32_t) arg1
>= 0)
421 if ((int32_t) arg0
>= 0)
427 if ((int32_t) arg1
>= 0)
442 static inline void set_t(void)
447 static inline void clr_t(void)
452 void helper_ld_fpscr(uint32_t val
)
454 env
->fpscr
= val
& FPSCR_MASK
;
455 if ((val
& FPSCR_RM_MASK
) == FPSCR_RM_ZERO
) {
456 set_float_rounding_mode(float_round_to_zero
, &env
->fp_status
);
458 set_float_rounding_mode(float_round_nearest_even
, &env
->fp_status
);
460 set_flush_to_zero((val
& FPSCR_DN
) != 0, &env
->fp_status
);
463 static void update_fpscr(void *retaddr
)
465 int xcpt
, cause
, enable
;
467 xcpt
= get_float_exception_flags(&env
->fp_status
);
469 /* Clear the flag entries */
470 env
->fpscr
&= ~FPSCR_FLAG_MASK
;
472 if (unlikely(xcpt
)) {
473 if (xcpt
& float_flag_invalid
) {
474 env
->fpscr
|= FPSCR_FLAG_V
;
476 if (xcpt
& float_flag_divbyzero
) {
477 env
->fpscr
|= FPSCR_FLAG_Z
;
479 if (xcpt
& float_flag_overflow
) {
480 env
->fpscr
|= FPSCR_FLAG_O
;
482 if (xcpt
& float_flag_underflow
) {
483 env
->fpscr
|= FPSCR_FLAG_U
;
485 if (xcpt
& float_flag_inexact
) {
486 env
->fpscr
|= FPSCR_FLAG_I
;
489 /* Accumulate in cause entries */
490 env
->fpscr
|= (env
->fpscr
& FPSCR_FLAG_MASK
)
491 << (FPSCR_CAUSE_SHIFT
- FPSCR_FLAG_SHIFT
);
493 /* Generate an exception if enabled */
494 cause
= (env
->fpscr
& FPSCR_CAUSE_MASK
) >> FPSCR_CAUSE_SHIFT
;
495 enable
= (env
->fpscr
& FPSCR_ENABLE_MASK
) >> FPSCR_ENABLE_SHIFT
;
496 if (cause
& enable
) {
497 cpu_restore_state_from_retaddr(retaddr
);
498 env
->exception_index
= 0x120;
504 uint32_t helper_fabs_FT(uint32_t t0
)
508 f
.f
= float32_abs(f
.f
);
512 uint64_t helper_fabs_DT(uint64_t t0
)
516 d
.d
= float64_abs(d
.d
);
520 uint32_t helper_fadd_FT(uint32_t t0
, uint32_t t1
)
525 set_float_exception_flags(0, &env
->fp_status
);
526 f0
.f
= float32_add(f0
.f
, f1
.f
, &env
->fp_status
);
527 update_fpscr(GETPC());
531 uint64_t helper_fadd_DT(uint64_t t0
, uint64_t t1
)
536 set_float_exception_flags(0, &env
->fp_status
);
537 d0
.d
= float64_add(d0
.d
, d1
.d
, &env
->fp_status
);
538 update_fpscr(GETPC());
542 void helper_fcmp_eq_FT(uint32_t t0
, uint32_t t1
)
549 set_float_exception_flags(0, &env
->fp_status
);
550 relation
= float32_compare(f0
.f
, f1
.f
, &env
->fp_status
);
551 if (unlikely(relation
== float_relation_unordered
)) {
552 update_fpscr(GETPC());
553 } else if (relation
== float_relation_equal
) {
560 void helper_fcmp_eq_DT(uint64_t t0
, uint64_t t1
)
567 set_float_exception_flags(0, &env
->fp_status
);
568 relation
= float64_compare(d0
.d
, d1
.d
, &env
->fp_status
);
569 if (unlikely(relation
== float_relation_unordered
)) {
570 update_fpscr(GETPC());
571 } else if (relation
== float_relation_equal
) {
578 void helper_fcmp_gt_FT(uint32_t t0
, uint32_t t1
)
585 set_float_exception_flags(0, &env
->fp_status
);
586 relation
= float32_compare(f0
.f
, f1
.f
, &env
->fp_status
);
587 if (unlikely(relation
== float_relation_unordered
)) {
588 update_fpscr(GETPC());
589 } else if (relation
== float_relation_greater
) {
596 void helper_fcmp_gt_DT(uint64_t t0
, uint64_t t1
)
603 set_float_exception_flags(0, &env
->fp_status
);
604 relation
= float64_compare(d0
.d
, d1
.d
, &env
->fp_status
);
605 if (unlikely(relation
== float_relation_unordered
)) {
606 update_fpscr(GETPC());
607 } else if (relation
== float_relation_greater
) {
614 uint64_t helper_fcnvsd_FT_DT(uint32_t t0
)
619 set_float_exception_flags(0, &env
->fp_status
);
620 d
.d
= float32_to_float64(f
.f
, &env
->fp_status
);
621 update_fpscr(GETPC());
625 uint32_t helper_fcnvds_DT_FT(uint64_t t0
)
630 set_float_exception_flags(0, &env
->fp_status
);
631 f
.f
= float64_to_float32(d
.d
, &env
->fp_status
);
632 update_fpscr(GETPC());
636 uint32_t helper_fdiv_FT(uint32_t t0
, uint32_t t1
)
641 set_float_exception_flags(0, &env
->fp_status
);
642 f0
.f
= float32_div(f0
.f
, f1
.f
, &env
->fp_status
);
643 update_fpscr(GETPC());
647 uint64_t helper_fdiv_DT(uint64_t t0
, uint64_t t1
)
652 set_float_exception_flags(0, &env
->fp_status
);
653 d0
.d
= float64_div(d0
.d
, d1
.d
, &env
->fp_status
);
654 update_fpscr(GETPC());
658 uint32_t helper_float_FT(uint32_t t0
)
662 set_float_exception_flags(0, &env
->fp_status
);
663 f
.f
= int32_to_float32(t0
, &env
->fp_status
);
664 update_fpscr(GETPC());
669 uint64_t helper_float_DT(uint32_t t0
)
672 set_float_exception_flags(0, &env
->fp_status
);
673 d
.d
= int32_to_float64(t0
, &env
->fp_status
);
674 update_fpscr(GETPC());
678 uint32_t helper_fmac_FT(uint32_t t0
, uint32_t t1
, uint32_t t2
)
680 CPU_FloatU f0
, f1
, f2
;
684 set_float_exception_flags(0, &env
->fp_status
);
685 f0
.f
= float32_mul(f0
.f
, f1
.f
, &env
->fp_status
);
686 f0
.f
= float32_add(f0
.f
, f2
.f
, &env
->fp_status
);
687 update_fpscr(GETPC());
692 uint32_t helper_fmul_FT(uint32_t t0
, uint32_t t1
)
697 set_float_exception_flags(0, &env
->fp_status
);
698 f0
.f
= float32_mul(f0
.f
, f1
.f
, &env
->fp_status
);
699 update_fpscr(GETPC());
703 uint64_t helper_fmul_DT(uint64_t t0
, uint64_t t1
)
708 set_float_exception_flags(0, &env
->fp_status
);
709 d0
.d
= float64_mul(d0
.d
, d1
.d
, &env
->fp_status
);
710 update_fpscr(GETPC());
715 uint32_t helper_fneg_T(uint32_t t0
)
719 f
.f
= float32_chs(f
.f
);
723 uint32_t helper_fsqrt_FT(uint32_t t0
)
727 set_float_exception_flags(0, &env
->fp_status
);
728 f
.f
= float32_sqrt(f
.f
, &env
->fp_status
);
729 update_fpscr(GETPC());
733 uint64_t helper_fsqrt_DT(uint64_t t0
)
737 set_float_exception_flags(0, &env
->fp_status
);
738 d
.d
= float64_sqrt(d
.d
, &env
->fp_status
);
739 update_fpscr(GETPC());
743 uint32_t helper_fsub_FT(uint32_t t0
, uint32_t t1
)
748 set_float_exception_flags(0, &env
->fp_status
);
749 f0
.f
= float32_sub(f0
.f
, f1
.f
, &env
->fp_status
);
750 update_fpscr(GETPC());
754 uint64_t helper_fsub_DT(uint64_t t0
, uint64_t t1
)
760 set_float_exception_flags(0, &env
->fp_status
);
761 d0
.d
= float64_sub(d0
.d
, d1
.d
, &env
->fp_status
);
762 update_fpscr(GETPC());
766 uint32_t helper_ftrc_FT(uint32_t t0
)
771 set_float_exception_flags(0, &env
->fp_status
);
772 ret
= float32_to_int32_round_to_zero(f
.f
, &env
->fp_status
);
773 update_fpscr(GETPC());
777 uint32_t helper_ftrc_DT(uint64_t t0
)
782 set_float_exception_flags(0, &env
->fp_status
);
783 ret
= float64_to_int32_round_to_zero(d
.d
, &env
->fp_status
);
784 update_fpscr(GETPC());
788 void helper_fipr(uint32_t m
, uint32_t n
)
793 bank
= (env
->sr
& FPSCR_FR
) ? 16 : 0;
795 set_float_exception_flags(0, &env
->fp_status
);
797 for (i
= 0 ; i
< 4 ; i
++) {
798 p
= float32_mul(env
->fregs
[bank
+ m
+ i
],
799 env
->fregs
[bank
+ n
+ i
],
801 r
= float32_add(r
, p
, &env
->fp_status
);
803 update_fpscr(GETPC());
805 env
->fregs
[bank
+ n
+ 3] = r
;
808 void helper_ftrv(uint32_t n
)
810 int bank_matrix
, bank_vector
;
815 bank_matrix
= (env
->sr
& FPSCR_FR
) ? 0 : 16;
816 bank_vector
= (env
->sr
& FPSCR_FR
) ? 16 : 0;
817 set_float_exception_flags(0, &env
->fp_status
);
818 for (i
= 0 ; i
< 4 ; i
++) {
820 for (j
= 0 ; j
< 4 ; j
++) {
821 p
= float32_mul(env
->fregs
[bank_matrix
+ 4 * j
+ i
],
822 env
->fregs
[bank_vector
+ j
],
824 r
[i
] = float32_add(r
[i
], p
, &env
->fp_status
);
827 update_fpscr(GETPC());
829 for (i
= 0 ; i
< 4 ; i
++) {
830 env
->fregs
[bank_vector
+ i
] = r
[i
];