target-sparc/win_helper.c

   1 /*
   2  * Helpers for CWP and PSTATE handling
   3  *
   4  *  Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "cpu.h"
  21 #include "helper.h"
  22
  23 //#define DEBUG_PSTATE
  24
  25 #ifdef DEBUG_PSTATE
  26 #define DPRINTF_PSTATE(fmt, ...)                                \
  27     do { printf("PSTATE: " fmt , ## __VA_ARGS__); } while (0)
  28 #else
  29 #define DPRINTF_PSTATE(fmt, ...) do {} while (0)
  30 #endif
  31
  32 static inline void memcpy32(target_ulong *dst, const target_ulong *src)
  33 {
  34     dst[0] = src[0];
  35     dst[1] = src[1];
  36     dst[2] = src[2];
  37     dst[3] = src[3];
  38     dst[4] = src[4];
  39     dst[5] = src[5];
  40     dst[6] = src[6];
  41     dst[7] = src[7];
  42 }
  43
  44 void cpu_set_cwp(CPUState *env, int new_cwp)
  45 {
  46     /* put the modified wrap registers at their proper location */
  47     if (env->cwp == env->nwindows - 1) {
  48         memcpy32(env->regbase, env->regbase + env->nwindows * 16);
  49     }
  50     env->cwp = new_cwp;
  51
  52     /* put the wrap registers at their temporary location */
  53     if (new_cwp == env->nwindows - 1) {
  54         memcpy32(env->regbase + env->nwindows * 16, env->regbase);
  55     }
  56     env->regwptr = env->regbase + (new_cwp * 16);
  57 }
  58
  59 target_ulong cpu_get_psr(CPUState *env)
  60 {
  61     helper_compute_psr(env);
  62
  63 #if !defined(TARGET_SPARC64)
  64     return env->version | (env->psr & PSR_ICC) |
  65         (env->psref ? PSR_EF : 0) |
  66         (env->psrpil << 8) |
  67         (env->psrs ? PSR_S : 0) |
  68         (env->psrps ? PSR_PS : 0) |
  69         (env->psret ? PSR_ET : 0) | env->cwp;
  70 #else
  71     return env->psr & PSR_ICC;
  72 #endif
  73 }
  74
  75 void cpu_put_psr(CPUState *env, target_ulong val)
  76 {
  77     env->psr = val & PSR_ICC;
  78 #if !defined(TARGET_SPARC64)
  79     env->psref = (val & PSR_EF) ? 1 : 0;
  80     env->psrpil = (val & PSR_PIL) >> 8;
  81 #endif
  82 #if ((!defined(TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY))
  83     cpu_check_irqs(env);
  84 #endif
  85 #if !defined(TARGET_SPARC64)
  86     env->psrs = (val & PSR_S) ? 1 : 0;
  87     env->psrps = (val & PSR_PS) ? 1 : 0;
  88     env->psret = (val & PSR_ET) ? 1 : 0;
  89     cpu_set_cwp(env, val & PSR_CWP);
  90 #endif
  91     env->cc_op = CC_OP_FLAGS;
  92 }
  93
  94 int cpu_cwp_inc(CPUState *env, int cwp)
  95 {
  96     if (unlikely(cwp >= env->nwindows)) {
  97         cwp -= env->nwindows;
  98     }
  99     return cwp;
 100 }
 101
 102 int cpu_cwp_dec(CPUState *env, int cwp)
 103 {
 104     if (unlikely(cwp < 0)) {
 105         cwp += env->nwindows;
 106     }
 107     return cwp;
 108 }
 109
 110 #ifndef TARGET_SPARC64
 111 void helper_rett(CPUState *env)
 112 {
 113     unsigned int cwp;
 114
 115     if (env->psret == 1) {
 116         helper_raise_exception(env, TT_ILL_INSN);
 117     }
 118
 119     env->psret = 1;
 120     cwp = cpu_cwp_inc(env, env->cwp + 1) ;
 121     if (env->wim & (1 << cwp)) {
 122         helper_raise_exception(env, TT_WIN_UNF);
 123     }
 124     cpu_set_cwp(env, cwp);
 125     env->psrs = env->psrps;
 126 }
 127
 128 /* XXX: use another pointer for %iN registers to avoid slow wrapping
 129    handling ? */
 130 void helper_save(CPUState *env)
 131 {
 132     uint32_t cwp;
 133
 134     cwp = cpu_cwp_dec(env, env->cwp - 1);
 135     if (env->wim & (1 << cwp)) {
 136         helper_raise_exception(env, TT_WIN_OVF);
 137     }
 138     cpu_set_cwp(env, cwp);
 139 }
 140
 141 void helper_restore(CPUState *env)
 142 {
 143     uint32_t cwp;
 144
 145     cwp = cpu_cwp_inc(env, env->cwp + 1);
 146     if (env->wim & (1 << cwp)) {
 147         helper_raise_exception(env, TT_WIN_UNF);
 148     }
 149     cpu_set_cwp(env, cwp);
 150 }
 151
 152 void helper_wrpsr(CPUState *env, target_ulong new_psr)
 153 {
 154     if ((new_psr & PSR_CWP) >= env->nwindows) {
 155         helper_raise_exception(env, TT_ILL_INSN);
 156     } else {
 157         cpu_put_psr(env, new_psr);
 158     }
 159 }
 160
 161 target_ulong helper_rdpsr(CPUState *env)
 162 {
 163     return cpu_get_psr(env);
 164 }
 165
 166 #else
 167 /* XXX: use another pointer for %iN registers to avoid slow wrapping
 168    handling ? */
 169 void helper_save(CPUState *env)
 170 {
 171     uint32_t cwp;
 172
 173     cwp = cpu_cwp_dec(env, env->cwp - 1);
 174     if (env->cansave == 0) {
 175         helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ?
 176                                                 (TT_WOTHER |
 177                                                  ((env->wstate & 0x38) >> 1)) :
 178                                                 ((env->wstate & 0x7) << 2)));
 179     } else {
 180         if (env->cleanwin - env->canrestore == 0) {
 181             /* XXX Clean windows without trap */
 182             helper_raise_exception(env, TT_CLRWIN);
 183         } else {
 184             env->cansave--;
 185             env->canrestore++;
 186             cpu_set_cwp(env, cwp);
 187         }
 188     }
 189 }
 190
 191 void helper_restore(CPUState *env)
 192 {
 193     uint32_t cwp;
 194
 195     cwp = cpu_cwp_inc(env, env->cwp + 1);
 196     if (env->canrestore == 0) {
 197         helper_raise_exception(env, TT_FILL | (env->otherwin != 0 ?
 198                                                (TT_WOTHER |
 199                                                 ((env->wstate & 0x38) >> 1)) :
 200                                                ((env->wstate & 0x7) << 2)));
 201     } else {
 202         env->cansave++;
 203         env->canrestore--;
 204         cpu_set_cwp(env, cwp);
 205     }
 206 }
 207
 208 void helper_flushw(CPUState *env)
 209 {
 210     if (env->cansave != env->nwindows - 2) {
 211         helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ?
 212                                                 (TT_WOTHER |
 213                                                  ((env->wstate & 0x38) >> 1)) :
 214                                                 ((env->wstate & 0x7) << 2)));
 215     }
 216 }
 217
 218 void helper_saved(CPUState *env)
 219 {
 220     env->cansave++;
 221     if (env->otherwin == 0) {
 222         env->canrestore--;
 223     } else {
 224         env->otherwin--;
 225     }
 226 }
 227
 228 void helper_restored(CPUState *env)
 229 {
 230     env->canrestore++;
 231     if (env->cleanwin < env->nwindows - 1) {
 232         env->cleanwin++;
 233     }
 234     if (env->otherwin == 0) {
 235         env->cansave--;
 236     } else {
 237         env->otherwin--;
 238     }
 239 }
 240
 241 target_ulong cpu_get_ccr(CPUState *env)
 242 {
 243     target_ulong psr;
 244
 245     psr = cpu_get_psr(env);
 246
 247     return ((env->xcc >> 20) << 4) | ((psr & PSR_ICC) >> 20);
 248 }
 249
 250 void cpu_put_ccr(CPUState *env, target_ulong val)
 251 {
 252     env->xcc = (val >> 4) << 20;
 253     env->psr = (val & 0xf) << 20;
 254     CC_OP = CC_OP_FLAGS;
 255 }
 256
 257 target_ulong cpu_get_cwp64(CPUState *env)
 258 {
 259     return env->nwindows - 1 - env->cwp;
 260 }
 261
 262 void cpu_put_cwp64(CPUState *env, int cwp)
 263 {
 264     if (unlikely(cwp >= env->nwindows || cwp < 0)) {
 265         cwp %= env->nwindows;
 266     }
 267     cpu_set_cwp(env, env->nwindows - 1 - cwp);
 268 }
 269
 270 target_ulong helper_rdccr(CPUState *env)
 271 {
 272     return cpu_get_ccr(env);
 273 }
 274
 275 void helper_wrccr(CPUState *env, target_ulong new_ccr)
 276 {
 277     cpu_put_ccr(env, new_ccr);
 278 }
 279
 280 /* CWP handling is reversed in V9, but we still use the V8 register
 281    order. */
 282 target_ulong helper_rdcwp(CPUState *env)
 283 {
 284     return cpu_get_cwp64(env);
 285 }
 286
 287 void helper_wrcwp(CPUState *env, target_ulong new_cwp)
 288 {
 289     cpu_put_cwp64(env, new_cwp);
 290 }
 291
 292 static inline uint64_t *get_gregset(CPUState *env, uint32_t pstate)
 293 {
 294     switch (pstate) {
 295     default:
 296         DPRINTF_PSTATE("ERROR in get_gregset: active pstate bits=%x%s%s%s\n",
 297                        pstate,
 298                        (pstate & PS_IG) ? " IG" : "",
 299                        (pstate & PS_MG) ? " MG" : "",
 300                        (pstate & PS_AG) ? " AG" : "");
 301         /* pass through to normal set of global registers */
 302     case 0:
 303         return env->bgregs;
 304     case PS_AG:
 305         return env->agregs;
 306     case PS_MG:
 307         return env->mgregs;
 308     case PS_IG:
 309         return env->igregs;
 310     }
 311 }
 312
 313 void cpu_change_pstate(CPUState *env, uint32_t new_pstate)
 314 {
 315     uint32_t pstate_regs, new_pstate_regs;
 316     uint64_t *src, *dst;
 317
 318     if (env->def->features & CPU_FEATURE_GL) {
 319         /* PS_AG is not implemented in this case */
 320         new_pstate &= ~PS_AG;
 321     }
 322
 323     pstate_regs = env->pstate & 0xc01;
 324     new_pstate_regs = new_pstate & 0xc01;
 325
 326     if (new_pstate_regs != pstate_regs) {
 327         DPRINTF_PSTATE("change_pstate: switching regs old=%x new=%x\n",
 328                        pstate_regs, new_pstate_regs);
 329         /* Switch global register bank */
 330         src = get_gregset(env, new_pstate_regs);
 331         dst = get_gregset(env, pstate_regs);
 332         memcpy32(dst, env->gregs);
 333         memcpy32(env->gregs, src);
 334     } else {
 335         DPRINTF_PSTATE("change_pstate: regs new=%x (unchanged)\n",
 336                        new_pstate_regs);
 337     }
 338     env->pstate = new_pstate;
 339 }
 340
 341 void helper_wrpstate(CPUState *env, target_ulong new_state)
 342 {
 343     cpu_change_pstate(env, new_state & 0xf3f);
 344
 345 #if !defined(CONFIG_USER_ONLY)
 346     if (cpu_interrupts_enabled(env)) {
 347         cpu_check_irqs(env);
 348     }
 349 #endif
 350 }
 351
 352 void helper_wrpil(CPUState *env, target_ulong new_pil)
 353 {
 354 #if !defined(CONFIG_USER_ONLY)
 355     DPRINTF_PSTATE("helper_wrpil old=%x new=%x\n",
 356                    env->psrpil, (uint32_t)new_pil);
 357
 358     env->psrpil = new_pil;
 359
 360     if (cpu_interrupts_enabled(env)) {
 361         cpu_check_irqs(env);
 362     }
 363 #endif
 364 }
 365
 366 void helper_done(CPUState *env)
 367 {
 368     trap_state *tsptr = cpu_tsptr(env);
 369
 370     env->pc = tsptr->tnpc;
 371     env->npc = tsptr->tnpc + 4;
 372     cpu_put_ccr(env, tsptr->tstate >> 32);
 373     env->asi = (tsptr->tstate >> 24) & 0xff;
 374     cpu_change_pstate(env, (tsptr->tstate >> 8) & 0xf3f);
 375     cpu_put_cwp64(env, tsptr->tstate & 0xff);
 376     env->tl--;
 377
 378     DPRINTF_PSTATE("... helper_done tl=%d\n", env->tl);
 379
 380 #if !defined(CONFIG_USER_ONLY)
 381     if (cpu_interrupts_enabled(env)) {
 382         cpu_check_irqs(env);
 383     }
 384 #endif
 385 }
 386
 387 void helper_retry(CPUState *env)
 388 {
 389     trap_state *tsptr = cpu_tsptr(env);
 390
 391     env->pc = tsptr->tpc;
 392     env->npc = tsptr->tnpc;
 393     cpu_put_ccr(env, tsptr->tstate >> 32);
 394     env->asi = (tsptr->tstate >> 24) & 0xff;
 395     cpu_change_pstate(env, (tsptr->tstate >> 8) & 0xf3f);
 396     cpu_put_cwp64(env, tsptr->tstate & 0xff);
 397     env->tl--;
 398
 399     DPRINTF_PSTATE("... helper_retry tl=%d\n", env->tl);
 400
 401 #if !defined(CONFIG_USER_ONLY)
 402     if (cpu_interrupts_enabled(env)) {
 403         cpu_check_irqs(env);
 404     }
 405 #endif
 406 }
 407 #endif