target-xtensa/cpu.h

   1 /*
   2  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *     * Redistributions of source code must retain the above copyright
   8  *       notice, this list of conditions and the following disclaimer.
   9  *     * Redistributions in binary form must reproduce the above copyright
  10  *       notice, this list of conditions and the following disclaimer in the
  11  *       documentation and/or other materials provided with the distribution.
  12  *     * Neither the name of the Open Source and Linux Lab nor the
  13  *       names of its contributors may be used to endorse or promote products
  14  *       derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 #ifndef CPU_XTENSA_H
  29 #define CPU_XTENSA_H
  30
  31 #define TARGET_LONG_BITS 32
  32 #define ELF_MACHINE EM_XTENSA
  33
  34 #define CPUState struct CPUXtensaState
  35
  36 #include "config.h"
  37 #include "qemu-common.h"
  38 #include "cpu-defs.h"
  39
  40 #define TARGET_HAS_ICE 1
  41
  42 #define NB_MMU_MODES 4
  43
  44 #define TARGET_PHYS_ADDR_SPACE_BITS 32
  45 #define TARGET_VIRT_ADDR_SPACE_BITS 32
  46 #define TARGET_PAGE_BITS 12
  47
  48 typedef struct CPUXtensaState {
  49     uint32_t regs[16];
  50     uint32_t pc;
  51     uint32_t sregs[256];
  52
  53     CPU_COMMON
  54 } CPUXtensaState;
  55
  56 #define cpu_init cpu_xtensa_init
  57 #define cpu_exec cpu_xtensa_exec
  58 #define cpu_gen_code cpu_xtensa_gen_code
  59 #define cpu_signal_handler cpu_xtensa_signal_handler
  60 #define cpu_list xtensa_cpu_list
  61
  62 CPUXtensaState *cpu_xtensa_init(const char *cpu_model);
  63 void xtensa_translate_init(void);
  64 int cpu_xtensa_exec(CPUXtensaState *s);
  65 void do_interrupt(CPUXtensaState *s);
  66 int cpu_xtensa_signal_handler(int host_signum, void *pinfo, void *puc);
  67 void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf);
  68
  69 static inline int cpu_mmu_index(CPUState *env)
  70 {
  71     return 0;
  72 }
  73
  74 static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
  75         target_ulong *cs_base, int *flags)
  76 {
  77     *pc = env->pc;
  78     *cs_base = 0;
  79     *flags = 0;
  80 }
  81
  82 #include "cpu-all.h"
  83 #include "exec-all.h"
  84
  85 static inline int cpu_has_work(CPUState *env)
  86 {
  87     return 1;
  88 }
  89
  90 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
  91 {
  92     env->pc = tb->pc;
  93 }
  94
  95 #endif