tcg/tcg-op.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "tcg.h"
  25
  26 int gen_new_label(void);
  27
  28 static inline void tcg_gen_op1_i32(int opc, TCGv_i32 arg1)
  29 {
  30     *gen_opc_ptr++ = opc;
  31     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
  32 }
  33
  34 static inline void tcg_gen_op1_i64(int opc, TCGv_i64 arg1)
  35 {
  36     *gen_opc_ptr++ = opc;
  37     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
  38 }
  39
  40 static inline void tcg_gen_op1i(int opc, TCGArg arg1)
  41 {
  42     *gen_opc_ptr++ = opc;
  43     *gen_opparam_ptr++ = arg1;
  44 }
  45
  46 static inline void tcg_gen_op2_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2)
  47 {
  48     *gen_opc_ptr++ = opc;
  49     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
  50     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
  51 }
  52
  53 static inline void tcg_gen_op2_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2)
  54 {
  55     *gen_opc_ptr++ = opc;
  56     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
  57     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
  58 }
  59
  60 static inline void tcg_gen_op2i_i32(int opc, TCGv_i32 arg1, TCGArg arg2)
  61 {
  62     *gen_opc_ptr++ = opc;
  63     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
  64     *gen_opparam_ptr++ = arg2;
  65 }
  66
  67 static inline void tcg_gen_op2i_i64(int opc, TCGv_i64 arg1, TCGArg arg2)
  68 {
  69     *gen_opc_ptr++ = opc;
  70     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
  71     *gen_opparam_ptr++ = arg2;
  72 }
  73
  74 static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2)
  75 {
  76     *gen_opc_ptr++ = opc;
  77     *gen_opparam_ptr++ = arg1;
  78     *gen_opparam_ptr++ = arg2;
  79 }
  80
  81 static inline void tcg_gen_op3_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
  82                                    TCGv_i32 arg3)
  83 {
  84     *gen_opc_ptr++ = opc;
  85     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
  86     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
  87     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
  88 }
  89
  90 static inline void tcg_gen_op3_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
  91                                    TCGv_i64 arg3)
  92 {
  93     *gen_opc_ptr++ = opc;
  94     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
  95     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
  96     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
  97 }
  98
  99 static inline void tcg_gen_op3i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 100                                     TCGArg arg3)
 101 {
 102     *gen_opc_ptr++ = opc;
 103     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 104     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 105     *gen_opparam_ptr++ = arg3;
 106 }
 107
 108 static inline void tcg_gen_op3i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 109                                     TCGArg arg3)
 110 {
 111     *gen_opc_ptr++ = opc;
 112     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 113     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 114     *gen_opparam_ptr++ = arg3;
 115 }
 116
 117 static inline void tcg_gen_ldst_op_i32(int opc, TCGv_i32 val, TCGv_ptr base,
 118                                        TCGArg offset)
 119 {
 120     *gen_opc_ptr++ = opc;
 121     *gen_opparam_ptr++ = GET_TCGV_I32(val);
 122     *gen_opparam_ptr++ = GET_TCGV_PTR(base);
 123     *gen_opparam_ptr++ = offset;
 124 }
 125
 126 static inline void tcg_gen_ldst_op_i64(int opc, TCGv_i64 val, TCGv_ptr base,
 127                                        TCGArg offset)
 128 {
 129     *gen_opc_ptr++ = opc;
 130     *gen_opparam_ptr++ = GET_TCGV_I64(val);
 131     *gen_opparam_ptr++ = GET_TCGV_PTR(base);
 132     *gen_opparam_ptr++ = offset;
 133 }
 134
 135 static inline void tcg_gen_qemu_ldst_op_i64_i32(int opc, TCGv_i64 val, TCGv_i32 addr,
 136                                                 TCGArg mem_index)
 137 {
 138     *gen_opc_ptr++ = opc;
 139     *gen_opparam_ptr++ = GET_TCGV_I64(val);
 140     *gen_opparam_ptr++ = GET_TCGV_I32(addr);
 141     *gen_opparam_ptr++ = mem_index;
 142 }
 143
 144 static inline void tcg_gen_qemu_ldst_op_i64_i64(int opc, TCGv_i64 val, TCGv_i64 addr,
 145                                                 TCGArg mem_index)
 146 {
 147     *gen_opc_ptr++ = opc;
 148     *gen_opparam_ptr++ = GET_TCGV_I64(val);
 149     *gen_opparam_ptr++ = GET_TCGV_I64(addr);
 150     *gen_opparam_ptr++ = mem_index;
 151 }
 152
 153 static inline void tcg_gen_op4_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 154                                    TCGv_i32 arg3, TCGv_i32 arg4)
 155 {
 156     *gen_opc_ptr++ = opc;
 157     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 158     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 159     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 160     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 161 }
 162
 163 static inline void tcg_gen_op4_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 164                                    TCGv_i64 arg3, TCGv_i64 arg4)
 165 {
 166     *gen_opc_ptr++ = opc;
 167     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 168     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 169     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 170     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 171 }
 172
 173 static inline void tcg_gen_op4i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 174                                     TCGv_i32 arg3, TCGArg arg4)
 175 {
 176     *gen_opc_ptr++ = opc;
 177     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 178     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 179     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 180     *gen_opparam_ptr++ = arg4;
 181 }
 182
 183 static inline void tcg_gen_op4i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 184                                     TCGv_i64 arg3, TCGArg arg4)
 185 {
 186     *gen_opc_ptr++ = opc;
 187     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 188     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 189     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 190     *gen_opparam_ptr++ = arg4;
 191 }
 192
 193 static inline void tcg_gen_op4ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 194                                      TCGArg arg3, TCGArg arg4)
 195 {
 196     *gen_opc_ptr++ = opc;
 197     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 198     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 199     *gen_opparam_ptr++ = arg3;
 200     *gen_opparam_ptr++ = arg4;
 201 }
 202
 203 static inline void tcg_gen_op4ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 204                                      TCGArg arg3, TCGArg arg4)
 205 {
 206     *gen_opc_ptr++ = opc;
 207     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 208     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 209     *gen_opparam_ptr++ = arg3;
 210     *gen_opparam_ptr++ = arg4;
 211 }
 212
 213 static inline void tcg_gen_op5_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 214                                    TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5)
 215 {
 216     *gen_opc_ptr++ = opc;
 217     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 218     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 219     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 220     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 221     *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
 222 }
 223
 224 static inline void tcg_gen_op5_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 225                                    TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5)
 226 {
 227     *gen_opc_ptr++ = opc;
 228     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 229     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 230     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 231     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 232     *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
 233 }
 234
 235 static inline void tcg_gen_op5i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 236                                     TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5)
 237 {
 238     *gen_opc_ptr++ = opc;
 239     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 240     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 241     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 242     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 243     *gen_opparam_ptr++ = arg5;
 244 }
 245
 246 static inline void tcg_gen_op5i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 247                                     TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5)
 248 {
 249     *gen_opc_ptr++ = opc;
 250     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 251     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 252     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 253     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 254     *gen_opparam_ptr++ = arg5;
 255 }
 256
 257 static inline void tcg_gen_op6_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 258                                    TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5,
 259                                    TCGv_i32 arg6)
 260 {
 261     *gen_opc_ptr++ = opc;
 262     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 263     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 264     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 265     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 266     *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
 267     *gen_opparam_ptr++ = GET_TCGV_I32(arg6);
 268 }
 269
 270 static inline void tcg_gen_op6_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 271                                    TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5,
 272                                    TCGv_i64 arg6)
 273 {
 274     *gen_opc_ptr++ = opc;
 275     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 276     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 277     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 278     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 279     *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
 280     *gen_opparam_ptr++ = GET_TCGV_I64(arg6);
 281 }
 282
 283 static inline void tcg_gen_op6i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 284                                     TCGv_i32 arg3, TCGv_i32 arg4,
 285                                     TCGv_i32 arg5, TCGArg arg6)
 286 {
 287     *gen_opc_ptr++ = opc;
 288     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 289     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 290     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 291     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 292     *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
 293     *gen_opparam_ptr++ = arg6;
 294 }
 295
 296 static inline void tcg_gen_op6i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 297                                     TCGv_i64 arg3, TCGv_i64 arg4,
 298                                     TCGv_i64 arg5, TCGArg arg6)
 299 {
 300     *gen_opc_ptr++ = opc;
 301     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 302     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 303     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 304     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 305     *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
 306     *gen_opparam_ptr++ = arg6;
 307 }
 308
 309 static inline void tcg_gen_op6ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 310                                      TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5,
 311                                      TCGArg arg6)
 312 {
 313     *gen_opc_ptr++ = opc;
 314     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 315     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 316     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 317     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 318     *gen_opparam_ptr++ = arg5;
 319     *gen_opparam_ptr++ = arg6;
 320 }
 321
 322 static inline void tcg_gen_op6ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 323                                      TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5,
 324                                      TCGArg arg6)
 325 {
 326     *gen_opc_ptr++ = opc;
 327     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 328     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 329     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 330     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 331     *gen_opparam_ptr++ = arg5;
 332     *gen_opparam_ptr++ = arg6;
 333 }
 334
 335 static inline void gen_set_label(int n)
 336 {
 337     tcg_gen_op1i(INDEX_op_set_label, n);
 338 }
 339
 340 static inline void tcg_gen_br(int label)
 341 {
 342     tcg_gen_op1i(INDEX_op_br, label);
 343 }
 344
 345 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
 346 {
 347     if (!TCGV_EQUAL_I32(ret, arg))
 348         tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
 349 }
 350
 351 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
 352 {
 353     tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
 354 }
 355
 356 /* helper calls */
 357 static inline void tcg_gen_helperN(void *func, int flags, int sizemask,
 358                                    TCGArg ret, int nargs, TCGArg *args)
 359 {
 360     TCGv_ptr fn;
 361     fn = tcg_const_ptr((tcg_target_long)func);
 362     tcg_gen_callN(&tcg_ctx, fn, flags, sizemask, ret,
 363                   nargs, args);
 364     tcg_temp_free_ptr(fn);
 365 }
 366
 367 /* FIXME: Should this be pure?  */
 368 static inline void tcg_gen_helper32(void *func, TCGv_i32 ret,
 369                                     TCGv_i32 a, TCGv_i32 b)
 370 {
 371     TCGv_ptr fn;
 372     TCGArg args[2];
 373     fn = tcg_const_ptr((tcg_target_long)func);
 374     args[0] = GET_TCGV_I32(a);
 375     args[1] = GET_TCGV_I32(b);
 376     tcg_gen_callN(&tcg_ctx, fn, 0, 0, GET_TCGV_I32(ret), 2, args);
 377     tcg_temp_free_ptr(fn);
 378 }
 379
 380 /* FIXME: Should this be pure?  */
 381 static inline void tcg_gen_helper64(void *func, TCGv_i64 ret,
 382                                     TCGv_i64 a, TCGv_i64 b)
 383 {
 384     TCGv_ptr fn;
 385     TCGArg args[2];
 386     fn = tcg_const_ptr((tcg_target_long)func);
 387     args[0] = GET_TCGV_I64(a);
 388     args[1] = GET_TCGV_I64(b);
 389     tcg_gen_callN(&tcg_ctx, fn, 0, 7, GET_TCGV_I64(ret), 2, args);
 390     tcg_temp_free_ptr(fn);
 391 }
 392
 393 /* 32 bit ops */
 394
 395 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 396 {
 397     tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
 398 }
 399
 400 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 401 {
 402     tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
 403 }
 404
 405 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 406 {
 407     tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
 408 }
 409
 410 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 411 {
 412     tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
 413 }
 414
 415 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 416 {
 417     tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
 418 }
 419
 420 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
 421 {
 422     tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
 423 }
 424
 425 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
 426 {
 427     tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
 428 }
 429
 430 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
 431 {
 432     tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
 433 }
 434
 435 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 436 {
 437     tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
 438 }
 439
 440 static inline void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 441 {
 442     /* some cases can be optimized here */
 443     if (arg2 == 0) {
 444         tcg_gen_mov_i32(ret, arg1);
 445     } else {
 446         TCGv_i32 t0 = tcg_const_i32(arg2);
 447         tcg_gen_add_i32(ret, arg1, t0);
 448         tcg_temp_free_i32(t0);
 449     }
 450 }
 451
 452 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 453 {
 454     tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
 455 }
 456
 457 static inline void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2)
 458 {
 459     TCGv_i32 t0 = tcg_const_i32(arg1);
 460     tcg_gen_sub_i32(ret, t0, arg2);
 461     tcg_temp_free_i32(t0);
 462 }
 463
 464 static inline void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 465 {
 466     /* some cases can be optimized here */
 467     if (arg2 == 0) {
 468         tcg_gen_mov_i32(ret, arg1);
 469     } else {
 470         TCGv_i32 t0 = tcg_const_i32(arg2);
 471         tcg_gen_sub_i32(ret, arg1, t0);
 472         tcg_temp_free_i32(t0);
 473     }
 474 }
 475
 476 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 477 {
 478     if (TCGV_EQUAL_I32(arg1, arg2)) {
 479         tcg_gen_mov_i32(ret, arg1);
 480     } else {
 481         tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
 482     }
 483 }
 484
 485 static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 486 {
 487     /* some cases can be optimized here */
 488     if (arg2 == 0) {
 489         tcg_gen_movi_i32(ret, 0);
 490     } else if (arg2 == 0xffffffff) {
 491         tcg_gen_mov_i32(ret, arg1);
 492     } else {
 493         TCGv_i32 t0 = tcg_const_i32(arg2);
 494         tcg_gen_and_i32(ret, arg1, t0);
 495         tcg_temp_free_i32(t0);
 496     }
 497 }
 498
 499 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 500 {
 501     if (TCGV_EQUAL_I32(arg1, arg2)) {
 502         tcg_gen_mov_i32(ret, arg1);
 503     } else {
 504         tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
 505     }
 506 }
 507
 508 static inline void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 509 {
 510     /* some cases can be optimized here */
 511     if (arg2 == 0xffffffff) {
 512         tcg_gen_movi_i32(ret, 0xffffffff);
 513     } else if (arg2 == 0) {
 514         tcg_gen_mov_i32(ret, arg1);
 515     } else {
 516         TCGv_i32 t0 = tcg_const_i32(arg2);
 517         tcg_gen_or_i32(ret, arg1, t0);
 518         tcg_temp_free_i32(t0);
 519     }
 520 }
 521
 522 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 523 {
 524     if (TCGV_EQUAL_I32(arg1, arg2)) {
 525         tcg_gen_movi_i32(ret, 0);
 526     } else {
 527         tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
 528     }
 529 }
 530
 531 static inline void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 532 {
 533     /* some cases can be optimized here */
 534     if (arg2 == 0) {
 535         tcg_gen_mov_i32(ret, arg1);
 536     } else {
 537         TCGv_i32 t0 = tcg_const_i32(arg2);
 538         tcg_gen_xor_i32(ret, arg1, t0);
 539         tcg_temp_free_i32(t0);
 540     }
 541 }
 542
 543 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 544 {
 545     tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
 546 }
 547
 548 static inline void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 549 {
 550     if (arg2 == 0) {
 551         tcg_gen_mov_i32(ret, arg1);
 552     } else {
 553         TCGv_i32 t0 = tcg_const_i32(arg2);
 554         tcg_gen_shl_i32(ret, arg1, t0);
 555         tcg_temp_free_i32(t0);
 556     }
 557 }
 558
 559 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 560 {
 561     tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
 562 }
 563
 564 static inline void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 565 {
 566     if (arg2 == 0) {
 567         tcg_gen_mov_i32(ret, arg1);
 568     } else {
 569         TCGv_i32 t0 = tcg_const_i32(arg2);
 570         tcg_gen_shr_i32(ret, arg1, t0);
 571         tcg_temp_free_i32(t0);
 572     }
 573 }
 574
 575 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 576 {
 577     tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
 578 }
 579
 580 static inline void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 581 {
 582     if (arg2 == 0) {
 583         tcg_gen_mov_i32(ret, arg1);
 584     } else {
 585         TCGv_i32 t0 = tcg_const_i32(arg2);
 586         tcg_gen_sar_i32(ret, arg1, t0);
 587         tcg_temp_free_i32(t0);
 588     }
 589 }
 590
 591 static inline void tcg_gen_brcond_i32(int cond, TCGv_i32 arg1, TCGv_i32 arg2,
 592                                       int label_index)
 593 {
 594     tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
 595 }
 596
 597 static inline void tcg_gen_brcondi_i32(int cond, TCGv_i32 arg1, int32_t arg2,
 598                                        int label_index)
 599 {
 600     TCGv_i32 t0 = tcg_const_i32(arg2);
 601     tcg_gen_brcond_i32(cond, arg1, t0, label_index);
 602     tcg_temp_free_i32(t0);
 603 }
 604
 605 static inline void tcg_gen_setcond_i32(int cond, TCGv_i32 ret,
 606                                        TCGv_i32 arg1, TCGv_i32 arg2)
 607 {
 608     tcg_gen_op4i_i32(INDEX_op_setcond_i32, ret, arg1, arg2, cond);
 609 }
 610
 611 static inline void tcg_gen_setcondi_i32(int cond, TCGv_i32 ret, TCGv_i32 arg1,
 612                                         int32_t arg2)
 613 {
 614     TCGv_i32 t0 = tcg_const_i32(arg2);
 615     tcg_gen_setcond_i32(cond, ret, arg1, t0);
 616     tcg_temp_free_i32(t0);
 617 }
 618
 619 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 620 {
 621     tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
 622 }
 623
 624 static inline void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 625 {
 626     TCGv_i32 t0 = tcg_const_i32(arg2);
 627     tcg_gen_mul_i32(ret, arg1, t0);
 628     tcg_temp_free_i32(t0);
 629 }
 630
 631 #ifdef TCG_TARGET_HAS_div_i32
 632 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 633 {
 634     tcg_gen_op3_i32(INDEX_op_div_i32, ret, arg1, arg2);
 635 }
 636
 637 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 638 {
 639     tcg_gen_op3_i32(INDEX_op_rem_i32, ret, arg1, arg2);
 640 }
 641
 642 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 643 {
 644     tcg_gen_op3_i32(INDEX_op_divu_i32, ret, arg1, arg2);
 645 }
 646
 647 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 648 {
 649     tcg_gen_op3_i32(INDEX_op_remu_i32, ret, arg1, arg2);
 650 }
 651 #elif defined(TCG_TARGET_HAS_div2_i32)
 652 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 653 {
 654     TCGv_i32 t0;
 655     t0 = tcg_temp_new_i32();
 656     tcg_gen_sari_i32(t0, arg1, 31);
 657     tcg_gen_op5_i32(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2);
 658     tcg_temp_free_i32(t0);
 659 }
 660
 661 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 662 {
 663     TCGv_i32 t0;
 664     t0 = tcg_temp_new_i32();
 665     tcg_gen_sari_i32(t0, arg1, 31);
 666     tcg_gen_op5_i32(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2);
 667     tcg_temp_free_i32(t0);
 668 }
 669
 670 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 671 {
 672     TCGv_i32 t0;
 673     t0 = tcg_temp_new_i32();
 674     tcg_gen_movi_i32(t0, 0);
 675     tcg_gen_op5_i32(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2);
 676     tcg_temp_free_i32(t0);
 677 }
 678
 679 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 680 {
 681     TCGv_i32 t0;
 682     t0 = tcg_temp_new_i32();
 683     tcg_gen_movi_i32(t0, 0);
 684     tcg_gen_op5_i32(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2);
 685     tcg_temp_free_i32(t0);
 686 }
 687 #else
 688 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 689 {
 690     tcg_gen_helper32(tcg_helper_div_i32, ret, arg1, arg2);
 691 }
 692
 693 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 694 {
 695     tcg_gen_helper32(tcg_helper_rem_i32, ret, arg1, arg2);
 696 }
 697
 698 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 699 {
 700     tcg_gen_helper32(tcg_helper_divu_i32, ret, arg1, arg2);
 701 }
 702
 703 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 704 {
 705     tcg_gen_helper32(tcg_helper_remu_i32, ret, arg1, arg2);
 706 }
 707 #endif
 708
 709 #if TCG_TARGET_REG_BITS == 32
 710
 711 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 712 {
 713     if (!TCGV_EQUAL_I64(ret, arg)) {
 714         tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
 715         tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
 716     }
 717 }
 718
 719 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 720 {
 721     tcg_gen_movi_i32(TCGV_LOW(ret), arg);
 722     tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
 723 }
 724
 725 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 726                                     tcg_target_long offset)
 727 {
 728     tcg_gen_ld8u_i32(TCGV_LOW(ret), arg2, offset);
 729     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
 730 }
 731
 732 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 733                                     tcg_target_long offset)
 734 {
 735     tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset);
 736     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), 31);
 737 }
 738
 739 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 740                                      tcg_target_long offset)
 741 {
 742     tcg_gen_ld16u_i32(TCGV_LOW(ret), arg2, offset);
 743     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
 744 }
 745
 746 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 747                                      tcg_target_long offset)
 748 {
 749     tcg_gen_ld16s_i32(TCGV_LOW(ret), arg2, offset);
 750     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
 751 }
 752
 753 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 754                                      tcg_target_long offset)
 755 {
 756     tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
 757     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
 758 }
 759
 760 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 761                                      tcg_target_long offset)
 762 {
 763     tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
 764     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
 765 }
 766
 767 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
 768                                   tcg_target_long offset)
 769 {
 770     /* since arg2 and ret have different types, they cannot be the
 771        same temporary */
 772 #ifdef TCG_TARGET_WORDS_BIGENDIAN
 773     tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
 774     tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4);
 775 #else
 776     tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
 777     tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
 778 #endif
 779 }
 780
 781 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 782                                    tcg_target_long offset)
 783 {
 784     tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
 785 }
 786
 787 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 788                                     tcg_target_long offset)
 789 {
 790     tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
 791 }
 792
 793 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 794                                     tcg_target_long offset)
 795 {
 796     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 797 }
 798
 799 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 800                                   tcg_target_long offset)
 801 {
 802 #ifdef TCG_TARGET_WORDS_BIGENDIAN
 803     tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset);
 804     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4);
 805 #else
 806     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 807     tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
 808 #endif
 809 }
 810
 811 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 812 {
 813     tcg_gen_op6_i32(INDEX_op_add2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
 814                     TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
 815                     TCGV_HIGH(arg2));
 816 }
 817
 818 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 819 {
 820     tcg_gen_op6_i32(INDEX_op_sub2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
 821                     TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
 822                     TCGV_HIGH(arg2));
 823 }
 824
 825 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 826 {
 827     tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
 828     tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
 829 }
 830
 831 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 832 {
 833     tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
 834     tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
 835 }
 836
 837 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 838 {
 839     tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
 840     tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
 841 }
 842
 843 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 844 {
 845     tcg_gen_ori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
 846     tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
 847 }
 848
 849 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 850 {
 851     tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
 852     tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
 853 }
 854
 855 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 856 {
 857     tcg_gen_xori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
 858     tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
 859 }
 860
 861 /* XXX: use generic code when basic block handling is OK or CPU
 862    specific code (x86) */
 863 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 864 {
 865     tcg_gen_helper64(tcg_helper_shl_i64, ret, arg1, arg2);
 866 }
 867
 868 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 869 {
 870     tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0);
 871 }
 872
 873 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 874 {
 875     tcg_gen_helper64(tcg_helper_shr_i64, ret, arg1, arg2);
 876 }
 877
 878 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 879 {
 880     tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0);
 881 }
 882
 883 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 884 {
 885     tcg_gen_helper64(tcg_helper_sar_i64, ret, arg1, arg2);
 886 }
 887
 888 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 889 {
 890     tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1);
 891 }
 892
 893 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
 894                                       int label_index)
 895 {
 896     tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
 897                       TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
 898                       TCGV_HIGH(arg2), cond, label_index);
 899 }
 900
 901 static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret,
 902                                        TCGv_i64 arg1, TCGv_i64 arg2)
 903 {
 904     tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret),
 905                      TCGV_LOW(arg1), TCGV_HIGH(arg1),
 906                      TCGV_LOW(arg2), TCGV_HIGH(arg2), cond);
 907     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
 908 }
 909
 910 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 911 {
 912     TCGv_i64 t0;
 913     TCGv_i32 t1;
 914
 915     t0 = tcg_temp_new_i64();
 916     t1 = tcg_temp_new_i32();
 917
 918     tcg_gen_op4_i32(INDEX_op_mulu2_i32, TCGV_LOW(t0), TCGV_HIGH(t0),
 919                     TCGV_LOW(arg1), TCGV_LOW(arg2));
 920
 921     tcg_gen_mul_i32(t1, TCGV_LOW(arg1), TCGV_HIGH(arg2));
 922     tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
 923     tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), TCGV_LOW(arg2));
 924     tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
 925
 926     tcg_gen_mov_i64(ret, t0);
 927     tcg_temp_free_i64(t0);
 928     tcg_temp_free_i32(t1);
 929 }
 930
 931 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 932 {
 933     tcg_gen_helper64(tcg_helper_div_i64, ret, arg1, arg2);
 934 }
 935
 936 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 937 {
 938     tcg_gen_helper64(tcg_helper_rem_i64, ret, arg1, arg2);
 939 }
 940
 941 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 942 {
 943     tcg_gen_helper64(tcg_helper_divu_i64, ret, arg1, arg2);
 944 }
 945
 946 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 947 {
 948     tcg_gen_helper64(tcg_helper_remu_i64, ret, arg1, arg2);
 949 }
 950
 951 #else
 952
 953 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 954 {
 955     if (!TCGV_EQUAL_I64(ret, arg))
 956         tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
 957 }
 958
 959 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 960 {
 961     tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
 962 }
 963
 964 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_i64 arg2,
 965                                     tcg_target_long offset)
 966 {
 967     tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
 968 }
 969
 970 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_i64 arg2,
 971                                     tcg_target_long offset)
 972 {
 973     tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
 974 }
 975
 976 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_i64 arg2,
 977                                      tcg_target_long offset)
 978 {
 979     tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
 980 }
 981
 982 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_i64 arg2,
 983                                      tcg_target_long offset)
 984 {
 985     tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
 986 }
 987
 988 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_i64 arg2,
 989                                      tcg_target_long offset)
 990 {
 991     tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
 992 }
 993
 994 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_i64 arg2,
 995                                      tcg_target_long offset)
 996 {
 997     tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
 998 }
 999
1000 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_i64 arg2, tcg_target_long offset)
1001 {
1002     tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
1003 }
1004
1005 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_i64 arg2,
1006                                    tcg_target_long offset)
1007 {
1008     tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
1009 }
1010
1011 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_i64 arg2,
1012                                     tcg_target_long offset)
1013 {
1014     tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
1015 }
1016
1017 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_i64 arg2,
1018                                     tcg_target_long offset)
1019 {
1020     tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
1021 }
1022
1023 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_i64 arg2, tcg_target_long offset)
1024 {
1025     tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
1026 }
1027
1028 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1029 {
1030     tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
1031 }
1032
1033 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1034 {
1035     tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
1036 }
1037
1038 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1039 {
1040     if (TCGV_EQUAL_I64(arg1, arg2)) {
1041         tcg_gen_mov_i64(ret, arg1);
1042     } else {
1043         tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
1044     }
1045 }
1046
1047 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1048 {
1049     TCGv_i64 t0 = tcg_const_i64(arg2);
1050     tcg_gen_and_i64(ret, arg1, t0);
1051     tcg_temp_free_i64(t0);
1052 }
1053
1054 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1055 {
1056     if (TCGV_EQUAL_I64(arg1, arg2)) {
1057         tcg_gen_mov_i64(ret, arg1);
1058     } else {
1059         tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
1060     }
1061 }
1062
1063 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1064 {
1065     TCGv_i64 t0 = tcg_const_i64(arg2);
1066     tcg_gen_or_i64(ret, arg1, t0);
1067     tcg_temp_free_i64(t0);
1068 }
1069
1070 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1071 {
1072     if (TCGV_EQUAL_I64(arg1, arg2)) {
1073         tcg_gen_movi_i64(ret, 0);
1074     } else {
1075         tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
1076     }
1077 }
1078
1079 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1080 {
1081     TCGv_i64 t0 = tcg_const_i64(arg2);
1082     tcg_gen_xor_i64(ret, arg1, t0);
1083     tcg_temp_free_i64(t0);
1084 }
1085
1086 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1087 {
1088     tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
1089 }
1090
1091 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1092 {
1093     if (arg2 == 0) {
1094         tcg_gen_mov_i64(ret, arg1);
1095     } else {
1096         TCGv_i64 t0 = tcg_const_i64(arg2);
1097         tcg_gen_shl_i64(ret, arg1, t0);
1098         tcg_temp_free_i64(t0);
1099     }
1100 }
1101
1102 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1103 {
1104     tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
1105 }
1106
1107 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1108 {
1109     if (arg2 == 0) {
1110         tcg_gen_mov_i64(ret, arg1);
1111     } else {
1112         TCGv_i64 t0 = tcg_const_i64(arg2);
1113         tcg_gen_shr_i64(ret, arg1, t0);
1114         tcg_temp_free_i64(t0);
1115     }
1116 }
1117
1118 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1119 {
1120     tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
1121 }
1122
1123 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1124 {
1125     if (arg2 == 0) {
1126         tcg_gen_mov_i64(ret, arg1);
1127     } else {
1128         TCGv_i64 t0 = tcg_const_i64(arg2);
1129         tcg_gen_sar_i64(ret, arg1, t0);
1130         tcg_temp_free_i64(t0);
1131     }
1132 }
1133
1134 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
1135                                       int label_index)
1136 {
1137     tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, label_index);
1138 }
1139
1140 static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret,
1141                                        TCGv_i64 arg1, TCGv_i64 arg2)
1142 {
1143     tcg_gen_op4i_i64(INDEX_op_setcond_i64, ret, arg1, arg2, cond);
1144 }
1145
1146 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1147 {
1148     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
1149 }
1150
1151 #ifdef TCG_TARGET_HAS_div_i64
1152 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1153 {
1154     tcg_gen_op3_i64(INDEX_op_div_i64, ret, arg1, arg2);
1155 }
1156
1157 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1158 {
1159     tcg_gen_op3_i64(INDEX_op_rem_i64, ret, arg1, arg2);
1160 }
1161
1162 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1163 {
1164     tcg_gen_op3_i64(INDEX_op_divu_i64, ret, arg1, arg2);
1165 }
1166
1167 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1168 {
1169     tcg_gen_op3_i64(INDEX_op_remu_i64, ret, arg1, arg2);
1170 }
1171 #elif defined(TCG_TARGET_HAS_div2_i64)
1172 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1173 {
1174     TCGv_i64 t0;
1175     t0 = tcg_temp_new_i64();
1176     tcg_gen_sari_i64(t0, arg1, 63);
1177     tcg_gen_op5_i64(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2);
1178     tcg_temp_free_i64(t0);
1179 }
1180
1181 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1182 {
1183     TCGv_i64 t0;
1184     t0 = tcg_temp_new_i64();
1185     tcg_gen_sari_i64(t0, arg1, 63);
1186     tcg_gen_op5_i64(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2);
1187     tcg_temp_free_i64(t0);
1188 }
1189
1190 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1191 {
1192     TCGv_i64 t0;
1193     t0 = tcg_temp_new_i64();
1194     tcg_gen_movi_i64(t0, 0);
1195     tcg_gen_op5_i64(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2);
1196     tcg_temp_free_i64(t0);
1197 }
1198
1199 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1200 {
1201     TCGv_i64 t0;
1202     t0 = tcg_temp_new_i64();
1203     tcg_gen_movi_i64(t0, 0);
1204     tcg_gen_op5_i64(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2);
1205     tcg_temp_free_i64(t0);
1206 }
1207 #else
1208 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1209 {
1210     tcg_gen_helper64(tcg_helper_div_i64, ret, arg1, arg2);
1211 }
1212
1213 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1214 {
1215     tcg_gen_helper64(tcg_helper_rem_i64, ret, arg1, arg2);
1216 }
1217
1218 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1219 {
1220     tcg_gen_helper64(tcg_helper_divu_i64, ret, arg1, arg2);
1221 }
1222
1223 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1224 {
1225     tcg_gen_helper64(tcg_helper_remu_i64, ret, arg1, arg2);
1226 }
1227 #endif
1228
1229 #endif
1230
1231 static inline void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1232 {
1233     /* some cases can be optimized here */
1234     if (arg2 == 0) {
1235         tcg_gen_mov_i64(ret, arg1);
1236     } else {
1237         TCGv_i64 t0 = tcg_const_i64(arg2);
1238         tcg_gen_add_i64(ret, arg1, t0);
1239         tcg_temp_free_i64(t0);
1240     }
1241 }
1242
1243 static inline void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2)
1244 {
1245     TCGv_i64 t0 = tcg_const_i64(arg1);
1246     tcg_gen_sub_i64(ret, t0, arg2);
1247     tcg_temp_free_i64(t0);
1248 }
1249
1250 static inline void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1251 {
1252     /* some cases can be optimized here */
1253     if (arg2 == 0) {
1254         tcg_gen_mov_i64(ret, arg1);
1255     } else {
1256         TCGv_i64 t0 = tcg_const_i64(arg2);
1257         tcg_gen_sub_i64(ret, arg1, t0);
1258         tcg_temp_free_i64(t0);
1259     }
1260 }
1261 static inline void tcg_gen_brcondi_i64(int cond, TCGv_i64 arg1, int64_t arg2,
1262                                        int label_index)
1263 {
1264     TCGv_i64 t0 = tcg_const_i64(arg2);
1265     tcg_gen_brcond_i64(cond, arg1, t0, label_index);
1266     tcg_temp_free_i64(t0);
1267 }
1268
1269 static inline void tcg_gen_setcondi_i64(int cond, TCGv_i64 ret, TCGv_i64 arg1,
1270                                         int64_t arg2)
1271 {
1272     TCGv_i64 t0 = tcg_const_i64(arg2);
1273     tcg_gen_setcond_i64(cond, ret, arg1, t0);
1274     tcg_temp_free_i64(t0);
1275 }
1276
1277 static inline void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1278 {
1279     TCGv_i64 t0 = tcg_const_i64(arg2);
1280     tcg_gen_mul_i64(ret, arg1, t0);
1281     tcg_temp_free_i64(t0);
1282 }
1283
1284
1285 /***************************************/
1286 /* optional operations */
1287
1288 static inline void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg)
1289 {
1290 #ifdef TCG_TARGET_HAS_ext8s_i32
1291     tcg_gen_op2_i32(INDEX_op_ext8s_i32, ret, arg);
1292 #else
1293     tcg_gen_shli_i32(ret, arg, 24);
1294     tcg_gen_sari_i32(ret, ret, 24);
1295 #endif
1296 }
1297
1298 static inline void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg)
1299 {
1300 #ifdef TCG_TARGET_HAS_ext16s_i32
1301     tcg_gen_op2_i32(INDEX_op_ext16s_i32, ret, arg);
1302 #else
1303     tcg_gen_shli_i32(ret, arg, 16);
1304     tcg_gen_sari_i32(ret, ret, 16);
1305 #endif
1306 }
1307
1308 static inline void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg)
1309 {
1310 #ifdef TCG_TARGET_HAS_ext8u_i32
1311     tcg_gen_op2_i32(INDEX_op_ext8u_i32, ret, arg);
1312 #else
1313     tcg_gen_andi_i32(ret, arg, 0xffu);
1314 #endif
1315 }
1316
1317 static inline void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg)
1318 {
1319 #ifdef TCG_TARGET_HAS_ext16u_i32
1320     tcg_gen_op2_i32(INDEX_op_ext16u_i32, ret, arg);
1321 #else
1322     tcg_gen_andi_i32(ret, arg, 0xffffu);
1323 #endif
1324 }
1325
1326 /* Note: we assume the two high bytes are set to zero */
1327 static inline void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg)
1328 {
1329 #ifdef TCG_TARGET_HAS_bswap16_i32
1330     tcg_gen_op2_i32(INDEX_op_bswap16_i32, ret, arg);
1331 #else
1332     TCGv_i32 t0 = tcg_temp_new_i32();
1333
1334     tcg_gen_ext8u_i32(t0, arg);
1335     tcg_gen_shli_i32(t0, t0, 8);
1336     tcg_gen_shri_i32(ret, arg, 8);
1337     tcg_gen_or_i32(ret, ret, t0);
1338     tcg_temp_free_i32(t0);
1339 #endif
1340 }
1341
1342 static inline void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg)
1343 {
1344 #ifdef TCG_TARGET_HAS_bswap32_i32
1345     tcg_gen_op2_i32(INDEX_op_bswap32_i32, ret, arg);
1346 #else
1347     TCGv_i32 t0, t1;
1348     t0 = tcg_temp_new_i32();
1349     t1 = tcg_temp_new_i32();
1350
1351     tcg_gen_shli_i32(t0, arg, 24);
1352
1353     tcg_gen_andi_i32(t1, arg, 0x0000ff00);
1354     tcg_gen_shli_i32(t1, t1, 8);
1355     tcg_gen_or_i32(t0, t0, t1);
1356
1357     tcg_gen_shri_i32(t1, arg, 8);
1358     tcg_gen_andi_i32(t1, t1, 0x0000ff00);
1359     tcg_gen_or_i32(t0, t0, t1);
1360
1361     tcg_gen_shri_i32(t1, arg, 24);
1362     tcg_gen_or_i32(ret, t0, t1);
1363     tcg_temp_free_i32(t0);
1364     tcg_temp_free_i32(t1);
1365 #endif
1366 }
1367
1368 #if TCG_TARGET_REG_BITS == 32
1369 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
1370 {
1371     tcg_gen_ext8s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1372     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1373 }
1374
1375 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
1376 {
1377     tcg_gen_ext16s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1378     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1379 }
1380
1381 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
1382 {
1383     tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1384     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1385 }
1386
1387 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
1388 {
1389     tcg_gen_ext8u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1390     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1391 }
1392
1393 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
1394 {
1395     tcg_gen_ext16u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1396     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1397 }
1398
1399 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
1400 {
1401     tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1402     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1403 }
1404
1405 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
1406 {
1407     tcg_gen_mov_i32(ret, TCGV_LOW(arg));
1408 }
1409
1410 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1411 {
1412     tcg_gen_mov_i32(TCGV_LOW(ret), arg);
1413     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1414 }
1415
1416 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1417 {
1418     tcg_gen_mov_i32(TCGV_LOW(ret), arg);
1419     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1420 }
1421
1422 /* Note: we assume the six high bytes are set to zero */
1423 static inline void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg)
1424 {
1425     tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
1426     tcg_gen_bswap16_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1427 }
1428
1429 /* Note: we assume the four high bytes are set to zero */
1430 static inline void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg)
1431 {
1432     tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
1433     tcg_gen_bswap32_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1434 }
1435
1436 static inline void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg)
1437 {
1438     TCGv_i32 t0, t1;
1439     t0 = tcg_temp_new_i32();
1440     t1 = tcg_temp_new_i32();
1441
1442     tcg_gen_bswap32_i32(t0, TCGV_LOW(arg));
1443     tcg_gen_bswap32_i32(t1, TCGV_HIGH(arg));
1444     tcg_gen_mov_i32(TCGV_LOW(ret), t1);
1445     tcg_gen_mov_i32(TCGV_HIGH(ret), t0);
1446     tcg_temp_free_i32(t0);
1447     tcg_temp_free_i32(t1);
1448 }
1449 #else
1450
1451 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
1452 {
1453 #ifdef TCG_TARGET_HAS_ext8s_i64
1454     tcg_gen_op2_i64(INDEX_op_ext8s_i64, ret, arg);
1455 #else
1456     tcg_gen_shli_i64(ret, arg, 56);
1457     tcg_gen_sari_i64(ret, ret, 56);
1458 #endif
1459 }
1460
1461 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
1462 {
1463 #ifdef TCG_TARGET_HAS_ext16s_i64
1464     tcg_gen_op2_i64(INDEX_op_ext16s_i64, ret, arg);
1465 #else
1466     tcg_gen_shli_i64(ret, arg, 48);
1467     tcg_gen_sari_i64(ret, ret, 48);
1468 #endif
1469 }
1470
1471 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
1472 {
1473 #ifdef TCG_TARGET_HAS_ext32s_i64
1474     tcg_gen_op2_i64(INDEX_op_ext32s_i64, ret, arg);
1475 #else
1476     tcg_gen_shli_i64(ret, arg, 32);
1477     tcg_gen_sari_i64(ret, ret, 32);
1478 #endif
1479 }
1480
1481 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
1482 {
1483 #ifdef TCG_TARGET_HAS_ext8u_i64
1484     tcg_gen_op2_i64(INDEX_op_ext8u_i64, ret, arg);
1485 #else
1486     tcg_gen_andi_i64(ret, arg, 0xffu);
1487 #endif
1488 }
1489
1490 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
1491 {
1492 #ifdef TCG_TARGET_HAS_ext16u_i64
1493     tcg_gen_op2_i64(INDEX_op_ext16u_i64, ret, arg);
1494 #else
1495     tcg_gen_andi_i64(ret, arg, 0xffffu);
1496 #endif
1497 }
1498
1499 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
1500 {
1501 #ifdef TCG_TARGET_HAS_ext32u_i64
1502     tcg_gen_op2_i64(INDEX_op_ext32u_i64, ret, arg);
1503 #else
1504     tcg_gen_andi_i64(ret, arg, 0xffffffffu);
1505 #endif
1506 }
1507
1508 /* Note: we assume the target supports move between 32 and 64 bit
1509    registers.  This will probably break MIPS64 targets.  */
1510 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
1511 {
1512     tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(arg)));
1513 }
1514
1515 /* Note: we assume the target supports move between 32 and 64 bit
1516    registers */
1517 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1518 {
1519     tcg_gen_ext32u_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)));
1520 }
1521
1522 /* Note: we assume the target supports move between 32 and 64 bit
1523    registers */
1524 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1525 {
1526     tcg_gen_ext32s_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)));
1527 }
1528
1529 /* Note: we assume the six high bytes are set to zero */
1530 static inline void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg)
1531 {
1532 #ifdef TCG_TARGET_HAS_bswap16_i64
1533     tcg_gen_op2_i64(INDEX_op_bswap16_i64, ret, arg);
1534 #else
1535     TCGv_i64 t0 = tcg_temp_new_i64();
1536
1537     tcg_gen_ext8u_i64(t0, arg);
1538     tcg_gen_shli_i64(t0, t0, 8);
1539     tcg_gen_shri_i64(ret, arg, 8);
1540     tcg_gen_or_i64(ret, ret, t0);
1541     tcg_temp_free_i64(t0);
1542 #endif
1543 }
1544
1545 /* Note: we assume the four high bytes are set to zero */
1546 static inline void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg)
1547 {
1548 #ifdef TCG_TARGET_HAS_bswap32_i64
1549     tcg_gen_op2_i64(INDEX_op_bswap32_i64, ret, arg);
1550 #else
1551     TCGv_i64 t0, t1;
1552     t0 = tcg_temp_new_i64();
1553     t1 = tcg_temp_new_i64();
1554
1555     tcg_gen_shli_i64(t0, arg, 24);
1556     tcg_gen_ext32u_i64(t0, t0);
1557
1558     tcg_gen_andi_i64(t1, arg, 0x0000ff00);
1559     tcg_gen_shli_i64(t1, t1, 8);
1560     tcg_gen_or_i64(t0, t0, t1);
1561
1562     tcg_gen_shri_i64(t1, arg, 8);
1563     tcg_gen_andi_i64(t1, t1, 0x0000ff00);
1564     tcg_gen_or_i64(t0, t0, t1);
1565
1566     tcg_gen_shri_i64(t1, arg, 24);
1567     tcg_gen_or_i64(ret, t0, t1);
1568     tcg_temp_free_i64(t0);
1569     tcg_temp_free_i64(t1);
1570 #endif
1571 }
1572
1573 static inline void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg)
1574 {
1575 #ifdef TCG_TARGET_HAS_bswap64_i64
1576     tcg_gen_op2_i64(INDEX_op_bswap64_i64, ret, arg);
1577 #else
1578     TCGv_i64 t0 = tcg_temp_new_i64();
1579     TCGv_i64 t1 = tcg_temp_new_i64();
1580
1581     tcg_gen_shli_i64(t0, arg, 56);
1582
1583     tcg_gen_andi_i64(t1, arg, 0x0000ff00);
1584     tcg_gen_shli_i64(t1, t1, 40);
1585     tcg_gen_or_i64(t0, t0, t1);
1586
1587     tcg_gen_andi_i64(t1, arg, 0x00ff0000);
1588     tcg_gen_shli_i64(t1, t1, 24);
1589     tcg_gen_or_i64(t0, t0, t1);
1590
1591     tcg_gen_andi_i64(t1, arg, 0xff000000);
1592     tcg_gen_shli_i64(t1, t1, 8);
1593     tcg_gen_or_i64(t0, t0, t1);
1594
1595     tcg_gen_shri_i64(t1, arg, 8);
1596     tcg_gen_andi_i64(t1, t1, 0xff000000);
1597     tcg_gen_or_i64(t0, t0, t1);
1598
1599     tcg_gen_shri_i64(t1, arg, 24);
1600     tcg_gen_andi_i64(t1, t1, 0x00ff0000);
1601     tcg_gen_or_i64(t0, t0, t1);
1602
1603     tcg_gen_shri_i64(t1, arg, 40);
1604     tcg_gen_andi_i64(t1, t1, 0x0000ff00);
1605     tcg_gen_or_i64(t0, t0, t1);
1606
1607     tcg_gen_shri_i64(t1, arg, 56);
1608     tcg_gen_or_i64(ret, t0, t1);
1609     tcg_temp_free_i64(t0);
1610     tcg_temp_free_i64(t1);
1611 #endif
1612 }
1613
1614 #endif
1615
1616 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
1617 {
1618 #ifdef TCG_TARGET_HAS_neg_i32
1619     tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
1620 #else
1621     TCGv_i32 t0 = tcg_const_i32(0);
1622     tcg_gen_sub_i32(ret, t0, arg);
1623     tcg_temp_free_i32(t0);
1624 #endif
1625 }
1626
1627 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
1628 {
1629 #ifdef TCG_TARGET_HAS_neg_i64
1630     tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
1631 #else
1632     TCGv_i64 t0 = tcg_const_i64(0);
1633     tcg_gen_sub_i64(ret, t0, arg);
1634     tcg_temp_free_i64(t0);
1635 #endif
1636 }
1637
1638 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
1639 {
1640 #ifdef TCG_TARGET_HAS_not_i32
1641     tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
1642 #else
1643     tcg_gen_xori_i32(ret, arg, -1);
1644 #endif
1645 }
1646
1647 static inline void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg)
1648 {
1649 #ifdef TCG_TARGET_HAS_not_i64
1650     tcg_gen_op2_i64(INDEX_op_not_i64, ret, arg);
1651 #else
1652     tcg_gen_xori_i64(ret, arg, -1);
1653 #endif
1654 }
1655
1656 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
1657 {
1658     tcg_gen_op1_i32(INDEX_op_discard, arg);
1659 }
1660
1661 #if TCG_TARGET_REG_BITS == 32
1662 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
1663 {
1664     tcg_gen_discard_i32(TCGV_LOW(arg));
1665     tcg_gen_discard_i32(TCGV_HIGH(arg));
1666 }
1667 #else
1668 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
1669 {
1670     tcg_gen_op1_i64(INDEX_op_discard, arg);
1671 }
1672 #endif
1673
1674 static inline void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high)
1675 {
1676 #if TCG_TARGET_REG_BITS == 32
1677     tcg_gen_mov_i32(TCGV_LOW(dest), low);
1678     tcg_gen_mov_i32(TCGV_HIGH(dest), high);
1679 #else
1680     TCGv_i64 tmp = tcg_temp_new_i64();
1681     /* This extension is only needed for type correctness.
1682        We may be able to do better given target specific information.  */
1683     tcg_gen_extu_i32_i64(tmp, high);
1684     tcg_gen_shli_i64(tmp, tmp, 32);
1685     tcg_gen_extu_i32_i64(dest, low);
1686     tcg_gen_or_i64(dest, dest, tmp);
1687     tcg_temp_free_i64(tmp);
1688 #endif
1689 }
1690
1691 static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low, TCGv_i64 high)
1692 {
1693 #if TCG_TARGET_REG_BITS == 32
1694     tcg_gen_concat_i32_i64(dest, TCGV_LOW(low), TCGV_LOW(high));
1695 #else
1696     TCGv_i64 tmp = tcg_temp_new_i64();
1697     tcg_gen_ext32u_i64(dest, low);
1698     tcg_gen_shli_i64(tmp, high, 32);
1699     tcg_gen_or_i64(dest, dest, tmp);
1700     tcg_temp_free_i64(tmp);
1701 #endif
1702 }
1703
1704 static inline void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1705 {
1706 #ifdef TCG_TARGET_HAS_andc_i32
1707     tcg_gen_op3_i32(INDEX_op_andc_i32, ret, arg1, arg2);
1708 #else
1709     TCGv_i32 t0;
1710     t0 = tcg_temp_new_i32();
1711     tcg_gen_not_i32(t0, arg2);
1712     tcg_gen_and_i32(ret, arg1, t0);
1713     tcg_temp_free_i32(t0);
1714 #endif
1715 }
1716
1717 static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1718 {
1719 #ifdef TCG_TARGET_HAS_andc_i64
1720     tcg_gen_op3_i64(INDEX_op_andc_i64, ret, arg1, arg2);
1721 #elif defined(TCG_TARGET_HAS_andc_i32) && TCG_TARGET_REG_BITS == 32
1722     tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
1723     tcg_gen_andc_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
1724 #else
1725     TCGv_i64 t0;
1726     t0 = tcg_temp_new_i64();
1727     tcg_gen_not_i64(t0, arg2);
1728     tcg_gen_and_i64(ret, arg1, t0);
1729     tcg_temp_free_i64(t0);
1730 #endif
1731 }
1732
1733 static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1734 {
1735     tcg_gen_xor_i32(ret, arg1, arg2);
1736     tcg_gen_not_i32(ret, ret);
1737 }
1738
1739 static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1740 {
1741     tcg_gen_xor_i64(ret, arg1, arg2);
1742     tcg_gen_not_i64(ret, ret);
1743 }
1744
1745 static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1746 {
1747     tcg_gen_and_i32(ret, arg1, arg2);
1748     tcg_gen_not_i32(ret, ret);
1749 }
1750
1751 static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1752 {
1753     tcg_gen_and_i64(ret, arg1, arg2);
1754     tcg_gen_not_i64(ret, ret);
1755 }
1756
1757 static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1758 {
1759     tcg_gen_or_i32(ret, arg1, arg2);
1760     tcg_gen_not_i32(ret, ret);
1761 }
1762
1763 static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1764 {
1765     tcg_gen_or_i64(ret, arg1, arg2);
1766     tcg_gen_not_i64(ret, ret);
1767 }
1768
1769 static inline void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1770 {
1771 #ifdef TCG_TARGET_HAS_orc_i32
1772     tcg_gen_op3_i32(INDEX_op_orc_i32, ret, arg1, arg2);
1773 #else
1774     TCGv_i32 t0;
1775     t0 = tcg_temp_new_i32();
1776     tcg_gen_not_i32(t0, arg2);
1777     tcg_gen_or_i32(ret, arg1, t0);
1778     tcg_temp_free_i32(t0);
1779 #endif
1780 }
1781
1782 static inline void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1783 {
1784 #ifdef TCG_TARGET_HAS_orc_i64
1785     tcg_gen_op3_i64(INDEX_op_orc_i64, ret, arg1, arg2);
1786 #elif defined(TCG_TARGET_HAS_orc_i32) && TCG_TARGET_REG_BITS == 32
1787     tcg_gen_orc_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
1788     tcg_gen_orc_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
1789 #else
1790     TCGv_i64 t0;
1791     t0 = tcg_temp_new_i64();
1792     tcg_gen_not_i64(t0, arg2);
1793     tcg_gen_or_i64(ret, arg1, t0);
1794     tcg_temp_free_i64(t0);
1795 #endif
1796 }
1797
1798 static inline void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1799 {
1800 #ifdef TCG_TARGET_HAS_rot_i32
1801     tcg_gen_op3_i32(INDEX_op_rotl_i32, ret, arg1, arg2);
1802 #else
1803     TCGv_i32 t0, t1;
1804
1805     t0 = tcg_temp_new_i32();
1806     t1 = tcg_temp_new_i32();
1807     tcg_gen_shl_i32(t0, arg1, arg2);
1808     tcg_gen_subfi_i32(t1, 32, arg2);
1809     tcg_gen_shr_i32(t1, arg1, t1);
1810     tcg_gen_or_i32(ret, t0, t1);
1811     tcg_temp_free_i32(t0);
1812     tcg_temp_free_i32(t1);
1813 #endif
1814 }
1815
1816 static inline void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1817 {
1818 #ifdef TCG_TARGET_HAS_rot_i64
1819     tcg_gen_op3_i64(INDEX_op_rotl_i64, ret, arg1, arg2);
1820 #else
1821     TCGv_i64 t0, t1;
1822
1823     t0 = tcg_temp_new_i64();
1824     t1 = tcg_temp_new_i64();
1825     tcg_gen_shl_i64(t0, arg1, arg2);
1826     tcg_gen_subfi_i64(t1, 64, arg2);
1827     tcg_gen_shr_i64(t1, arg1, t1);
1828     tcg_gen_or_i64(ret, t0, t1);
1829     tcg_temp_free_i64(t0);
1830     tcg_temp_free_i64(t1);
1831 #endif
1832 }
1833
1834 static inline void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
1835 {
1836     /* some cases can be optimized here */
1837     if (arg2 == 0) {
1838         tcg_gen_mov_i32(ret, arg1);
1839     } else {
1840 #ifdef TCG_TARGET_HAS_rot_i32
1841         TCGv_i32 t0 = tcg_const_i32(arg2);
1842         tcg_gen_rotl_i32(ret, arg1, t0);
1843         tcg_temp_free_i32(t0);
1844 #else
1845         TCGv_i32 t0, t1;
1846         t0 = tcg_temp_new_i32();
1847         t1 = tcg_temp_new_i32();
1848         tcg_gen_shli_i32(t0, arg1, arg2);
1849         tcg_gen_shri_i32(t1, arg1, 32 - arg2);
1850         tcg_gen_or_i32(ret, t0, t1);
1851         tcg_temp_free_i32(t0);
1852         tcg_temp_free_i32(t1);
1853 #endif
1854     }
1855 }
1856
1857 static inline void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1858 {
1859     /* some cases can be optimized here */
1860     if (arg2 == 0) {
1861         tcg_gen_mov_i64(ret, arg1);
1862     } else {
1863 #ifdef TCG_TARGET_HAS_rot_i64
1864         TCGv_i64 t0 = tcg_const_i64(arg2);
1865         tcg_gen_rotl_i64(ret, arg1, t0);
1866         tcg_temp_free_i64(t0);
1867 #else
1868         TCGv_i64 t0, t1;
1869         t0 = tcg_temp_new_i64();
1870         t1 = tcg_temp_new_i64();
1871         tcg_gen_shli_i64(t0, arg1, arg2);
1872         tcg_gen_shri_i64(t1, arg1, 64 - arg2);
1873         tcg_gen_or_i64(ret, t0, t1);
1874         tcg_temp_free_i64(t0);
1875         tcg_temp_free_i64(t1);
1876 #endif
1877     }
1878 }
1879
1880 static inline void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1881 {
1882 #ifdef TCG_TARGET_HAS_rot_i32
1883     tcg_gen_op3_i32(INDEX_op_rotr_i32, ret, arg1, arg2);
1884 #else
1885     TCGv_i32 t0, t1;
1886
1887     t0 = tcg_temp_new_i32();
1888     t1 = tcg_temp_new_i32();
1889     tcg_gen_shr_i32(t0, arg1, arg2);
1890     tcg_gen_subfi_i32(t1, 32, arg2);
1891     tcg_gen_shl_i32(t1, arg1, t1);
1892     tcg_gen_or_i32(ret, t0, t1);
1893     tcg_temp_free_i32(t0);
1894     tcg_temp_free_i32(t1);
1895 #endif
1896 }
1897
1898 static inline void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1899 {
1900 #ifdef TCG_TARGET_HAS_rot_i64
1901     tcg_gen_op3_i64(INDEX_op_rotr_i64, ret, arg1, arg2);
1902 #else
1903     TCGv_i64 t0, t1;
1904
1905     t0 = tcg_temp_new_i64();
1906     t1 = tcg_temp_new_i64();
1907     tcg_gen_shr_i64(t0, arg1, arg2);
1908     tcg_gen_subfi_i64(t1, 64, arg2);
1909     tcg_gen_shl_i64(t1, arg1, t1);
1910     tcg_gen_or_i64(ret, t0, t1);
1911     tcg_temp_free_i64(t0);
1912     tcg_temp_free_i64(t1);
1913 #endif
1914 }
1915
1916 static inline void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
1917 {
1918     /* some cases can be optimized here */
1919     if (arg2 == 0) {
1920         tcg_gen_mov_i32(ret, arg1);
1921     } else {
1922         tcg_gen_rotli_i32(ret, arg1, 32 - arg2);
1923     }
1924 }
1925
1926 static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1927 {
1928     /* some cases can be optimized here */
1929     if (arg2 == 0) {
1930         tcg_gen_mov_i64(ret, arg1);
1931     } else {
1932         tcg_gen_rotli_i64(ret, arg1, 64 - arg2);
1933     }
1934 }
1935
1936 /***************************************/
1937 /* QEMU specific operations. Their type depend on the QEMU CPU
1938    type. */
1939 #ifndef TARGET_LONG_BITS
1940 #error must include QEMU headers
1941 #endif
1942
1943 #if TARGET_LONG_BITS == 32
1944 #define TCGv TCGv_i32
1945 #define tcg_temp_new() tcg_temp_new_i32()
1946 #define tcg_global_reg_new tcg_global_reg_new_i32
1947 #define tcg_global_mem_new tcg_global_mem_new_i32
1948 #define tcg_temp_local_new() tcg_temp_local_new_i32()
1949 #define tcg_temp_free tcg_temp_free_i32
1950 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
1951 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
1952 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
1953 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I32(a, b)
1954 #else
1955 #define TCGv TCGv_i64
1956 #define tcg_temp_new() tcg_temp_new_i64()
1957 #define tcg_global_reg_new tcg_global_reg_new_i64
1958 #define tcg_global_mem_new tcg_global_mem_new_i64
1959 #define tcg_temp_local_new() tcg_temp_local_new_i64()
1960 #define tcg_temp_free tcg_temp_free_i64
1961 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
1962 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64
1963 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
1964 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I64(a, b)
1965 #endif
1966
1967 /* debug info: write the PC of the corresponding QEMU CPU instruction */
1968 static inline void tcg_gen_debug_insn_start(uint64_t pc)
1969 {
1970     /* XXX: must really use a 32 bit size for TCGArg in all cases */
1971 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1972     tcg_gen_op2ii(INDEX_op_debug_insn_start,
1973                   (uint32_t)(pc), (uint32_t)(pc >> 32));
1974 #else
1975     tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
1976 #endif
1977 }
1978
1979 static inline void tcg_gen_exit_tb(tcg_target_long val)
1980 {
1981     tcg_gen_op1i(INDEX_op_exit_tb, val);
1982 }
1983
1984 static inline void tcg_gen_goto_tb(int idx)
1985 {
1986     tcg_gen_op1i(INDEX_op_goto_tb, idx);
1987 }
1988
1989 #if TCG_TARGET_REG_BITS == 32
1990 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
1991 {
1992 #if TARGET_LONG_BITS == 32
1993     tcg_gen_op3i_i32(INDEX_op_qemu_ld8u, ret, addr, mem_index);
1994 #else
1995     tcg_gen_op4i_i32(INDEX_op_qemu_ld8u, TCGV_LOW(ret), TCGV_LOW(addr),
1996                      TCGV_HIGH(addr), mem_index);
1997     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1998 #endif
1999 }
2000
2001 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
2002 {
2003 #if TARGET_LONG_BITS == 32
2004     tcg_gen_op3i_i32(INDEX_op_qemu_ld8s, ret, addr, mem_index);
2005 #else
2006     tcg_gen_op4i_i32(INDEX_op_qemu_ld8s, TCGV_LOW(ret), TCGV_LOW(addr),
2007                      TCGV_HIGH(addr), mem_index);
2008     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
2009 #endif
2010 }
2011
2012 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
2013 {
2014 #if TARGET_LONG_BITS == 32
2015     tcg_gen_op3i_i32(INDEX_op_qemu_ld16u, ret, addr, mem_index);
2016 #else
2017     tcg_gen_op4i_i32(INDEX_op_qemu_ld16u, TCGV_LOW(ret), TCGV_LOW(addr),
2018                      TCGV_HIGH(addr), mem_index);
2019     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
2020 #endif
2021 }
2022
2023 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
2024 {
2025 #if TARGET_LONG_BITS == 32
2026     tcg_gen_op3i_i32(INDEX_op_qemu_ld16s, ret, addr, mem_index);
2027 #else
2028     tcg_gen_op4i_i32(INDEX_op_qemu_ld16s, TCGV_LOW(ret), TCGV_LOW(addr),
2029                      TCGV_HIGH(addr), mem_index);
2030     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
2031 #endif
2032 }
2033
2034 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
2035 {
2036 #if TARGET_LONG_BITS == 32
2037     tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index);
2038 #else
2039     tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr),
2040                      TCGV_HIGH(addr), mem_index);
2041     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
2042 #endif
2043 }
2044
2045 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
2046 {
2047 #if TARGET_LONG_BITS == 32
2048     tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index);
2049 #else
2050     tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr),
2051                      TCGV_HIGH(addr), mem_index);
2052     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
2053 #endif
2054 }
2055
2056 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
2057 {
2058 #if TARGET_LONG_BITS == 32
2059     tcg_gen_op4i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret), addr, mem_index);
2060 #else
2061     tcg_gen_op5i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret),
2062                      TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
2063 #endif
2064 }
2065
2066 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
2067 {
2068 #if TARGET_LONG_BITS == 32
2069     tcg_gen_op3i_i32(INDEX_op_qemu_st8, arg, addr, mem_index);
2070 #else
2071     tcg_gen_op4i_i32(INDEX_op_qemu_st8, TCGV_LOW(arg), TCGV_LOW(addr),
2072                      TCGV_HIGH(addr), mem_index);
2073 #endif
2074 }
2075
2076 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
2077 {
2078 #if TARGET_LONG_BITS == 32
2079     tcg_gen_op3i_i32(INDEX_op_qemu_st16, arg, addr, mem_index);
2080 #else
2081     tcg_gen_op4i_i32(INDEX_op_qemu_st16, TCGV_LOW(arg), TCGV_LOW(addr),
2082                      TCGV_HIGH(addr), mem_index);
2083 #endif
2084 }
2085
2086 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
2087 {
2088 #if TARGET_LONG_BITS == 32
2089     tcg_gen_op3i_i32(INDEX_op_qemu_st32, arg, addr, mem_index);
2090 #else
2091     tcg_gen_op4i_i32(INDEX_op_qemu_st32, TCGV_LOW(arg), TCGV_LOW(addr),
2092                      TCGV_HIGH(addr), mem_index);
2093 #endif
2094 }
2095
2096 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
2097 {
2098 #if TARGET_LONG_BITS == 32
2099     tcg_gen_op4i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg), addr,
2100                      mem_index);
2101 #else
2102     tcg_gen_op5i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg),
2103                      TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
2104 #endif
2105 }
2106
2107 #define tcg_gen_ld_ptr tcg_gen_ld_i32
2108 #define tcg_gen_discard_ptr tcg_gen_discard_i32
2109
2110 #else /* TCG_TARGET_REG_BITS == 32 */
2111
2112 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
2113 {
2114     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8u, ret, addr, mem_index);
2115 }
2116
2117 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
2118 {
2119     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8s, ret, addr, mem_index);
2120 }
2121
2122 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
2123 {
2124     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16u, ret, addr, mem_index);
2125 }
2126
2127 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
2128 {
2129     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16s, ret, addr, mem_index);
2130 }
2131
2132 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
2133 {
2134     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32u, ret, addr, mem_index);
2135 }
2136
2137 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
2138 {
2139     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32s, ret, addr, mem_index);
2140 }
2141
2142 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
2143 {
2144     tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_ld64, ret, addr, mem_index);
2145 }
2146
2147 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
2148 {
2149     tcg_gen_qemu_ldst_op(INDEX_op_qemu_st8, arg, addr, mem_index);
2150 }
2151
2152 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
2153 {
2154     tcg_gen_qemu_ldst_op(INDEX_op_qemu_st16, arg, addr, mem_index);
2155 }
2156
2157 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
2158 {
2159     tcg_gen_qemu_ldst_op(INDEX_op_qemu_st32, arg, addr, mem_index);
2160 }
2161
2162 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
2163 {
2164     tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_st64, arg, addr, mem_index);
2165 }
2166
2167 #define tcg_gen_ld_ptr tcg_gen_ld_i64
2168 #define tcg_gen_discard_ptr tcg_gen_discard_i64
2169
2170 #endif /* TCG_TARGET_REG_BITS != 32 */
2171
2172 #if TARGET_LONG_BITS == 64
2173 #define TCG_TYPE_TL TCG_TYPE_I64
2174 #define tcg_gen_movi_tl tcg_gen_movi_i64
2175 #define tcg_gen_mov_tl tcg_gen_mov_i64
2176 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
2177 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
2178 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
2179 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
2180 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
2181 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
2182 #define tcg_gen_ld_tl tcg_gen_ld_i64
2183 #define tcg_gen_st8_tl tcg_gen_st8_i64
2184 #define tcg_gen_st16_tl tcg_gen_st16_i64
2185 #define tcg_gen_st32_tl tcg_gen_st32_i64
2186 #define tcg_gen_st_tl tcg_gen_st_i64
2187 #define tcg_gen_add_tl tcg_gen_add_i64
2188 #define tcg_gen_addi_tl tcg_gen_addi_i64
2189 #define tcg_gen_sub_tl tcg_gen_sub_i64
2190 #define tcg_gen_neg_tl tcg_gen_neg_i64
2191 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
2192 #define tcg_gen_subi_tl tcg_gen_subi_i64
2193 #define tcg_gen_and_tl tcg_gen_and_i64
2194 #define tcg_gen_andi_tl tcg_gen_andi_i64
2195 #define tcg_gen_or_tl tcg_gen_or_i64
2196 #define tcg_gen_ori_tl tcg_gen_ori_i64
2197 #define tcg_gen_xor_tl tcg_gen_xor_i64
2198 #define tcg_gen_xori_tl tcg_gen_xori_i64
2199 #define tcg_gen_not_tl tcg_gen_not_i64
2200 #define tcg_gen_shl_tl tcg_gen_shl_i64
2201 #define tcg_gen_shli_tl tcg_gen_shli_i64
2202 #define tcg_gen_shr_tl tcg_gen_shr_i64
2203 #define tcg_gen_shri_tl tcg_gen_shri_i64
2204 #define tcg_gen_sar_tl tcg_gen_sar_i64
2205 #define tcg_gen_sari_tl tcg_gen_sari_i64
2206 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
2207 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
2208 #define tcg_gen_setcond_tl tcg_gen_setcond_i64
2209 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
2210 #define tcg_gen_mul_tl tcg_gen_mul_i64
2211 #define tcg_gen_muli_tl tcg_gen_muli_i64
2212 #define tcg_gen_div_tl tcg_gen_div_i64
2213 #define tcg_gen_rem_tl tcg_gen_rem_i64
2214 #define tcg_gen_divu_tl tcg_gen_divu_i64
2215 #define tcg_gen_remu_tl tcg_gen_remu_i64
2216 #define tcg_gen_discard_tl tcg_gen_discard_i64
2217 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
2218 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
2219 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
2220 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
2221 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
2222 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
2223 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
2224 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
2225 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
2226 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
2227 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
2228 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
2229 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
2230 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
2231 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
2232 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
2233 #define tcg_gen_andc_tl tcg_gen_andc_i64
2234 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
2235 #define tcg_gen_nand_tl tcg_gen_nand_i64
2236 #define tcg_gen_nor_tl tcg_gen_nor_i64
2237 #define tcg_gen_orc_tl tcg_gen_orc_i64
2238 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
2239 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
2240 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
2241 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
2242 #define tcg_const_tl tcg_const_i64
2243 #define tcg_const_local_tl tcg_const_local_i64
2244 #else
2245 #define TCG_TYPE_TL TCG_TYPE_I32
2246 #define tcg_gen_movi_tl tcg_gen_movi_i32
2247 #define tcg_gen_mov_tl tcg_gen_mov_i32
2248 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
2249 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
2250 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
2251 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
2252 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
2253 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
2254 #define tcg_gen_ld_tl tcg_gen_ld_i32
2255 #define tcg_gen_st8_tl tcg_gen_st8_i32
2256 #define tcg_gen_st16_tl tcg_gen_st16_i32
2257 #define tcg_gen_st32_tl tcg_gen_st_i32
2258 #define tcg_gen_st_tl tcg_gen_st_i32
2259 #define tcg_gen_add_tl tcg_gen_add_i32
2260 #define tcg_gen_addi_tl tcg_gen_addi_i32
2261 #define tcg_gen_sub_tl tcg_gen_sub_i32
2262 #define tcg_gen_neg_tl tcg_gen_neg_i32
2263 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
2264 #define tcg_gen_subi_tl tcg_gen_subi_i32
2265 #define tcg_gen_and_tl tcg_gen_and_i32
2266 #define tcg_gen_andi_tl tcg_gen_andi_i32
2267 #define tcg_gen_or_tl tcg_gen_or_i32
2268 #define tcg_gen_ori_tl tcg_gen_ori_i32
2269 #define tcg_gen_xor_tl tcg_gen_xor_i32
2270 #define tcg_gen_xori_tl tcg_gen_xori_i32
2271 #define tcg_gen_not_tl tcg_gen_not_i32
2272 #define tcg_gen_shl_tl tcg_gen_shl_i32
2273 #define tcg_gen_shli_tl tcg_gen_shli_i32
2274 #define tcg_gen_shr_tl tcg_gen_shr_i32
2275 #define tcg_gen_shri_tl tcg_gen_shri_i32
2276 #define tcg_gen_sar_tl tcg_gen_sar_i32
2277 #define tcg_gen_sari_tl tcg_gen_sari_i32
2278 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
2279 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
2280 #define tcg_gen_setcond_tl tcg_gen_setcond_i32
2281 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
2282 #define tcg_gen_mul_tl tcg_gen_mul_i32
2283 #define tcg_gen_muli_tl tcg_gen_muli_i32
2284 #define tcg_gen_div_tl tcg_gen_div_i32
2285 #define tcg_gen_rem_tl tcg_gen_rem_i32
2286 #define tcg_gen_divu_tl tcg_gen_divu_i32
2287 #define tcg_gen_remu_tl tcg_gen_remu_i32
2288 #define tcg_gen_discard_tl tcg_gen_discard_i32
2289 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
2290 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
2291 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
2292 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
2293 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
2294 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
2295 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
2296 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
2297 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
2298 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
2299 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
2300 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
2301 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
2302 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
2303 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
2304 #define tcg_gen_andc_tl tcg_gen_andc_i32
2305 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
2306 #define tcg_gen_nand_tl tcg_gen_nand_i32
2307 #define tcg_gen_nor_tl tcg_gen_nor_i32
2308 #define tcg_gen_orc_tl tcg_gen_orc_i32
2309 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
2310 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
2311 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
2312 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
2313 #define tcg_const_tl tcg_const_i32
2314 #define tcg_const_local_tl tcg_const_local_i32
2315 #endif
2316
2317 #if TCG_TARGET_REG_BITS == 32
2318 #define tcg_gen_add_ptr tcg_gen_add_i32
2319 #define tcg_gen_addi_ptr tcg_gen_addi_i32
2320 #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
2321 #else /* TCG_TARGET_REG_BITS == 32 */
2322 #define tcg_gen_add_ptr tcg_gen_add_i64
2323 #define tcg_gen_addi_ptr tcg_gen_addi_i64
2324 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
2325 #endif /* TCG_TARGET_REG_BITS != 32 */