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Fix andi, optimize addi and subi zero cases
[qemu.git] / tcg / tcg-op.h
1 /*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "tcg.h"
25
26 /* legacy dyngen operations */
27 #include "gen-op.h"
28
29 int gen_new_label(void);
30
31 static inline void tcg_gen_op1(int opc, TCGv arg1)
32 {
33 *gen_opc_ptr++ = opc;
34 *gen_opparam_ptr++ = GET_TCGV(arg1);
35 }
36
37 static inline void tcg_gen_op1i(int opc, TCGArg arg1)
38 {
39 *gen_opc_ptr++ = opc;
40 *gen_opparam_ptr++ = arg1;
41 }
42
43 static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2)
44 {
45 *gen_opc_ptr++ = opc;
46 *gen_opparam_ptr++ = GET_TCGV(arg1);
47 *gen_opparam_ptr++ = GET_TCGV(arg2);
48 }
49
50 static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2)
51 {
52 *gen_opc_ptr++ = opc;
53 *gen_opparam_ptr++ = GET_TCGV(arg1);
54 *gen_opparam_ptr++ = arg2;
55 }
56
57 static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3)
58 {
59 *gen_opc_ptr++ = opc;
60 *gen_opparam_ptr++ = GET_TCGV(arg1);
61 *gen_opparam_ptr++ = GET_TCGV(arg2);
62 *gen_opparam_ptr++ = GET_TCGV(arg3);
63 }
64
65 static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3)
66 {
67 *gen_opc_ptr++ = opc;
68 *gen_opparam_ptr++ = GET_TCGV(arg1);
69 *gen_opparam_ptr++ = GET_TCGV(arg2);
70 *gen_opparam_ptr++ = arg3;
71 }
72
73 static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3,
74 TCGv arg4)
75 {
76 *gen_opc_ptr++ = opc;
77 *gen_opparam_ptr++ = GET_TCGV(arg1);
78 *gen_opparam_ptr++ = GET_TCGV(arg2);
79 *gen_opparam_ptr++ = GET_TCGV(arg3);
80 *gen_opparam_ptr++ = GET_TCGV(arg4);
81 }
82
83 static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3,
84 TCGArg arg4)
85 {
86 *gen_opc_ptr++ = opc;
87 *gen_opparam_ptr++ = GET_TCGV(arg1);
88 *gen_opparam_ptr++ = GET_TCGV(arg2);
89 *gen_opparam_ptr++ = GET_TCGV(arg3);
90 *gen_opparam_ptr++ = arg4;
91 }
92
93 static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3,
94 TCGArg arg4)
95 {
96 *gen_opc_ptr++ = opc;
97 *gen_opparam_ptr++ = GET_TCGV(arg1);
98 *gen_opparam_ptr++ = GET_TCGV(arg2);
99 *gen_opparam_ptr++ = arg3;
100 *gen_opparam_ptr++ = arg4;
101 }
102
103 static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2,
104 TCGv arg3, TCGv arg4,
105 TCGv arg5)
106 {
107 *gen_opc_ptr++ = opc;
108 *gen_opparam_ptr++ = GET_TCGV(arg1);
109 *gen_opparam_ptr++ = GET_TCGV(arg2);
110 *gen_opparam_ptr++ = GET_TCGV(arg3);
111 *gen_opparam_ptr++ = GET_TCGV(arg4);
112 *gen_opparam_ptr++ = GET_TCGV(arg5);
113 }
114
115 static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2,
116 TCGv arg3, TCGv arg4,
117 TCGArg arg5)
118 {
119 *gen_opc_ptr++ = opc;
120 *gen_opparam_ptr++ = GET_TCGV(arg1);
121 *gen_opparam_ptr++ = GET_TCGV(arg2);
122 *gen_opparam_ptr++ = GET_TCGV(arg3);
123 *gen_opparam_ptr++ = GET_TCGV(arg4);
124 *gen_opparam_ptr++ = arg5;
125 }
126
127 static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2,
128 TCGv arg3, TCGv arg4,
129 TCGv arg5, TCGv arg6)
130 {
131 *gen_opc_ptr++ = opc;
132 *gen_opparam_ptr++ = GET_TCGV(arg1);
133 *gen_opparam_ptr++ = GET_TCGV(arg2);
134 *gen_opparam_ptr++ = GET_TCGV(arg3);
135 *gen_opparam_ptr++ = GET_TCGV(arg4);
136 *gen_opparam_ptr++ = GET_TCGV(arg5);
137 *gen_opparam_ptr++ = GET_TCGV(arg6);
138 }
139
140 static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2,
141 TCGv arg3, TCGv arg4,
142 TCGArg arg5, TCGArg arg6)
143 {
144 *gen_opc_ptr++ = opc;
145 *gen_opparam_ptr++ = GET_TCGV(arg1);
146 *gen_opparam_ptr++ = GET_TCGV(arg2);
147 *gen_opparam_ptr++ = GET_TCGV(arg3);
148 *gen_opparam_ptr++ = GET_TCGV(arg4);
149 *gen_opparam_ptr++ = arg5;
150 *gen_opparam_ptr++ = arg6;
151 }
152
153 static inline void gen_set_label(int n)
154 {
155 tcg_gen_op1i(INDEX_op_set_label, n);
156 }
157
158 static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg)
159 {
160 tcg_gen_op2(INDEX_op_mov_i32, ret, arg);
161 }
162
163 static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg)
164 {
165 tcg_gen_op2i(INDEX_op_movi_i32, ret, arg);
166 }
167
168 /* helper calls */
169 #define TCG_HELPER_CALL_FLAGS 0
170
171 static inline void tcg_gen_helper_0_0(void *func)
172 {
173 tcg_gen_call(&tcg_ctx,
174 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
175 0, NULL, 0, NULL);
176 }
177
178 static inline void tcg_gen_helper_0_1(void *func, TCGv arg)
179 {
180 tcg_gen_call(&tcg_ctx,
181 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
182 0, NULL, 1, &arg);
183 }
184
185 static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2)
186 {
187 TCGv args[2];
188 args[0] = arg1;
189 args[1] = arg2;
190 tcg_gen_call(&tcg_ctx,
191 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
192 0, NULL, 2, args);
193 }
194
195 static inline void tcg_gen_helper_1_2(void *func, TCGv ret,
196 TCGv arg1, TCGv arg2)
197 {
198 TCGv args[2];
199 args[0] = arg1;
200 args[1] = arg2;
201 tcg_gen_call(&tcg_ctx,
202 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
203 1, &ret, 2, args);
204 }
205
206 /* 32 bit ops */
207
208 static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
209 {
210 tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset);
211 }
212
213 static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
214 {
215 tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset);
216 }
217
218 static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
219 {
220 tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset);
221 }
222
223 static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
224 {
225 tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset);
226 }
227
228 static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
229 {
230 tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset);
231 }
232
233 static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset)
234 {
235 tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset);
236 }
237
238 static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset)
239 {
240 tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset);
241 }
242
243 static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset)
244 {
245 tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset);
246 }
247
248 static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2)
249 {
250 tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2);
251 }
252
253 static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2)
254 {
255 /* some cases can be optimized here */
256 if (arg2 == 0) {
257 tcg_gen_mov_i32(ret, arg1);
258 } else {
259 tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2));
260 }
261 }
262
263 static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2)
264 {
265 tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2);
266 }
267
268 static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2)
269 {
270 /* some cases can be optimized here */
271 if (arg2 == 0) {
272 tcg_gen_mov_i32(ret, arg1);
273 } else {
274 tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2));
275 }
276 }
277
278 static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2)
279 {
280 tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2);
281 }
282
283 static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2)
284 {
285 /* some cases can be optimized here */
286 if (arg2 == 0) {
287 tcg_gen_movi_i32(ret, 0);
288 } else if (arg2 == 0xffffffff) {
289 tcg_gen_mov_i32(ret, arg1);
290 } else {
291 tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2));
292 }
293 }
294
295 static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2)
296 {
297 tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2);
298 }
299
300 static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2)
301 {
302 /* some cases can be optimized here */
303 if (arg2 == 0xffffffff) {
304 tcg_gen_movi_i32(ret, 0xffffffff);
305 } else if (arg2 == 0) {
306 tcg_gen_mov_i32(ret, arg1);
307 } else {
308 tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2));
309 }
310 }
311
312 static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2)
313 {
314 tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2);
315 }
316
317 static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2)
318 {
319 /* some cases can be optimized here */
320 if (arg2 == 0) {
321 tcg_gen_mov_i32(ret, arg1);
322 } else {
323 tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2));
324 }
325 }
326
327 static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2)
328 {
329 tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2);
330 }
331
332 static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2)
333 {
334 tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2));
335 }
336
337 static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2)
338 {
339 tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2);
340 }
341
342 static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2)
343 {
344 tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2));
345 }
346
347 static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2)
348 {
349 tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2);
350 }
351
352 static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2)
353 {
354 tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2));
355 }
356
357 static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2,
358 int label_index)
359 {
360 tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
361 }
362
363 static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2)
364 {
365 tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2);
366 }
367
368 #ifdef TCG_TARGET_HAS_div_i32
369 static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2)
370 {
371 tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2);
372 }
373
374 static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2)
375 {
376 tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2);
377 }
378
379 static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2)
380 {
381 tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2);
382 }
383
384 static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2)
385 {
386 tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2);
387 }
388 #else
389 static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2)
390 {
391 TCGv t0;
392 t0 = tcg_temp_new(TCG_TYPE_I32);
393 tcg_gen_sari_i32(t0, arg1, 31);
394 tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2);
395 }
396
397 static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2)
398 {
399 TCGv t0;
400 t0 = tcg_temp_new(TCG_TYPE_I32);
401 tcg_gen_sari_i32(t0, arg1, 31);
402 tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2);
403 }
404
405 static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2)
406 {
407 TCGv t0;
408 t0 = tcg_temp_new(TCG_TYPE_I32);
409 tcg_gen_movi_i32(t0, 0);
410 tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2);
411 }
412
413 static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2)
414 {
415 TCGv t0;
416 t0 = tcg_temp_new(TCG_TYPE_I32);
417 tcg_gen_movi_i32(t0, 0);
418 tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2);
419 }
420 #endif
421
422 #if TCG_TARGET_REG_BITS == 32
423
424 static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg)
425 {
426 tcg_gen_mov_i32(ret, arg);
427 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
428 }
429
430 static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg)
431 {
432 tcg_gen_movi_i32(ret, arg);
433 tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
434 }
435
436 static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
437 {
438 tcg_gen_ld8u_i32(ret, arg2, offset);
439 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
440 }
441
442 static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
443 {
444 tcg_gen_ld8s_i32(ret, arg2, offset);
445 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
446 }
447
448 static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
449 {
450 tcg_gen_ld16u_i32(ret, arg2, offset);
451 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
452 }
453
454 static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
455 {
456 tcg_gen_ld16s_i32(ret, arg2, offset);
457 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
458 }
459
460 static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
461 {
462 tcg_gen_ld_i32(ret, arg2, offset);
463 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
464 }
465
466 static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
467 {
468 tcg_gen_ld_i32(ret, arg2, offset);
469 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
470 }
471
472 static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
473 {
474 /* since arg2 and ret have different types, they cannot be the
475 same temporary */
476 #ifdef TCG_TARGET_WORDS_BIGENDIAN
477 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
478 tcg_gen_ld_i32(ret, arg2, offset + 4);
479 #else
480 tcg_gen_ld_i32(ret, arg2, offset);
481 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
482 #endif
483 }
484
485 static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
486 {
487 tcg_gen_st8_i32(arg1, arg2, offset);
488 }
489
490 static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
491 {
492 tcg_gen_st16_i32(arg1, arg2, offset);
493 }
494
495 static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
496 {
497 tcg_gen_st_i32(arg1, arg2, offset);
498 }
499
500 static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
501 {
502 #ifdef TCG_TARGET_WORDS_BIGENDIAN
503 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset);
504 tcg_gen_st_i32(arg1, arg2, offset + 4);
505 #else
506 tcg_gen_st_i32(arg1, arg2, offset);
507 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
508 #endif
509 }
510
511 static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2)
512 {
513 tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret),
514 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2));
515 }
516
517 static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
518 {
519 tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2));
520 }
521
522 static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2)
523 {
524 tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret),
525 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2));
526 }
527
528 static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
529 {
530 tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2));
531 }
532
533 static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2)
534 {
535 tcg_gen_and_i32(ret, arg1, arg2);
536 tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
537 }
538
539 static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2)
540 {
541 tcg_gen_andi_i32(ret, arg1, arg2);
542 tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
543 }
544
545 static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2)
546 {
547 tcg_gen_or_i32(ret, arg1, arg2);
548 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
549 }
550
551 static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2)
552 {
553 tcg_gen_ori_i32(ret, arg1, arg2);
554 tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
555 }
556
557 static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2)
558 {
559 tcg_gen_xor_i32(ret, arg1, arg2);
560 tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
561 }
562
563 static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2)
564 {
565 tcg_gen_xori_i32(ret, arg1, arg2);
566 tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
567 }
568
569 /* XXX: use generic code when basic block handling is OK or CPU
570 specific code (x86) */
571 static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2)
572 {
573 tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2);
574 }
575
576 static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2)
577 {
578 tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0);
579 }
580
581 static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2)
582 {
583 tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2);
584 }
585
586 static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2)
587 {
588 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0);
589 }
590
591 static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2)
592 {
593 tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2);
594 }
595
596 static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2)
597 {
598 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1);
599 }
600
601 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2,
602 int label_index)
603 {
604 tcg_gen_op6ii(INDEX_op_brcond2_i32,
605 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2),
606 cond, label_index);
607 }
608
609 static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2)
610 {
611 TCGv t0, t1;
612
613 t0 = tcg_temp_new(TCG_TYPE_I64);
614 t1 = tcg_temp_new(TCG_TYPE_I32);
615
616 tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2);
617
618 tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2));
619 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
620 tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2);
621 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
622
623 tcg_gen_mov_i64(ret, t0);
624 }
625
626 static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2)
627 {
628 tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2);
629 }
630
631 static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2)
632 {
633 tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2);
634 }
635
636 static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2)
637 {
638 tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2);
639 }
640
641 static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2)
642 {
643 tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2);
644 }
645
646 #else
647
648 static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg)
649 {
650 tcg_gen_op2(INDEX_op_mov_i64, ret, arg);
651 }
652
653 static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg)
654 {
655 tcg_gen_op2i(INDEX_op_movi_i64, ret, arg);
656 }
657
658 static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2,
659 tcg_target_long offset)
660 {
661 tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset);
662 }
663
664 static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2,
665 tcg_target_long offset)
666 {
667 tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset);
668 }
669
670 static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2,
671 tcg_target_long offset)
672 {
673 tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset);
674 }
675
676 static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2,
677 tcg_target_long offset)
678 {
679 tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset);
680 }
681
682 static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2,
683 tcg_target_long offset)
684 {
685 tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset);
686 }
687
688 static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2,
689 tcg_target_long offset)
690 {
691 tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset);
692 }
693
694 static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
695 {
696 tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset);
697 }
698
699 static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2,
700 tcg_target_long offset)
701 {
702 tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset);
703 }
704
705 static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2,
706 tcg_target_long offset)
707 {
708 tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset);
709 }
710
711 static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2,
712 tcg_target_long offset)
713 {
714 tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset);
715 }
716
717 static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
718 {
719 tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset);
720 }
721
722 static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2)
723 {
724 tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2);
725 }
726
727 static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
728 {
729 tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2));
730 }
731
732 static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2)
733 {
734 tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2);
735 }
736
737 static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
738 {
739 tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2));
740 }
741
742 static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2)
743 {
744 tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2);
745 }
746
747 static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2)
748 {
749 tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2));
750 }
751
752 static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2)
753 {
754 tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2);
755 }
756
757 static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2)
758 {
759 tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2));
760 }
761
762 static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2)
763 {
764 tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2);
765 }
766
767 static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2)
768 {
769 tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2));
770 }
771
772 static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2)
773 {
774 tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2);
775 }
776
777 static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2)
778 {
779 tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2));
780 }
781
782 static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2)
783 {
784 tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2);
785 }
786
787 static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2)
788 {
789 tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2));
790 }
791
792 static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2)
793 {
794 tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2);
795 }
796
797 static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2)
798 {
799 tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2));
800 }
801
802 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2,
803 int label_index)
804 {
805 tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index);
806 }
807
808 static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2)
809 {
810 tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2);
811 }
812
813 #ifdef TCG_TARGET_HAS_div_i64
814 static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2)
815 {
816 tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2);
817 }
818
819 static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2)
820 {
821 tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2);
822 }
823
824 static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2)
825 {
826 tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2);
827 }
828
829 static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2)
830 {
831 tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2);
832 }
833 #else
834 static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2)
835 {
836 TCGv t0;
837 t0 = tcg_temp_new(TCG_TYPE_I64);
838 tcg_gen_sari_i64(t0, arg1, 63);
839 tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2);
840 }
841
842 static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2)
843 {
844 TCGv t0;
845 t0 = tcg_temp_new(TCG_TYPE_I64);
846 tcg_gen_sari_i64(t0, arg1, 63);
847 tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2);
848 }
849
850 static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2)
851 {
852 TCGv t0;
853 t0 = tcg_temp_new(TCG_TYPE_I64);
854 tcg_gen_movi_i64(t0, 0);
855 tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2);
856 }
857
858 static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2)
859 {
860 TCGv t0;
861 t0 = tcg_temp_new(TCG_TYPE_I64);
862 tcg_gen_movi_i64(t0, 0);
863 tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2);
864 }
865 #endif
866
867 #endif
868
869 /***************************************/
870 /* optional operations */
871
872 static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg)
873 {
874 #ifdef TCG_TARGET_HAS_ext8s_i32
875 tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg);
876 #else
877 tcg_gen_shli_i32(ret, arg, 24);
878 tcg_gen_sari_i32(ret, ret, 24);
879 #endif
880 }
881
882 static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg)
883 {
884 #ifdef TCG_TARGET_HAS_ext16s_i32
885 tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg);
886 #else
887 tcg_gen_shli_i32(ret, arg, 16);
888 tcg_gen_sari_i32(ret, ret, 16);
889 #endif
890 }
891
892 /* Note: we assume the two high bytes are set to zero */
893 static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg)
894 {
895 #ifdef TCG_TARGET_HAS_bswap16_i32
896 tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg);
897 #else
898 TCGv t0, t1;
899 t0 = tcg_temp_new(TCG_TYPE_I32);
900 t1 = tcg_temp_new(TCG_TYPE_I32);
901
902 tcg_gen_shri_i32(t0, arg, 8);
903 tcg_gen_andi_i32(t1, arg, 0x000000ff);
904 tcg_gen_shli_i32(t1, t1, 8);
905 tcg_gen_or_i32(ret, t0, t1);
906 #endif
907 }
908
909 static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg)
910 {
911 #ifdef TCG_TARGET_HAS_bswap_i32
912 tcg_gen_op2(INDEX_op_bswap_i32, ret, arg);
913 #else
914 TCGv t0, t1;
915 t0 = tcg_temp_new(TCG_TYPE_I32);
916 t1 = tcg_temp_new(TCG_TYPE_I32);
917
918 tcg_gen_shli_i32(t0, arg, 24);
919
920 tcg_gen_andi_i32(t1, arg, 0x0000ff00);
921 tcg_gen_shli_i32(t1, t1, 8);
922 tcg_gen_or_i32(t0, t0, t1);
923
924 tcg_gen_shri_i32(t1, arg, 8);
925 tcg_gen_andi_i32(t1, t1, 0x0000ff00);
926 tcg_gen_or_i32(t0, t0, t1);
927
928 tcg_gen_shri_i32(t1, arg, 24);
929 tcg_gen_or_i32(ret, t0, t1);
930 #endif
931 }
932
933 #if TCG_TARGET_REG_BITS == 32
934 static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg)
935 {
936 tcg_gen_ext8s_i32(ret, arg);
937 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
938 }
939
940 static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg)
941 {
942 tcg_gen_ext16s_i32(ret, arg);
943 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
944 }
945
946 static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg)
947 {
948 tcg_gen_mov_i32(ret, arg);
949 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
950 }
951
952 static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg)
953 {
954 tcg_gen_mov_i32(ret, arg);
955 }
956
957 static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg)
958 {
959 tcg_gen_mov_i32(ret, arg);
960 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
961 }
962
963 static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg)
964 {
965 tcg_gen_mov_i32(ret, arg);
966 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
967 }
968
969 static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg)
970 {
971 TCGv t0, t1;
972 t0 = tcg_temp_new(TCG_TYPE_I32);
973 t1 = tcg_temp_new(TCG_TYPE_I32);
974
975 tcg_gen_bswap_i32(t0, arg);
976 tcg_gen_bswap_i32(t1, TCGV_HIGH(arg));
977 tcg_gen_mov_i32(ret, t1);
978 tcg_gen_mov_i32(TCGV_HIGH(ret), t0);
979 }
980 #else
981
982 static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg)
983 {
984 #ifdef TCG_TARGET_HAS_ext8s_i64
985 tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg);
986 #else
987 tcg_gen_shli_i64(ret, arg, 56);
988 tcg_gen_sari_i64(ret, ret, 56);
989 #endif
990 }
991
992 static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg)
993 {
994 #ifdef TCG_TARGET_HAS_ext16s_i64
995 tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg);
996 #else
997 tcg_gen_shli_i64(ret, arg, 48);
998 tcg_gen_sari_i64(ret, ret, 48);
999 #endif
1000 }
1001
1002 static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg)
1003 {
1004 #ifdef TCG_TARGET_HAS_ext32s_i64
1005 tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg);
1006 #else
1007 tcg_gen_shli_i64(ret, arg, 32);
1008 tcg_gen_sari_i64(ret, ret, 32);
1009 #endif
1010 }
1011
1012 /* Note: we assume the target supports move between 32 and 64 bit
1013 registers. This will probably break MIPS64 targets. */
1014 static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg)
1015 {
1016 tcg_gen_mov_i32(ret, arg);
1017 }
1018
1019 /* Note: we assume the target supports move between 32 and 64 bit
1020 registers */
1021 static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg)
1022 {
1023 tcg_gen_andi_i64(ret, arg, 0xffffffff);
1024 }
1025
1026 /* Note: we assume the target supports move between 32 and 64 bit
1027 registers */
1028 static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg)
1029 {
1030 tcg_gen_ext32s_i64(ret, arg);
1031 }
1032
1033 static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg)
1034 {
1035 #ifdef TCG_TARGET_HAS_bswap_i64
1036 tcg_gen_op2(INDEX_op_bswap_i64, ret, arg);
1037 #else
1038 TCGv t0, t1;
1039 t0 = tcg_temp_new(TCG_TYPE_I32);
1040 t1 = tcg_temp_new(TCG_TYPE_I32);
1041
1042 tcg_gen_shli_i64(t0, arg, 56);
1043
1044 tcg_gen_andi_i64(t1, arg, 0x0000ff00);
1045 tcg_gen_shli_i64(t1, t1, 40);
1046 tcg_gen_or_i64(t0, t0, t1);
1047
1048 tcg_gen_andi_i64(t1, arg, 0x00ff0000);
1049 tcg_gen_shli_i64(t1, t1, 24);
1050 tcg_gen_or_i64(t0, t0, t1);
1051
1052 tcg_gen_andi_i64(t1, arg, 0xff000000);
1053 tcg_gen_shli_i64(t1, t1, 8);
1054 tcg_gen_or_i64(t0, t0, t1);
1055
1056 tcg_gen_shri_i64(t1, arg, 8);
1057 tcg_gen_andi_i64(t1, t1, 0xff000000);
1058 tcg_gen_or_i64(t0, t0, t1);
1059
1060 tcg_gen_shri_i64(t1, arg, 24);
1061 tcg_gen_andi_i64(t1, t1, 0x00ff0000);
1062 tcg_gen_or_i64(t0, t0, t1);
1063
1064 tcg_gen_shri_i64(t1, arg, 40);
1065 tcg_gen_andi_i64(t1, t1, 0x0000ff00);
1066 tcg_gen_or_i64(t0, t0, t1);
1067
1068 tcg_gen_shri_i64(t1, arg, 56);
1069 tcg_gen_or_i64(ret, t0, t1);
1070 #endif
1071 }
1072
1073 #endif
1074
1075
1076 static inline void tcg_gen_discard_i32(TCGv arg)
1077 {
1078 tcg_gen_op1(INDEX_op_discard, arg);
1079 }
1080
1081 #if TCG_TARGET_REG_BITS == 32
1082 static inline void tcg_gen_discard_i64(TCGv arg)
1083 {
1084 tcg_gen_discard_i32(arg);
1085 tcg_gen_discard_i32(TCGV_HIGH(arg));
1086 }
1087 #else
1088 static inline void tcg_gen_discard_i64(TCGv arg)
1089 {
1090 tcg_gen_op1(INDEX_op_discard, arg);
1091 }
1092 #endif
1093
1094 /***************************************/
1095 static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id)
1096 {
1097 tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id);
1098 }
1099
1100 /***************************************/
1101 /* QEMU specific operations. Their type depend on the QEMU CPU
1102 type. */
1103 #ifndef TARGET_LONG_BITS
1104 #error must include QEMU headers
1105 #endif
1106
1107 static inline void tcg_gen_exit_tb(tcg_target_long val)
1108 {
1109 tcg_gen_op1i(INDEX_op_exit_tb, val);
1110 }
1111
1112 static inline void tcg_gen_goto_tb(int idx)
1113 {
1114 tcg_gen_op1i(INDEX_op_goto_tb, idx);
1115 }
1116
1117 #if TCG_TARGET_REG_BITS == 32
1118 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
1119 {
1120 #if TARGET_LONG_BITS == 32
1121 tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index);
1122 #else
1123 tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index);
1124 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1125 #endif
1126 }
1127
1128 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
1129 {
1130 #if TARGET_LONG_BITS == 32
1131 tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index);
1132 #else
1133 tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index);
1134 tcg_gen_ext8s_i32(TCGV_HIGH(ret), ret);
1135 #endif
1136 }
1137
1138 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
1139 {
1140 #if TARGET_LONG_BITS == 32
1141 tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index);
1142 #else
1143 tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index);
1144 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1145 #endif
1146 }
1147
1148 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
1149 {
1150 #if TARGET_LONG_BITS == 32
1151 tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index);
1152 #else
1153 tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index);
1154 tcg_gen_ext16s_i32(TCGV_HIGH(ret), ret);
1155 #endif
1156 }
1157
1158 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
1159 {
1160 #if TARGET_LONG_BITS == 32
1161 tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1162 #else
1163 tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index);
1164 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1165 #endif
1166 }
1167
1168 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
1169 {
1170 #if TARGET_LONG_BITS == 32
1171 tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1172 #else
1173 tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index);
1174 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
1175 #endif
1176 }
1177
1178 static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index)
1179 {
1180 #if TARGET_LONG_BITS == 32
1181 tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index);
1182 #else
1183 tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret),
1184 addr, TCGV_HIGH(addr), mem_index);
1185 #endif
1186 }
1187
1188 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
1189 {
1190 #if TARGET_LONG_BITS == 32
1191 tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index);
1192 #else
1193 tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index);
1194 #endif
1195 }
1196
1197 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
1198 {
1199 #if TARGET_LONG_BITS == 32
1200 tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index);
1201 #else
1202 tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index);
1203 #endif
1204 }
1205
1206 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
1207 {
1208 #if TARGET_LONG_BITS == 32
1209 tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index);
1210 #else
1211 tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index);
1212 #endif
1213 }
1214
1215 static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
1216 {
1217 #if TARGET_LONG_BITS == 32
1218 tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index);
1219 #else
1220 tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg),
1221 addr, TCGV_HIGH(addr), mem_index);
1222 #endif
1223 }
1224
1225 #else /* TCG_TARGET_REG_BITS == 32 */
1226
1227 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
1228 {
1229 tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index);
1230 }
1231
1232 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
1233 {
1234 tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index);
1235 }
1236
1237 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
1238 {
1239 tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index);
1240 }
1241
1242 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
1243 {
1244 tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index);
1245 }
1246
1247 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
1248 {
1249 tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1250 }
1251
1252 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
1253 {
1254 tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index);
1255 }
1256
1257 static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index)
1258 {
1259 tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index);
1260 }
1261
1262 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
1263 {
1264 tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index);
1265 }
1266
1267 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
1268 {
1269 tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index);
1270 }
1271
1272 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
1273 {
1274 tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index);
1275 }
1276
1277 static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
1278 {
1279 tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index);
1280 }
1281
1282 #endif /* TCG_TARGET_REG_BITS != 32 */