2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #ifdef CONFIG_DYNGEN_OP
27 /* legacy dyngen operations */
31 int gen_new_label(void);
33 static inline void tcg_gen_op1(int opc
, TCGv arg1
)
36 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
39 static inline void tcg_gen_op1i(int opc
, TCGArg arg1
)
42 *gen_opparam_ptr
++ = arg1
;
45 static inline void tcg_gen_op2(int opc
, TCGv arg1
, TCGv arg2
)
48 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
49 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
52 static inline void tcg_gen_op2i(int opc
, TCGv arg1
, TCGArg arg2
)
55 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
56 *gen_opparam_ptr
++ = arg2
;
59 static inline void tcg_gen_op3(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
)
62 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
63 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
64 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
67 static inline void tcg_gen_op3i(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
)
70 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
71 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
72 *gen_opparam_ptr
++ = arg3
;
75 static inline void tcg_gen_op4(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
79 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
80 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
81 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
82 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
85 static inline void tcg_gen_op4i(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
89 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
90 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
91 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
92 *gen_opparam_ptr
++ = arg4
;
95 static inline void tcg_gen_op4ii(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
,
99 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
100 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
101 *gen_opparam_ptr
++ = arg3
;
102 *gen_opparam_ptr
++ = arg4
;
105 static inline void tcg_gen_op5(int opc
, TCGv arg1
, TCGv arg2
,
106 TCGv arg3
, TCGv arg4
,
109 *gen_opc_ptr
++ = opc
;
110 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
111 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
112 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
113 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
114 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
117 static inline void tcg_gen_op5i(int opc
, TCGv arg1
, TCGv arg2
,
118 TCGv arg3
, TCGv arg4
,
121 *gen_opc_ptr
++ = opc
;
122 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
123 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
124 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
125 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
126 *gen_opparam_ptr
++ = arg5
;
129 static inline void tcg_gen_op6(int opc
, TCGv arg1
, TCGv arg2
,
130 TCGv arg3
, TCGv arg4
,
131 TCGv arg5
, TCGv arg6
)
133 *gen_opc_ptr
++ = opc
;
134 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
135 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
136 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
137 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
138 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
139 *gen_opparam_ptr
++ = GET_TCGV(arg6
);
142 static inline void tcg_gen_op6ii(int opc
, TCGv arg1
, TCGv arg2
,
143 TCGv arg3
, TCGv arg4
,
144 TCGArg arg5
, TCGArg arg6
)
146 *gen_opc_ptr
++ = opc
;
147 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
148 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
149 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
150 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
151 *gen_opparam_ptr
++ = arg5
;
152 *gen_opparam_ptr
++ = arg6
;
155 static inline void gen_set_label(int n
)
157 tcg_gen_op1i(INDEX_op_set_label
, n
);
160 static inline void tcg_gen_br(int label
)
162 tcg_gen_op1i(INDEX_op_br
, label
);
165 static inline void tcg_gen_mov_i32(TCGv ret
, TCGv arg
)
167 if (GET_TCGV(ret
) != GET_TCGV(arg
))
168 tcg_gen_op2(INDEX_op_mov_i32
, ret
, arg
);
171 static inline void tcg_gen_movi_i32(TCGv ret
, int32_t arg
)
173 tcg_gen_op2i(INDEX_op_movi_i32
, ret
, arg
);
177 #define TCG_HELPER_CALL_FLAGS 0
179 static inline void tcg_gen_helper_0_0(void *func
)
181 tcg_gen_call(&tcg_ctx
,
182 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
186 static inline void tcg_gen_helper_0_1(void *func
, TCGv arg
)
188 tcg_gen_call(&tcg_ctx
,
189 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
193 static inline void tcg_gen_helper_0_2(void *func
, TCGv arg1
, TCGv arg2
)
198 tcg_gen_call(&tcg_ctx
,
199 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
203 static inline void tcg_gen_helper_0_3(void *func
,
204 TCGv arg1
, TCGv arg2
, TCGv arg3
)
210 tcg_gen_call(&tcg_ctx
,
211 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
215 static inline void tcg_gen_helper_0_4(void *func
, TCGv arg1
, TCGv arg2
,
216 TCGv arg3
, TCGv arg4
)
223 tcg_gen_call(&tcg_ctx
,
224 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
228 static inline void tcg_gen_helper_1_0(void *func
, TCGv ret
)
230 tcg_gen_call(&tcg_ctx
,
231 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
235 static inline void tcg_gen_helper_1_1(void *func
, TCGv ret
, TCGv arg1
)
237 tcg_gen_call(&tcg_ctx
,
238 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
242 static inline void tcg_gen_helper_1_2(void *func
, TCGv ret
,
243 TCGv arg1
, TCGv arg2
)
248 tcg_gen_call(&tcg_ctx
,
249 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
253 static inline void tcg_gen_helper_1_3(void *func
, TCGv ret
,
254 TCGv arg1
, TCGv arg2
, TCGv arg3
)
260 tcg_gen_call(&tcg_ctx
,
261 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
265 static inline void tcg_gen_helper_1_4(void *func
, TCGv ret
,
266 TCGv arg1
, TCGv arg2
, TCGv arg3
,
274 tcg_gen_call(&tcg_ctx
,
275 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
281 static inline void tcg_gen_ld8u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
283 tcg_gen_op3i(INDEX_op_ld8u_i32
, ret
, arg2
, offset
);
286 static inline void tcg_gen_ld8s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
288 tcg_gen_op3i(INDEX_op_ld8s_i32
, ret
, arg2
, offset
);
291 static inline void tcg_gen_ld16u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
293 tcg_gen_op3i(INDEX_op_ld16u_i32
, ret
, arg2
, offset
);
296 static inline void tcg_gen_ld16s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
298 tcg_gen_op3i(INDEX_op_ld16s_i32
, ret
, arg2
, offset
);
301 static inline void tcg_gen_ld_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
303 tcg_gen_op3i(INDEX_op_ld_i32
, ret
, arg2
, offset
);
306 static inline void tcg_gen_st8_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
308 tcg_gen_op3i(INDEX_op_st8_i32
, arg1
, arg2
, offset
);
311 static inline void tcg_gen_st16_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
313 tcg_gen_op3i(INDEX_op_st16_i32
, arg1
, arg2
, offset
);
316 static inline void tcg_gen_st_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
318 tcg_gen_op3i(INDEX_op_st_i32
, arg1
, arg2
, offset
);
321 static inline void tcg_gen_add_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
323 tcg_gen_op3(INDEX_op_add_i32
, ret
, arg1
, arg2
);
326 static inline void tcg_gen_addi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
328 /* some cases can be optimized here */
330 tcg_gen_mov_i32(ret
, arg1
);
332 tcg_gen_add_i32(ret
, arg1
, tcg_const_i32(arg2
));
336 static inline void tcg_gen_sub_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
338 tcg_gen_op3(INDEX_op_sub_i32
, ret
, arg1
, arg2
);
341 static inline void tcg_gen_subi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
343 /* some cases can be optimized here */
345 tcg_gen_mov_i32(ret
, arg1
);
347 tcg_gen_sub_i32(ret
, arg1
, tcg_const_i32(arg2
));
351 static inline void tcg_gen_and_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
353 tcg_gen_op3(INDEX_op_and_i32
, ret
, arg1
, arg2
);
356 static inline void tcg_gen_andi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
358 /* some cases can be optimized here */
360 tcg_gen_movi_i32(ret
, 0);
361 } else if (arg2
== 0xffffffff) {
362 tcg_gen_mov_i32(ret
, arg1
);
364 tcg_gen_and_i32(ret
, arg1
, tcg_const_i32(arg2
));
368 static inline void tcg_gen_or_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
370 tcg_gen_op3(INDEX_op_or_i32
, ret
, arg1
, arg2
);
373 static inline void tcg_gen_ori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
375 /* some cases can be optimized here */
376 if (arg2
== 0xffffffff) {
377 tcg_gen_movi_i32(ret
, 0xffffffff);
378 } else if (arg2
== 0) {
379 tcg_gen_mov_i32(ret
, arg1
);
381 tcg_gen_or_i32(ret
, arg1
, tcg_const_i32(arg2
));
385 static inline void tcg_gen_xor_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
387 tcg_gen_op3(INDEX_op_xor_i32
, ret
, arg1
, arg2
);
390 static inline void tcg_gen_xori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
392 /* some cases can be optimized here */
394 tcg_gen_mov_i32(ret
, arg1
);
396 tcg_gen_xor_i32(ret
, arg1
, tcg_const_i32(arg2
));
400 static inline void tcg_gen_shl_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
402 tcg_gen_op3(INDEX_op_shl_i32
, ret
, arg1
, arg2
);
405 static inline void tcg_gen_shli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
408 tcg_gen_mov_i32(ret
, arg1
);
410 tcg_gen_shl_i32(ret
, arg1
, tcg_const_i32(arg2
));
414 static inline void tcg_gen_shr_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
416 tcg_gen_op3(INDEX_op_shr_i32
, ret
, arg1
, arg2
);
419 static inline void tcg_gen_shri_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
422 tcg_gen_mov_i32(ret
, arg1
);
424 tcg_gen_shr_i32(ret
, arg1
, tcg_const_i32(arg2
));
428 static inline void tcg_gen_sar_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
430 tcg_gen_op3(INDEX_op_sar_i32
, ret
, arg1
, arg2
);
433 static inline void tcg_gen_sari_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
436 tcg_gen_mov_i32(ret
, arg1
);
438 tcg_gen_sar_i32(ret
, arg1
, tcg_const_i32(arg2
));
442 static inline void tcg_gen_brcond_i32(int cond
, TCGv arg1
, TCGv arg2
,
445 tcg_gen_op4ii(INDEX_op_brcond_i32
, arg1
, arg2
, cond
, label_index
);
448 static inline void tcg_gen_mul_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
450 tcg_gen_op3(INDEX_op_mul_i32
, ret
, arg1
, arg2
);
453 static inline void tcg_gen_muli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
455 tcg_gen_mul_i32(ret
, arg1
, tcg_const_i32(arg2
));
458 #ifdef TCG_TARGET_HAS_div_i32
459 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
461 tcg_gen_op3(INDEX_op_div_i32
, ret
, arg1
, arg2
);
464 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
466 tcg_gen_op3(INDEX_op_rem_i32
, ret
, arg1
, arg2
);
469 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
471 tcg_gen_op3(INDEX_op_divu_i32
, ret
, arg1
, arg2
);
474 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
476 tcg_gen_op3(INDEX_op_remu_i32
, ret
, arg1
, arg2
);
479 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
482 t0
= tcg_temp_new(TCG_TYPE_I32
);
483 tcg_gen_sari_i32(t0
, arg1
, 31);
484 tcg_gen_op5(INDEX_op_div2_i32
, ret
, t0
, arg1
, t0
, arg2
);
487 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
490 t0
= tcg_temp_new(TCG_TYPE_I32
);
491 tcg_gen_sari_i32(t0
, arg1
, 31);
492 tcg_gen_op5(INDEX_op_div2_i32
, t0
, ret
, arg1
, t0
, arg2
);
495 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
498 t0
= tcg_temp_new(TCG_TYPE_I32
);
499 tcg_gen_movi_i32(t0
, 0);
500 tcg_gen_op5(INDEX_op_divu2_i32
, ret
, t0
, arg1
, t0
, arg2
);
503 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
506 t0
= tcg_temp_new(TCG_TYPE_I32
);
507 tcg_gen_movi_i32(t0
, 0);
508 tcg_gen_op5(INDEX_op_divu2_i32
, t0
, ret
, arg1
, t0
, arg2
);
512 #if TCG_TARGET_REG_BITS == 32
514 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
516 if (GET_TCGV(ret
) != GET_TCGV(arg
)) {
517 tcg_gen_mov_i32(ret
, arg
);
518 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg
));
522 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
524 tcg_gen_movi_i32(ret
, arg
);
525 tcg_gen_movi_i32(TCGV_HIGH(ret
), arg
>> 32);
528 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
530 tcg_gen_ld8u_i32(ret
, arg2
, offset
);
531 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
534 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
536 tcg_gen_ld8s_i32(ret
, arg2
, offset
);
537 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
540 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
542 tcg_gen_ld16u_i32(ret
, arg2
, offset
);
543 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
546 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
548 tcg_gen_ld16s_i32(ret
, arg2
, offset
);
549 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
552 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
554 tcg_gen_ld_i32(ret
, arg2
, offset
);
555 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
558 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
560 tcg_gen_ld_i32(ret
, arg2
, offset
);
561 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
564 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
566 /* since arg2 and ret have different types, they cannot be the
568 #ifdef TCG_TARGET_WORDS_BIGENDIAN
569 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
);
570 tcg_gen_ld_i32(ret
, arg2
, offset
+ 4);
572 tcg_gen_ld_i32(ret
, arg2
, offset
);
573 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
+ 4);
577 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
579 tcg_gen_st8_i32(arg1
, arg2
, offset
);
582 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
584 tcg_gen_st16_i32(arg1
, arg2
, offset
);
587 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
589 tcg_gen_st_i32(arg1
, arg2
, offset
);
592 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
594 #ifdef TCG_TARGET_WORDS_BIGENDIAN
595 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
);
596 tcg_gen_st_i32(arg1
, arg2
, offset
+ 4);
598 tcg_gen_st_i32(arg1
, arg2
, offset
);
599 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
+ 4);
603 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
605 tcg_gen_op6(INDEX_op_add2_i32
, ret
, TCGV_HIGH(ret
),
606 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
609 static inline void tcg_gen_addi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
611 tcg_gen_add_i64(ret
, arg1
, tcg_const_i64(arg2
));
614 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
616 tcg_gen_op6(INDEX_op_sub2_i32
, ret
, TCGV_HIGH(ret
),
617 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
620 static inline void tcg_gen_subi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
622 tcg_gen_sub_i64(ret
, arg1
, tcg_const_i64(arg2
));
625 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
627 tcg_gen_and_i32(ret
, arg1
, arg2
);
628 tcg_gen_and_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
631 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
633 tcg_gen_andi_i32(ret
, arg1
, arg2
);
634 tcg_gen_andi_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
637 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
639 tcg_gen_or_i32(ret
, arg1
, arg2
);
640 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
643 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
645 tcg_gen_ori_i32(ret
, arg1
, arg2
);
646 tcg_gen_ori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
649 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
651 tcg_gen_xor_i32(ret
, arg1
, arg2
);
652 tcg_gen_xor_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
655 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
657 tcg_gen_xori_i32(ret
, arg1
, arg2
);
658 tcg_gen_xori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
661 /* XXX: use generic code when basic block handling is OK or CPU
662 specific code (x86) */
663 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
665 tcg_gen_helper_1_2(tcg_helper_shl_i64
, ret
, arg1
, arg2
);
668 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
670 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 0, 0);
673 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
675 tcg_gen_helper_1_2(tcg_helper_shr_i64
, ret
, arg1
, arg2
);
678 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
680 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 0);
683 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
685 tcg_gen_helper_1_2(tcg_helper_sar_i64
, ret
, arg1
, arg2
);
688 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
690 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 1);
693 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
696 tcg_gen_op6ii(INDEX_op_brcond2_i32
,
697 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
),
701 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
705 t0
= tcg_temp_new(TCG_TYPE_I64
);
706 t1
= tcg_temp_new(TCG_TYPE_I32
);
708 tcg_gen_op4(INDEX_op_mulu2_i32
, t0
, TCGV_HIGH(t0
), arg1
, arg2
);
710 tcg_gen_mul_i32(t1
, arg1
, TCGV_HIGH(arg2
));
711 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
712 tcg_gen_mul_i32(t1
, TCGV_HIGH(arg1
), arg2
);
713 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
715 tcg_gen_mov_i64(ret
, t0
);
718 static inline void tcg_gen_muli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
720 tcg_gen_mul_i64(ret
, arg1
, tcg_const_i64(arg2
));
723 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
725 tcg_gen_helper_1_2(tcg_helper_div_i64
, ret
, arg1
, arg2
);
728 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
730 tcg_gen_helper_1_2(tcg_helper_rem_i64
, ret
, arg1
, arg2
);
733 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
735 tcg_gen_helper_1_2(tcg_helper_divu_i64
, ret
, arg1
, arg2
);
738 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
740 tcg_gen_helper_1_2(tcg_helper_remu_i64
, ret
, arg1
, arg2
);
745 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
747 if (GET_TCGV(ret
) != GET_TCGV(arg
))
748 tcg_gen_op2(INDEX_op_mov_i64
, ret
, arg
);
751 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
753 tcg_gen_op2i(INDEX_op_movi_i64
, ret
, arg
);
756 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
,
757 tcg_target_long offset
)
759 tcg_gen_op3i(INDEX_op_ld8u_i64
, ret
, arg2
, offset
);
762 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
,
763 tcg_target_long offset
)
765 tcg_gen_op3i(INDEX_op_ld8s_i64
, ret
, arg2
, offset
);
768 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
,
769 tcg_target_long offset
)
771 tcg_gen_op3i(INDEX_op_ld16u_i64
, ret
, arg2
, offset
);
774 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
,
775 tcg_target_long offset
)
777 tcg_gen_op3i(INDEX_op_ld16s_i64
, ret
, arg2
, offset
);
780 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
,
781 tcg_target_long offset
)
783 tcg_gen_op3i(INDEX_op_ld32u_i64
, ret
, arg2
, offset
);
786 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
,
787 tcg_target_long offset
)
789 tcg_gen_op3i(INDEX_op_ld32s_i64
, ret
, arg2
, offset
);
792 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
794 tcg_gen_op3i(INDEX_op_ld_i64
, ret
, arg2
, offset
);
797 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
,
798 tcg_target_long offset
)
800 tcg_gen_op3i(INDEX_op_st8_i64
, arg1
, arg2
, offset
);
803 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
,
804 tcg_target_long offset
)
806 tcg_gen_op3i(INDEX_op_st16_i64
, arg1
, arg2
, offset
);
809 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
,
810 tcg_target_long offset
)
812 tcg_gen_op3i(INDEX_op_st32_i64
, arg1
, arg2
, offset
);
815 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
817 tcg_gen_op3i(INDEX_op_st_i64
, arg1
, arg2
, offset
);
820 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
822 tcg_gen_op3(INDEX_op_add_i64
, ret
, arg1
, arg2
);
825 static inline void tcg_gen_addi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
827 tcg_gen_add_i64(ret
, arg1
, tcg_const_i64(arg2
));
830 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
832 tcg_gen_op3(INDEX_op_sub_i64
, ret
, arg1
, arg2
);
835 static inline void tcg_gen_subi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
837 tcg_gen_sub_i64(ret
, arg1
, tcg_const_i64(arg2
));
840 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
842 tcg_gen_op3(INDEX_op_and_i64
, ret
, arg1
, arg2
);
845 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
847 tcg_gen_and_i64(ret
, arg1
, tcg_const_i64(arg2
));
850 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
852 tcg_gen_op3(INDEX_op_or_i64
, ret
, arg1
, arg2
);
855 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
857 tcg_gen_or_i64(ret
, arg1
, tcg_const_i64(arg2
));
860 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
862 tcg_gen_op3(INDEX_op_xor_i64
, ret
, arg1
, arg2
);
865 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
867 tcg_gen_xor_i64(ret
, arg1
, tcg_const_i64(arg2
));
870 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
872 tcg_gen_op3(INDEX_op_shl_i64
, ret
, arg1
, arg2
);
875 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
878 tcg_gen_mov_i64(ret
, arg1
);
880 tcg_gen_shl_i64(ret
, arg1
, tcg_const_i64(arg2
));
884 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
886 tcg_gen_op3(INDEX_op_shr_i64
, ret
, arg1
, arg2
);
889 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
892 tcg_gen_mov_i64(ret
, arg1
);
894 tcg_gen_shr_i64(ret
, arg1
, tcg_const_i64(arg2
));
898 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
900 tcg_gen_op3(INDEX_op_sar_i64
, ret
, arg1
, arg2
);
903 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
906 tcg_gen_mov_i64(ret
, arg1
);
908 tcg_gen_sar_i64(ret
, arg1
, tcg_const_i64(arg2
));
912 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
915 tcg_gen_op4ii(INDEX_op_brcond_i64
, arg1
, arg2
, cond
, label_index
);
918 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
920 tcg_gen_op3(INDEX_op_mul_i64
, ret
, arg1
, arg2
);
923 static inline void tcg_gen_muli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
925 tcg_gen_mul_i64(ret
, arg1
, tcg_const_i64(arg2
));
928 #ifdef TCG_TARGET_HAS_div_i64
929 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
931 tcg_gen_op3(INDEX_op_div_i64
, ret
, arg1
, arg2
);
934 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
936 tcg_gen_op3(INDEX_op_rem_i64
, ret
, arg1
, arg2
);
939 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
941 tcg_gen_op3(INDEX_op_divu_i64
, ret
, arg1
, arg2
);
944 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
946 tcg_gen_op3(INDEX_op_remu_i64
, ret
, arg1
, arg2
);
949 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
952 t0
= tcg_temp_new(TCG_TYPE_I64
);
953 tcg_gen_sari_i64(t0
, arg1
, 63);
954 tcg_gen_op5(INDEX_op_div2_i64
, ret
, t0
, arg1
, t0
, arg2
);
957 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
960 t0
= tcg_temp_new(TCG_TYPE_I64
);
961 tcg_gen_sari_i64(t0
, arg1
, 63);
962 tcg_gen_op5(INDEX_op_div2_i64
, t0
, ret
, arg1
, t0
, arg2
);
965 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
968 t0
= tcg_temp_new(TCG_TYPE_I64
);
969 tcg_gen_movi_i64(t0
, 0);
970 tcg_gen_op5(INDEX_op_divu2_i64
, ret
, t0
, arg1
, t0
, arg2
);
973 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
976 t0
= tcg_temp_new(TCG_TYPE_I64
);
977 tcg_gen_movi_i64(t0
, 0);
978 tcg_gen_op5(INDEX_op_divu2_i64
, t0
, ret
, arg1
, t0
, arg2
);
984 /***************************************/
985 /* optional operations */
987 static inline void tcg_gen_ext8s_i32(TCGv ret
, TCGv arg
)
989 #ifdef TCG_TARGET_HAS_ext8s_i32
990 tcg_gen_op2(INDEX_op_ext8s_i32
, ret
, arg
);
992 tcg_gen_shli_i32(ret
, arg
, 24);
993 tcg_gen_sari_i32(ret
, ret
, 24);
997 static inline void tcg_gen_ext16s_i32(TCGv ret
, TCGv arg
)
999 #ifdef TCG_TARGET_HAS_ext16s_i32
1000 tcg_gen_op2(INDEX_op_ext16s_i32
, ret
, arg
);
1002 tcg_gen_shli_i32(ret
, arg
, 16);
1003 tcg_gen_sari_i32(ret
, ret
, 16);
1007 /* These are currently just for convenience.
1008 We assume a target will recognise these automatically . */
1009 static inline void tcg_gen_ext8u_i32(TCGv ret
, TCGv arg
)
1011 tcg_gen_andi_i32(ret
, arg
, 0xffu
);
1014 static inline void tcg_gen_ext16u_i32(TCGv ret
, TCGv arg
)
1016 tcg_gen_andi_i32(ret
, arg
, 0xffffu
);
1019 /* Note: we assume the two high bytes are set to zero */
1020 static inline void tcg_gen_bswap16_i32(TCGv ret
, TCGv arg
)
1022 #ifdef TCG_TARGET_HAS_bswap16_i32
1023 tcg_gen_op2(INDEX_op_bswap16_i32
, ret
, arg
);
1026 t0
= tcg_temp_new(TCG_TYPE_I32
);
1027 t1
= tcg_temp_new(TCG_TYPE_I32
);
1029 tcg_gen_shri_i32(t0
, arg
, 8);
1030 tcg_gen_andi_i32(t1
, arg
, 0x000000ff);
1031 tcg_gen_shli_i32(t1
, t1
, 8);
1032 tcg_gen_or_i32(ret
, t0
, t1
);
1036 static inline void tcg_gen_bswap_i32(TCGv ret
, TCGv arg
)
1038 #ifdef TCG_TARGET_HAS_bswap_i32
1039 tcg_gen_op2(INDEX_op_bswap_i32
, ret
, arg
);
1042 t0
= tcg_temp_new(TCG_TYPE_I32
);
1043 t1
= tcg_temp_new(TCG_TYPE_I32
);
1045 tcg_gen_shli_i32(t0
, arg
, 24);
1047 tcg_gen_andi_i32(t1
, arg
, 0x0000ff00);
1048 tcg_gen_shli_i32(t1
, t1
, 8);
1049 tcg_gen_or_i32(t0
, t0
, t1
);
1051 tcg_gen_shri_i32(t1
, arg
, 8);
1052 tcg_gen_andi_i32(t1
, t1
, 0x0000ff00);
1053 tcg_gen_or_i32(t0
, t0
, t1
);
1055 tcg_gen_shri_i32(t1
, arg
, 24);
1056 tcg_gen_or_i32(ret
, t0
, t1
);
1060 #if TCG_TARGET_REG_BITS == 32
1061 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1063 tcg_gen_ext8s_i32(ret
, arg
);
1064 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1067 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1069 tcg_gen_ext16s_i32(ret
, arg
);
1070 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1073 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1075 tcg_gen_mov_i32(ret
, arg
);
1076 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1079 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1081 tcg_gen_ext8u_i32(ret
, arg
);
1082 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1085 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1087 tcg_gen_ext16u_i32(ret
, arg
);
1088 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1091 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1093 tcg_gen_mov_i32(ret
, arg
);
1094 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1097 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1099 tcg_gen_mov_i32(ret
, arg
);
1102 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1104 tcg_gen_mov_i32(ret
, arg
);
1105 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1108 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1110 tcg_gen_mov_i32(ret
, arg
);
1111 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1114 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1117 t0
= tcg_temp_new(TCG_TYPE_I32
);
1118 t1
= tcg_temp_new(TCG_TYPE_I32
);
1120 tcg_gen_bswap_i32(t0
, arg
);
1121 tcg_gen_bswap_i32(t1
, TCGV_HIGH(arg
));
1122 tcg_gen_mov_i32(ret
, t1
);
1123 tcg_gen_mov_i32(TCGV_HIGH(ret
), t0
);
1127 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1129 #ifdef TCG_TARGET_HAS_ext8s_i64
1130 tcg_gen_op2(INDEX_op_ext8s_i64
, ret
, arg
);
1132 tcg_gen_shli_i64(ret
, arg
, 56);
1133 tcg_gen_sari_i64(ret
, ret
, 56);
1137 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1139 #ifdef TCG_TARGET_HAS_ext16s_i64
1140 tcg_gen_op2(INDEX_op_ext16s_i64
, ret
, arg
);
1142 tcg_gen_shli_i64(ret
, arg
, 48);
1143 tcg_gen_sari_i64(ret
, ret
, 48);
1147 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1149 #ifdef TCG_TARGET_HAS_ext32s_i64
1150 tcg_gen_op2(INDEX_op_ext32s_i64
, ret
, arg
);
1152 tcg_gen_shli_i64(ret
, arg
, 32);
1153 tcg_gen_sari_i64(ret
, ret
, 32);
1157 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1159 tcg_gen_andi_i64(ret
, arg
, 0xffu
);
1162 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1164 tcg_gen_andi_i64(ret
, arg
, 0xffffu
);
1167 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1169 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1172 /* Note: we assume the target supports move between 32 and 64 bit
1173 registers. This will probably break MIPS64 targets. */
1174 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1176 tcg_gen_mov_i32(ret
, arg
);
1179 /* Note: we assume the target supports move between 32 and 64 bit
1181 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1183 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1186 /* Note: we assume the target supports move between 32 and 64 bit
1188 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1190 tcg_gen_ext32s_i64(ret
, arg
);
1193 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1195 #ifdef TCG_TARGET_HAS_bswap_i64
1196 tcg_gen_op2(INDEX_op_bswap_i64
, ret
, arg
);
1199 t0
= tcg_temp_new(TCG_TYPE_I32
);
1200 t1
= tcg_temp_new(TCG_TYPE_I32
);
1202 tcg_gen_shli_i64(t0
, arg
, 56);
1204 tcg_gen_andi_i64(t1
, arg
, 0x0000ff00);
1205 tcg_gen_shli_i64(t1
, t1
, 40);
1206 tcg_gen_or_i64(t0
, t0
, t1
);
1208 tcg_gen_andi_i64(t1
, arg
, 0x00ff0000);
1209 tcg_gen_shli_i64(t1
, t1
, 24);
1210 tcg_gen_or_i64(t0
, t0
, t1
);
1212 tcg_gen_andi_i64(t1
, arg
, 0xff000000);
1213 tcg_gen_shli_i64(t1
, t1
, 8);
1214 tcg_gen_or_i64(t0
, t0
, t1
);
1216 tcg_gen_shri_i64(t1
, arg
, 8);
1217 tcg_gen_andi_i64(t1
, t1
, 0xff000000);
1218 tcg_gen_or_i64(t0
, t0
, t1
);
1220 tcg_gen_shri_i64(t1
, arg
, 24);
1221 tcg_gen_andi_i64(t1
, t1
, 0x00ff0000);
1222 tcg_gen_or_i64(t0
, t0
, t1
);
1224 tcg_gen_shri_i64(t1
, arg
, 40);
1225 tcg_gen_andi_i64(t1
, t1
, 0x0000ff00);
1226 tcg_gen_or_i64(t0
, t0
, t1
);
1228 tcg_gen_shri_i64(t1
, arg
, 56);
1229 tcg_gen_or_i64(ret
, t0
, t1
);
1235 static inline void tcg_gen_neg_i32(TCGv ret
, TCGv arg
)
1237 #ifdef TCG_TARGET_HAS_neg_i32
1238 tcg_gen_op2(INDEX_op_neg_i32
, ret
, arg
);
1240 tcg_gen_sub_i32(ret
, tcg_const_i32(0), arg
);
1244 static inline void tcg_gen_neg_i64(TCGv ret
, TCGv arg
)
1246 #ifdef TCG_TARGET_HAS_neg_i64
1247 tcg_gen_op2(INDEX_op_neg_i64
, ret
, arg
);
1249 tcg_gen_sub_i64(ret
, tcg_const_i64(0), arg
);
1253 static inline void tcg_gen_not_i32(TCGv ret
, TCGv arg
)
1255 tcg_gen_xor_i32(ret
, arg
, tcg_const_i32(-1));
1258 static inline void tcg_gen_not_i64(TCGv ret
, TCGv arg
)
1260 tcg_gen_xor_i64(ret
, arg
, tcg_const_i64(-1));
1263 static inline void tcg_gen_discard_i32(TCGv arg
)
1265 tcg_gen_op1(INDEX_op_discard
, arg
);
1268 #if TCG_TARGET_REG_BITS == 32
1269 static inline void tcg_gen_discard_i64(TCGv arg
)
1271 tcg_gen_discard_i32(arg
);
1272 tcg_gen_discard_i32(TCGV_HIGH(arg
));
1275 static inline void tcg_gen_discard_i64(TCGv arg
)
1277 tcg_gen_op1(INDEX_op_discard
, arg
);
1281 /***************************************/
1282 static inline void tcg_gen_macro_2(TCGv ret0
, TCGv ret1
, int macro_id
)
1284 tcg_gen_op3i(INDEX_op_macro_2
, ret0
, ret1
, macro_id
);
1287 /***************************************/
1288 /* QEMU specific operations. Their type depend on the QEMU CPU
1290 #ifndef TARGET_LONG_BITS
1291 #error must include QEMU headers
1294 /* debug info: write the PC of the corresponding QEMU CPU instruction */
1295 static inline void tcg_gen_debug_insn_start(uint64_t pc
)
1297 /* XXX: must really use a 32 bit size for TCGArg in all cases */
1298 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1299 tcg_gen_op2i(INDEX_op_debug_insn_start
,
1300 (uint32_t)(pc
), (uint32_t)(pc
>> 32));
1302 tcg_gen_op1i(INDEX_op_debug_insn_start
, pc
);
1306 static inline void tcg_gen_exit_tb(tcg_target_long val
)
1308 tcg_gen_op1i(INDEX_op_exit_tb
, val
);
1311 static inline void tcg_gen_goto_tb(int idx
)
1313 tcg_gen_op1i(INDEX_op_goto_tb
, idx
);
1316 #if TCG_TARGET_REG_BITS == 32
1317 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1319 #if TARGET_LONG_BITS == 32
1320 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1322 tcg_gen_op4i(INDEX_op_qemu_ld8u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1323 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1327 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1329 #if TARGET_LONG_BITS == 32
1330 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1332 tcg_gen_op4i(INDEX_op_qemu_ld8s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1333 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1337 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1339 #if TARGET_LONG_BITS == 32
1340 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1342 tcg_gen_op4i(INDEX_op_qemu_ld16u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1343 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1347 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1349 #if TARGET_LONG_BITS == 32
1350 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1352 tcg_gen_op4i(INDEX_op_qemu_ld16s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1353 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1357 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1359 #if TARGET_LONG_BITS == 32
1360 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1362 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1363 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1367 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1369 #if TARGET_LONG_BITS == 32
1370 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1372 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1373 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1377 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1379 #if TARGET_LONG_BITS == 32
1380 tcg_gen_op4i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
), addr
, mem_index
);
1382 tcg_gen_op5i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
),
1383 addr
, TCGV_HIGH(addr
), mem_index
);
1387 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1389 #if TARGET_LONG_BITS == 32
1390 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1392 tcg_gen_op4i(INDEX_op_qemu_st8
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1396 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1398 #if TARGET_LONG_BITS == 32
1399 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1401 tcg_gen_op4i(INDEX_op_qemu_st16
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1405 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1407 #if TARGET_LONG_BITS == 32
1408 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1410 tcg_gen_op4i(INDEX_op_qemu_st32
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1414 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1416 #if TARGET_LONG_BITS == 32
1417 tcg_gen_op4i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
), addr
, mem_index
);
1419 tcg_gen_op5i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
),
1420 addr
, TCGV_HIGH(addr
), mem_index
);
1424 #define tcg_gen_ld_ptr tcg_gen_ld_i32
1425 #define tcg_gen_discard_ptr tcg_gen_discard_i32
1427 #else /* TCG_TARGET_REG_BITS == 32 */
1429 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1431 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1434 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1436 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1439 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1441 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1444 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1446 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1449 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1451 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1454 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1456 tcg_gen_op3i(INDEX_op_qemu_ld32s
, ret
, addr
, mem_index
);
1459 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1461 tcg_gen_op3i(INDEX_op_qemu_ld64
, ret
, addr
, mem_index
);
1464 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1466 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1469 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1471 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1474 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1476 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1479 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1481 tcg_gen_op3i(INDEX_op_qemu_st64
, arg
, addr
, mem_index
);
1484 #define tcg_gen_ld_ptr tcg_gen_ld_i64
1485 #define tcg_gen_discard_ptr tcg_gen_discard_i64
1487 #endif /* TCG_TARGET_REG_BITS != 32 */
1489 #if TARGET_LONG_BITS == 64
1490 #define TCG_TYPE_TL TCG_TYPE_I64
1491 #define tcg_gen_movi_tl tcg_gen_movi_i64
1492 #define tcg_gen_mov_tl tcg_gen_mov_i64
1493 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1494 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1495 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1496 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1497 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1498 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1499 #define tcg_gen_ld_tl tcg_gen_ld_i64
1500 #define tcg_gen_st8_tl tcg_gen_st8_i64
1501 #define tcg_gen_st16_tl tcg_gen_st16_i64
1502 #define tcg_gen_st32_tl tcg_gen_st32_i64
1503 #define tcg_gen_st_tl tcg_gen_st_i64
1504 #define tcg_gen_add_tl tcg_gen_add_i64
1505 #define tcg_gen_addi_tl tcg_gen_addi_i64
1506 #define tcg_gen_sub_tl tcg_gen_sub_i64
1507 #define tcg_gen_neg_tl tcg_gen_neg_i64
1508 #define tcg_gen_subi_tl tcg_gen_subi_i64
1509 #define tcg_gen_and_tl tcg_gen_and_i64
1510 #define tcg_gen_andi_tl tcg_gen_andi_i64
1511 #define tcg_gen_or_tl tcg_gen_or_i64
1512 #define tcg_gen_ori_tl tcg_gen_ori_i64
1513 #define tcg_gen_xor_tl tcg_gen_xor_i64
1514 #define tcg_gen_xori_tl tcg_gen_xori_i64
1515 #define tcg_gen_not_tl tcg_gen_not_i64
1516 #define tcg_gen_shl_tl tcg_gen_shl_i64
1517 #define tcg_gen_shli_tl tcg_gen_shli_i64
1518 #define tcg_gen_shr_tl tcg_gen_shr_i64
1519 #define tcg_gen_shri_tl tcg_gen_shri_i64
1520 #define tcg_gen_sar_tl tcg_gen_sar_i64
1521 #define tcg_gen_sari_tl tcg_gen_sari_i64
1522 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1523 #define tcg_gen_mul_tl tcg_gen_mul_i64
1524 #define tcg_gen_muli_tl tcg_gen_muli_i64
1525 #define tcg_gen_discard_tl tcg_gen_discard_i64
1526 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
1527 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1528 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1529 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1530 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1531 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1532 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1533 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1534 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1535 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1536 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1537 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1538 #define tcg_const_tl tcg_const_i64
1540 #define TCG_TYPE_TL TCG_TYPE_I32
1541 #define tcg_gen_movi_tl tcg_gen_movi_i32
1542 #define tcg_gen_mov_tl tcg_gen_mov_i32
1543 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1544 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1545 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1546 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1547 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1548 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1549 #define tcg_gen_ld_tl tcg_gen_ld_i32
1550 #define tcg_gen_st8_tl tcg_gen_st8_i32
1551 #define tcg_gen_st16_tl tcg_gen_st16_i32
1552 #define tcg_gen_st32_tl tcg_gen_st_i32
1553 #define tcg_gen_st_tl tcg_gen_st_i32
1554 #define tcg_gen_add_tl tcg_gen_add_i32
1555 #define tcg_gen_addi_tl tcg_gen_addi_i32
1556 #define tcg_gen_sub_tl tcg_gen_sub_i32
1557 #define tcg_gen_neg_tl tcg_gen_neg_i32
1558 #define tcg_gen_subi_tl tcg_gen_subi_i32
1559 #define tcg_gen_and_tl tcg_gen_and_i32
1560 #define tcg_gen_andi_tl tcg_gen_andi_i32
1561 #define tcg_gen_or_tl tcg_gen_or_i32
1562 #define tcg_gen_ori_tl tcg_gen_ori_i32
1563 #define tcg_gen_xor_tl tcg_gen_xor_i32
1564 #define tcg_gen_xori_tl tcg_gen_xori_i32
1565 #define tcg_gen_not_tl tcg_gen_not_i32
1566 #define tcg_gen_shl_tl tcg_gen_shl_i32
1567 #define tcg_gen_shli_tl tcg_gen_shli_i32
1568 #define tcg_gen_shr_tl tcg_gen_shr_i32
1569 #define tcg_gen_shri_tl tcg_gen_shri_i32
1570 #define tcg_gen_sar_tl tcg_gen_sar_i32
1571 #define tcg_gen_sari_tl tcg_gen_sari_i32
1572 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1573 #define tcg_gen_mul_tl tcg_gen_mul_i32
1574 #define tcg_gen_muli_tl tcg_gen_muli_i32
1575 #define tcg_gen_discard_tl tcg_gen_discard_i32
1576 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1577 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
1578 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1579 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1580 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1581 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1582 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1583 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1584 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1585 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1586 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1587 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1588 #define tcg_const_tl tcg_const_i32
1591 #if TCG_TARGET_REG_BITS == 32
1592 #define tcg_gen_add_ptr tcg_gen_add_i32
1593 #define tcg_gen_addi_ptr tcg_gen_addi_i32
1594 #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
1595 #else /* TCG_TARGET_REG_BITS == 32 */
1596 #define tcg_gen_add_ptr tcg_gen_add_i64
1597 #define tcg_gen_addi_ptr tcg_gen_addi_i64
1598 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
1599 #endif /* TCG_TARGET_REG_BITS != 32 */