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Rename CONFIG_NO_DYNGEN_OP to CONFIG_DYNGEN_OP to avoid double negatives
[qemu.git] / tcg / tcg-op.h
1 /*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "tcg.h"
25
26 #ifdef CONFIG_DYNGEN_OP
27 /* legacy dyngen operations */
28 #include "gen-op.h"
29 #endif
30
31 int gen_new_label(void);
32
33 static inline void tcg_gen_op1(int opc, TCGv arg1)
34 {
35 *gen_opc_ptr++ = opc;
36 *gen_opparam_ptr++ = GET_TCGV(arg1);
37 }
38
39 static inline void tcg_gen_op1i(int opc, TCGArg arg1)
40 {
41 *gen_opc_ptr++ = opc;
42 *gen_opparam_ptr++ = arg1;
43 }
44
45 static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2)
46 {
47 *gen_opc_ptr++ = opc;
48 *gen_opparam_ptr++ = GET_TCGV(arg1);
49 *gen_opparam_ptr++ = GET_TCGV(arg2);
50 }
51
52 static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2)
53 {
54 *gen_opc_ptr++ = opc;
55 *gen_opparam_ptr++ = GET_TCGV(arg1);
56 *gen_opparam_ptr++ = arg2;
57 }
58
59 static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3)
60 {
61 *gen_opc_ptr++ = opc;
62 *gen_opparam_ptr++ = GET_TCGV(arg1);
63 *gen_opparam_ptr++ = GET_TCGV(arg2);
64 *gen_opparam_ptr++ = GET_TCGV(arg3);
65 }
66
67 static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3)
68 {
69 *gen_opc_ptr++ = opc;
70 *gen_opparam_ptr++ = GET_TCGV(arg1);
71 *gen_opparam_ptr++ = GET_TCGV(arg2);
72 *gen_opparam_ptr++ = arg3;
73 }
74
75 static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3,
76 TCGv arg4)
77 {
78 *gen_opc_ptr++ = opc;
79 *gen_opparam_ptr++ = GET_TCGV(arg1);
80 *gen_opparam_ptr++ = GET_TCGV(arg2);
81 *gen_opparam_ptr++ = GET_TCGV(arg3);
82 *gen_opparam_ptr++ = GET_TCGV(arg4);
83 }
84
85 static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3,
86 TCGArg arg4)
87 {
88 *gen_opc_ptr++ = opc;
89 *gen_opparam_ptr++ = GET_TCGV(arg1);
90 *gen_opparam_ptr++ = GET_TCGV(arg2);
91 *gen_opparam_ptr++ = GET_TCGV(arg3);
92 *gen_opparam_ptr++ = arg4;
93 }
94
95 static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3,
96 TCGArg arg4)
97 {
98 *gen_opc_ptr++ = opc;
99 *gen_opparam_ptr++ = GET_TCGV(arg1);
100 *gen_opparam_ptr++ = GET_TCGV(arg2);
101 *gen_opparam_ptr++ = arg3;
102 *gen_opparam_ptr++ = arg4;
103 }
104
105 static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2,
106 TCGv arg3, TCGv arg4,
107 TCGv arg5)
108 {
109 *gen_opc_ptr++ = opc;
110 *gen_opparam_ptr++ = GET_TCGV(arg1);
111 *gen_opparam_ptr++ = GET_TCGV(arg2);
112 *gen_opparam_ptr++ = GET_TCGV(arg3);
113 *gen_opparam_ptr++ = GET_TCGV(arg4);
114 *gen_opparam_ptr++ = GET_TCGV(arg5);
115 }
116
117 static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2,
118 TCGv arg3, TCGv arg4,
119 TCGArg arg5)
120 {
121 *gen_opc_ptr++ = opc;
122 *gen_opparam_ptr++ = GET_TCGV(arg1);
123 *gen_opparam_ptr++ = GET_TCGV(arg2);
124 *gen_opparam_ptr++ = GET_TCGV(arg3);
125 *gen_opparam_ptr++ = GET_TCGV(arg4);
126 *gen_opparam_ptr++ = arg5;
127 }
128
129 static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2,
130 TCGv arg3, TCGv arg4,
131 TCGv arg5, TCGv arg6)
132 {
133 *gen_opc_ptr++ = opc;
134 *gen_opparam_ptr++ = GET_TCGV(arg1);
135 *gen_opparam_ptr++ = GET_TCGV(arg2);
136 *gen_opparam_ptr++ = GET_TCGV(arg3);
137 *gen_opparam_ptr++ = GET_TCGV(arg4);
138 *gen_opparam_ptr++ = GET_TCGV(arg5);
139 *gen_opparam_ptr++ = GET_TCGV(arg6);
140 }
141
142 static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2,
143 TCGv arg3, TCGv arg4,
144 TCGArg arg5, TCGArg arg6)
145 {
146 *gen_opc_ptr++ = opc;
147 *gen_opparam_ptr++ = GET_TCGV(arg1);
148 *gen_opparam_ptr++ = GET_TCGV(arg2);
149 *gen_opparam_ptr++ = GET_TCGV(arg3);
150 *gen_opparam_ptr++ = GET_TCGV(arg4);
151 *gen_opparam_ptr++ = arg5;
152 *gen_opparam_ptr++ = arg6;
153 }
154
155 static inline void gen_set_label(int n)
156 {
157 tcg_gen_op1i(INDEX_op_set_label, n);
158 }
159
160 static inline void tcg_gen_br(int label)
161 {
162 tcg_gen_op1i(INDEX_op_br, label);
163 }
164
165 static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg)
166 {
167 if (ret != arg)
168 tcg_gen_op2(INDEX_op_mov_i32, ret, arg);
169 }
170
171 static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg)
172 {
173 tcg_gen_op2i(INDEX_op_movi_i32, ret, arg);
174 }
175
176 /* helper calls */
177 #define TCG_HELPER_CALL_FLAGS 0
178
179 static inline void tcg_gen_helper_0_0(void *func)
180 {
181 tcg_gen_call(&tcg_ctx,
182 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
183 0, NULL, 0, NULL);
184 }
185
186 static inline void tcg_gen_helper_0_1(void *func, TCGv arg)
187 {
188 tcg_gen_call(&tcg_ctx,
189 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
190 0, NULL, 1, &arg);
191 }
192
193 static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2)
194 {
195 TCGv args[2];
196 args[0] = arg1;
197 args[1] = arg2;
198 tcg_gen_call(&tcg_ctx,
199 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
200 0, NULL, 2, args);
201 }
202
203 static inline void tcg_gen_helper_0_3(void *func,
204 TCGv arg1, TCGv arg2, TCGv arg3)
205 {
206 TCGv args[3];
207 args[0] = arg1;
208 args[1] = arg2;
209 args[2] = arg3;
210 tcg_gen_call(&tcg_ctx,
211 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
212 0, NULL, 3, args);
213 }
214
215 static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2,
216 TCGv arg3, TCGv arg4)
217 {
218 TCGv args[4];
219 args[0] = arg1;
220 args[1] = arg2;
221 args[2] = arg3;
222 args[3] = arg4;
223 tcg_gen_call(&tcg_ctx,
224 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
225 0, NULL, 4, args);
226 }
227
228 static inline void tcg_gen_helper_1_0(void *func, TCGv ret)
229 {
230 tcg_gen_call(&tcg_ctx,
231 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
232 1, &ret, 0, NULL);
233 }
234
235 static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1)
236 {
237 tcg_gen_call(&tcg_ctx,
238 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
239 1, &ret, 1, &arg1);
240 }
241
242 static inline void tcg_gen_helper_1_2(void *func, TCGv ret,
243 TCGv arg1, TCGv arg2)
244 {
245 TCGv args[2];
246 args[0] = arg1;
247 args[1] = arg2;
248 tcg_gen_call(&tcg_ctx,
249 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
250 1, &ret, 2, args);
251 }
252
253 static inline void tcg_gen_helper_1_3(void *func, TCGv ret,
254 TCGv arg1, TCGv arg2, TCGv arg3)
255 {
256 TCGv args[3];
257 args[0] = arg1;
258 args[1] = arg2;
259 args[2] = arg3;
260 tcg_gen_call(&tcg_ctx,
261 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
262 1, &ret, 3, args);
263 }
264
265 static inline void tcg_gen_helper_1_4(void *func, TCGv ret,
266 TCGv arg1, TCGv arg2, TCGv arg3,
267 TCGv arg4)
268 {
269 TCGv args[4];
270 args[0] = arg1;
271 args[1] = arg2;
272 args[2] = arg3;
273 args[3] = arg4;
274 tcg_gen_call(&tcg_ctx,
275 tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
276 1, &ret, 4, args);
277 }
278
279 /* 32 bit ops */
280
281 static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
282 {
283 tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset);
284 }
285
286 static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
287 {
288 tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset);
289 }
290
291 static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
292 {
293 tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset);
294 }
295
296 static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
297 {
298 tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset);
299 }
300
301 static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
302 {
303 tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset);
304 }
305
306 static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset)
307 {
308 tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset);
309 }
310
311 static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset)
312 {
313 tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset);
314 }
315
316 static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset)
317 {
318 tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset);
319 }
320
321 static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2)
322 {
323 tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2);
324 }
325
326 static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2)
327 {
328 /* some cases can be optimized here */
329 if (arg2 == 0) {
330 tcg_gen_mov_i32(ret, arg1);
331 } else {
332 tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2));
333 }
334 }
335
336 static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2)
337 {
338 tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2);
339 }
340
341 static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2)
342 {
343 /* some cases can be optimized here */
344 if (arg2 == 0) {
345 tcg_gen_mov_i32(ret, arg1);
346 } else {
347 tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2));
348 }
349 }
350
351 static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2)
352 {
353 tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2);
354 }
355
356 static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2)
357 {
358 /* some cases can be optimized here */
359 if (arg2 == 0) {
360 tcg_gen_movi_i32(ret, 0);
361 } else if (arg2 == 0xffffffff) {
362 tcg_gen_mov_i32(ret, arg1);
363 } else {
364 tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2));
365 }
366 }
367
368 static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2)
369 {
370 tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2);
371 }
372
373 static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2)
374 {
375 /* some cases can be optimized here */
376 if (arg2 == 0xffffffff) {
377 tcg_gen_movi_i32(ret, 0xffffffff);
378 } else if (arg2 == 0) {
379 tcg_gen_mov_i32(ret, arg1);
380 } else {
381 tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2));
382 }
383 }
384
385 static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2)
386 {
387 tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2);
388 }
389
390 static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2)
391 {
392 /* some cases can be optimized here */
393 if (arg2 == 0) {
394 tcg_gen_mov_i32(ret, arg1);
395 } else {
396 tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2));
397 }
398 }
399
400 static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2)
401 {
402 tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2);
403 }
404
405 static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2)
406 {
407 tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2));
408 }
409
410 static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2)
411 {
412 tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2);
413 }
414
415 static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2)
416 {
417 tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2));
418 }
419
420 static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2)
421 {
422 tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2);
423 }
424
425 static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2)
426 {
427 tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2));
428 }
429
430 static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2,
431 int label_index)
432 {
433 tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
434 }
435
436 static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2)
437 {
438 tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2);
439 }
440
441 static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2)
442 {
443 tcg_gen_mul_i32(ret, arg1, tcg_const_i32(arg2));
444 }
445
446 #ifdef TCG_TARGET_HAS_div_i32
447 static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2)
448 {
449 tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2);
450 }
451
452 static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2)
453 {
454 tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2);
455 }
456
457 static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2)
458 {
459 tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2);
460 }
461
462 static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2)
463 {
464 tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2);
465 }
466 #else
467 static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2)
468 {
469 TCGv t0;
470 t0 = tcg_temp_new(TCG_TYPE_I32);
471 tcg_gen_sari_i32(t0, arg1, 31);
472 tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2);
473 }
474
475 static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2)
476 {
477 TCGv t0;
478 t0 = tcg_temp_new(TCG_TYPE_I32);
479 tcg_gen_sari_i32(t0, arg1, 31);
480 tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2);
481 }
482
483 static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2)
484 {
485 TCGv t0;
486 t0 = tcg_temp_new(TCG_TYPE_I32);
487 tcg_gen_movi_i32(t0, 0);
488 tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2);
489 }
490
491 static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2)
492 {
493 TCGv t0;
494 t0 = tcg_temp_new(TCG_TYPE_I32);
495 tcg_gen_movi_i32(t0, 0);
496 tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2);
497 }
498 #endif
499
500 #if TCG_TARGET_REG_BITS == 32
501
502 static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg)
503 {
504 if (ret != arg) {
505 tcg_gen_mov_i32(ret, arg);
506 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
507 }
508 }
509
510 static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg)
511 {
512 tcg_gen_movi_i32(ret, arg);
513 tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
514 }
515
516 static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
517 {
518 tcg_gen_ld8u_i32(ret, arg2, offset);
519 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
520 }
521
522 static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
523 {
524 tcg_gen_ld8s_i32(ret, arg2, offset);
525 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
526 }
527
528 static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
529 {
530 tcg_gen_ld16u_i32(ret, arg2, offset);
531 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
532 }
533
534 static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
535 {
536 tcg_gen_ld16s_i32(ret, arg2, offset);
537 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
538 }
539
540 static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
541 {
542 tcg_gen_ld_i32(ret, arg2, offset);
543 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
544 }
545
546 static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
547 {
548 tcg_gen_ld_i32(ret, arg2, offset);
549 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
550 }
551
552 static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
553 {
554 /* since arg2 and ret have different types, they cannot be the
555 same temporary */
556 #ifdef TCG_TARGET_WORDS_BIGENDIAN
557 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
558 tcg_gen_ld_i32(ret, arg2, offset + 4);
559 #else
560 tcg_gen_ld_i32(ret, arg2, offset);
561 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
562 #endif
563 }
564
565 static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
566 {
567 tcg_gen_st8_i32(arg1, arg2, offset);
568 }
569
570 static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
571 {
572 tcg_gen_st16_i32(arg1, arg2, offset);
573 }
574
575 static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
576 {
577 tcg_gen_st_i32(arg1, arg2, offset);
578 }
579
580 static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
581 {
582 #ifdef TCG_TARGET_WORDS_BIGENDIAN
583 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset);
584 tcg_gen_st_i32(arg1, arg2, offset + 4);
585 #else
586 tcg_gen_st_i32(arg1, arg2, offset);
587 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
588 #endif
589 }
590
591 static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2)
592 {
593 tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret),
594 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2));
595 }
596
597 static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
598 {
599 tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2));
600 }
601
602 static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2)
603 {
604 tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret),
605 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2));
606 }
607
608 static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
609 {
610 tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2));
611 }
612
613 static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2)
614 {
615 tcg_gen_and_i32(ret, arg1, arg2);
616 tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
617 }
618
619 static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2)
620 {
621 tcg_gen_andi_i32(ret, arg1, arg2);
622 tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
623 }
624
625 static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2)
626 {
627 tcg_gen_or_i32(ret, arg1, arg2);
628 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
629 }
630
631 static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2)
632 {
633 tcg_gen_ori_i32(ret, arg1, arg2);
634 tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
635 }
636
637 static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2)
638 {
639 tcg_gen_xor_i32(ret, arg1, arg2);
640 tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
641 }
642
643 static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2)
644 {
645 tcg_gen_xori_i32(ret, arg1, arg2);
646 tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
647 }
648
649 /* XXX: use generic code when basic block handling is OK or CPU
650 specific code (x86) */
651 static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2)
652 {
653 tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2);
654 }
655
656 static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2)
657 {
658 tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0);
659 }
660
661 static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2)
662 {
663 tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2);
664 }
665
666 static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2)
667 {
668 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0);
669 }
670
671 static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2)
672 {
673 tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2);
674 }
675
676 static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2)
677 {
678 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1);
679 }
680
681 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2,
682 int label_index)
683 {
684 tcg_gen_op6ii(INDEX_op_brcond2_i32,
685 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2),
686 cond, label_index);
687 }
688
689 static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2)
690 {
691 TCGv t0, t1;
692
693 t0 = tcg_temp_new(TCG_TYPE_I64);
694 t1 = tcg_temp_new(TCG_TYPE_I32);
695
696 tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2);
697
698 tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2));
699 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
700 tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2);
701 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
702
703 tcg_gen_mov_i64(ret, t0);
704 }
705
706 static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
707 {
708 tcg_gen_mul_i64(ret, arg1, tcg_const_i64(arg2));
709 }
710
711 static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2)
712 {
713 tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2);
714 }
715
716 static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2)
717 {
718 tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2);
719 }
720
721 static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2)
722 {
723 tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2);
724 }
725
726 static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2)
727 {
728 tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2);
729 }
730
731 #else
732
733 static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg)
734 {
735 if (ret != arg)
736 tcg_gen_op2(INDEX_op_mov_i64, ret, arg);
737 }
738
739 static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg)
740 {
741 tcg_gen_op2i(INDEX_op_movi_i64, ret, arg);
742 }
743
744 static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2,
745 tcg_target_long offset)
746 {
747 tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset);
748 }
749
750 static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2,
751 tcg_target_long offset)
752 {
753 tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset);
754 }
755
756 static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2,
757 tcg_target_long offset)
758 {
759 tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset);
760 }
761
762 static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2,
763 tcg_target_long offset)
764 {
765 tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset);
766 }
767
768 static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2,
769 tcg_target_long offset)
770 {
771 tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset);
772 }
773
774 static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2,
775 tcg_target_long offset)
776 {
777 tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset);
778 }
779
780 static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset)
781 {
782 tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset);
783 }
784
785 static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2,
786 tcg_target_long offset)
787 {
788 tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset);
789 }
790
791 static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2,
792 tcg_target_long offset)
793 {
794 tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset);
795 }
796
797 static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2,
798 tcg_target_long offset)
799 {
800 tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset);
801 }
802
803 static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset)
804 {
805 tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset);
806 }
807
808 static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2)
809 {
810 tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2);
811 }
812
813 static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
814 {
815 tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2));
816 }
817
818 static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2)
819 {
820 tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2);
821 }
822
823 static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
824 {
825 tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2));
826 }
827
828 static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2)
829 {
830 tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2);
831 }
832
833 static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2)
834 {
835 tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2));
836 }
837
838 static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2)
839 {
840 tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2);
841 }
842
843 static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2)
844 {
845 tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2));
846 }
847
848 static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2)
849 {
850 tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2);
851 }
852
853 static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2)
854 {
855 tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2));
856 }
857
858 static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2)
859 {
860 tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2);
861 }
862
863 static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2)
864 {
865 tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2));
866 }
867
868 static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2)
869 {
870 tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2);
871 }
872
873 static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2)
874 {
875 tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2));
876 }
877
878 static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2)
879 {
880 tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2);
881 }
882
883 static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2)
884 {
885 tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2));
886 }
887
888 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2,
889 int label_index)
890 {
891 tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index);
892 }
893
894 static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2)
895 {
896 tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2);
897 }
898
899 static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
900 {
901 tcg_gen_mul_i64(ret, arg1, tcg_const_i64(arg2));
902 }
903
904 #ifdef TCG_TARGET_HAS_div_i64
905 static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2)
906 {
907 tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2);
908 }
909
910 static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2)
911 {
912 tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2);
913 }
914
915 static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2)
916 {
917 tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2);
918 }
919
920 static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2)
921 {
922 tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2);
923 }
924 #else
925 static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2)
926 {
927 TCGv t0;
928 t0 = tcg_temp_new(TCG_TYPE_I64);
929 tcg_gen_sari_i64(t0, arg1, 63);
930 tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2);
931 }
932
933 static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2)
934 {
935 TCGv t0;
936 t0 = tcg_temp_new(TCG_TYPE_I64);
937 tcg_gen_sari_i64(t0, arg1, 63);
938 tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2);
939 }
940
941 static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2)
942 {
943 TCGv t0;
944 t0 = tcg_temp_new(TCG_TYPE_I64);
945 tcg_gen_movi_i64(t0, 0);
946 tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2);
947 }
948
949 static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2)
950 {
951 TCGv t0;
952 t0 = tcg_temp_new(TCG_TYPE_I64);
953 tcg_gen_movi_i64(t0, 0);
954 tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2);
955 }
956 #endif
957
958 #endif
959
960 /***************************************/
961 /* optional operations */
962
963 static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg)
964 {
965 #ifdef TCG_TARGET_HAS_ext8s_i32
966 tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg);
967 #else
968 tcg_gen_shli_i32(ret, arg, 24);
969 tcg_gen_sari_i32(ret, ret, 24);
970 #endif
971 }
972
973 static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg)
974 {
975 #ifdef TCG_TARGET_HAS_ext16s_i32
976 tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg);
977 #else
978 tcg_gen_shli_i32(ret, arg, 16);
979 tcg_gen_sari_i32(ret, ret, 16);
980 #endif
981 }
982
983 /* Note: we assume the two high bytes are set to zero */
984 static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg)
985 {
986 #ifdef TCG_TARGET_HAS_bswap16_i32
987 tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg);
988 #else
989 TCGv t0, t1;
990 t0 = tcg_temp_new(TCG_TYPE_I32);
991 t1 = tcg_temp_new(TCG_TYPE_I32);
992
993 tcg_gen_shri_i32(t0, arg, 8);
994 tcg_gen_andi_i32(t1, arg, 0x000000ff);
995 tcg_gen_shli_i32(t1, t1, 8);
996 tcg_gen_or_i32(ret, t0, t1);
997 #endif
998 }
999
1000 static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg)
1001 {
1002 #ifdef TCG_TARGET_HAS_bswap_i32
1003 tcg_gen_op2(INDEX_op_bswap_i32, ret, arg);
1004 #else
1005 TCGv t0, t1;
1006 t0 = tcg_temp_new(TCG_TYPE_I32);
1007 t1 = tcg_temp_new(TCG_TYPE_I32);
1008
1009 tcg_gen_shli_i32(t0, arg, 24);
1010
1011 tcg_gen_andi_i32(t1, arg, 0x0000ff00);
1012 tcg_gen_shli_i32(t1, t1, 8);
1013 tcg_gen_or_i32(t0, t0, t1);
1014
1015 tcg_gen_shri_i32(t1, arg, 8);
1016 tcg_gen_andi_i32(t1, t1, 0x0000ff00);
1017 tcg_gen_or_i32(t0, t0, t1);
1018
1019 tcg_gen_shri_i32(t1, arg, 24);
1020 tcg_gen_or_i32(ret, t0, t1);
1021 #endif
1022 }
1023
1024 #if TCG_TARGET_REG_BITS == 32
1025 static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg)
1026 {
1027 tcg_gen_ext8s_i32(ret, arg);
1028 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
1029 }
1030
1031 static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg)
1032 {
1033 tcg_gen_ext16s_i32(ret, arg);
1034 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
1035 }
1036
1037 static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg)
1038 {
1039 tcg_gen_mov_i32(ret, arg);
1040 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
1041 }
1042
1043 static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg)
1044 {
1045 tcg_gen_mov_i32(ret, arg);
1046 }
1047
1048 static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg)
1049 {
1050 tcg_gen_mov_i32(ret, arg);
1051 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1052 }
1053
1054 static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg)
1055 {
1056 tcg_gen_mov_i32(ret, arg);
1057 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
1058 }
1059
1060 static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg)
1061 {
1062 TCGv t0, t1;
1063 t0 = tcg_temp_new(TCG_TYPE_I32);
1064 t1 = tcg_temp_new(TCG_TYPE_I32);
1065
1066 tcg_gen_bswap_i32(t0, arg);
1067 tcg_gen_bswap_i32(t1, TCGV_HIGH(arg));
1068 tcg_gen_mov_i32(ret, t1);
1069 tcg_gen_mov_i32(TCGV_HIGH(ret), t0);
1070 }
1071 #else
1072
1073 static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg)
1074 {
1075 #ifdef TCG_TARGET_HAS_ext8s_i64
1076 tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg);
1077 #else
1078 tcg_gen_shli_i64(ret, arg, 56);
1079 tcg_gen_sari_i64(ret, ret, 56);
1080 #endif
1081 }
1082
1083 static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg)
1084 {
1085 #ifdef TCG_TARGET_HAS_ext16s_i64
1086 tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg);
1087 #else
1088 tcg_gen_shli_i64(ret, arg, 48);
1089 tcg_gen_sari_i64(ret, ret, 48);
1090 #endif
1091 }
1092
1093 static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg)
1094 {
1095 #ifdef TCG_TARGET_HAS_ext32s_i64
1096 tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg);
1097 #else
1098 tcg_gen_shli_i64(ret, arg, 32);
1099 tcg_gen_sari_i64(ret, ret, 32);
1100 #endif
1101 }
1102
1103 /* Note: we assume the target supports move between 32 and 64 bit
1104 registers. This will probably break MIPS64 targets. */
1105 static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg)
1106 {
1107 tcg_gen_mov_i32(ret, arg);
1108 }
1109
1110 /* Note: we assume the target supports move between 32 and 64 bit
1111 registers */
1112 static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg)
1113 {
1114 tcg_gen_andi_i64(ret, arg, 0xffffffff);
1115 }
1116
1117 /* Note: we assume the target supports move between 32 and 64 bit
1118 registers */
1119 static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg)
1120 {
1121 tcg_gen_ext32s_i64(ret, arg);
1122 }
1123
1124 static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg)
1125 {
1126 #ifdef TCG_TARGET_HAS_bswap_i64
1127 tcg_gen_op2(INDEX_op_bswap_i64, ret, arg);
1128 #else
1129 TCGv t0, t1;
1130 t0 = tcg_temp_new(TCG_TYPE_I32);
1131 t1 = tcg_temp_new(TCG_TYPE_I32);
1132
1133 tcg_gen_shli_i64(t0, arg, 56);
1134
1135 tcg_gen_andi_i64(t1, arg, 0x0000ff00);
1136 tcg_gen_shli_i64(t1, t1, 40);
1137 tcg_gen_or_i64(t0, t0, t1);
1138
1139 tcg_gen_andi_i64(t1, arg, 0x00ff0000);
1140 tcg_gen_shli_i64(t1, t1, 24);
1141 tcg_gen_or_i64(t0, t0, t1);
1142
1143 tcg_gen_andi_i64(t1, arg, 0xff000000);
1144 tcg_gen_shli_i64(t1, t1, 8);
1145 tcg_gen_or_i64(t0, t0, t1);
1146
1147 tcg_gen_shri_i64(t1, arg, 8);
1148 tcg_gen_andi_i64(t1, t1, 0xff000000);
1149 tcg_gen_or_i64(t0, t0, t1);
1150
1151 tcg_gen_shri_i64(t1, arg, 24);
1152 tcg_gen_andi_i64(t1, t1, 0x00ff0000);
1153 tcg_gen_or_i64(t0, t0, t1);
1154
1155 tcg_gen_shri_i64(t1, arg, 40);
1156 tcg_gen_andi_i64(t1, t1, 0x0000ff00);
1157 tcg_gen_or_i64(t0, t0, t1);
1158
1159 tcg_gen_shri_i64(t1, arg, 56);
1160 tcg_gen_or_i64(ret, t0, t1);
1161 #endif
1162 }
1163
1164 #endif
1165
1166
1167 static inline void tcg_gen_discard_i32(TCGv arg)
1168 {
1169 tcg_gen_op1(INDEX_op_discard, arg);
1170 }
1171
1172 #if TCG_TARGET_REG_BITS == 32
1173 static inline void tcg_gen_discard_i64(TCGv arg)
1174 {
1175 tcg_gen_discard_i32(arg);
1176 tcg_gen_discard_i32(TCGV_HIGH(arg));
1177 }
1178 #else
1179 static inline void tcg_gen_discard_i64(TCGv arg)
1180 {
1181 tcg_gen_op1(INDEX_op_discard, arg);
1182 }
1183 #endif
1184
1185 /***************************************/
1186 static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id)
1187 {
1188 tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id);
1189 }
1190
1191 /***************************************/
1192 /* QEMU specific operations. Their type depend on the QEMU CPU
1193 type. */
1194 #ifndef TARGET_LONG_BITS
1195 #error must include QEMU headers
1196 #endif
1197
1198 static inline void tcg_gen_exit_tb(tcg_target_long val)
1199 {
1200 tcg_gen_op1i(INDEX_op_exit_tb, val);
1201 }
1202
1203 static inline void tcg_gen_goto_tb(int idx)
1204 {
1205 tcg_gen_op1i(INDEX_op_goto_tb, idx);
1206 }
1207
1208 #if TCG_TARGET_REG_BITS == 32
1209 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
1210 {
1211 #if TARGET_LONG_BITS == 32
1212 tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index);
1213 #else
1214 tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index);
1215 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1216 #endif
1217 }
1218
1219 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
1220 {
1221 #if TARGET_LONG_BITS == 32
1222 tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index);
1223 #else
1224 tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index);
1225 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
1226 #endif
1227 }
1228
1229 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
1230 {
1231 #if TARGET_LONG_BITS == 32
1232 tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index);
1233 #else
1234 tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index);
1235 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1236 #endif
1237 }
1238
1239 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
1240 {
1241 #if TARGET_LONG_BITS == 32
1242 tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index);
1243 #else
1244 tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index);
1245 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
1246 #endif
1247 }
1248
1249 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
1250 {
1251 #if TARGET_LONG_BITS == 32
1252 tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1253 #else
1254 tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index);
1255 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1256 #endif
1257 }
1258
1259 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
1260 {
1261 #if TARGET_LONG_BITS == 32
1262 tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1263 #else
1264 tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index);
1265 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
1266 #endif
1267 }
1268
1269 static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index)
1270 {
1271 #if TARGET_LONG_BITS == 32
1272 tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index);
1273 #else
1274 tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret),
1275 addr, TCGV_HIGH(addr), mem_index);
1276 #endif
1277 }
1278
1279 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
1280 {
1281 #if TARGET_LONG_BITS == 32
1282 tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index);
1283 #else
1284 tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index);
1285 #endif
1286 }
1287
1288 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
1289 {
1290 #if TARGET_LONG_BITS == 32
1291 tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index);
1292 #else
1293 tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index);
1294 #endif
1295 }
1296
1297 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
1298 {
1299 #if TARGET_LONG_BITS == 32
1300 tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index);
1301 #else
1302 tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index);
1303 #endif
1304 }
1305
1306 static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
1307 {
1308 #if TARGET_LONG_BITS == 32
1309 tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index);
1310 #else
1311 tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg),
1312 addr, TCGV_HIGH(addr), mem_index);
1313 #endif
1314 }
1315
1316 #define tcg_gen_ld_ptr tcg_gen_ld_i32
1317 #define tcg_gen_discard_ptr tcg_gen_discard_i32
1318
1319 #else /* TCG_TARGET_REG_BITS == 32 */
1320
1321 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
1322 {
1323 tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index);
1324 }
1325
1326 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
1327 {
1328 tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index);
1329 }
1330
1331 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
1332 {
1333 tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index);
1334 }
1335
1336 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
1337 {
1338 tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index);
1339 }
1340
1341 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
1342 {
1343 tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1344 }
1345
1346 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
1347 {
1348 tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index);
1349 }
1350
1351 static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index)
1352 {
1353 tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index);
1354 }
1355
1356 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
1357 {
1358 tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index);
1359 }
1360
1361 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
1362 {
1363 tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index);
1364 }
1365
1366 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
1367 {
1368 tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index);
1369 }
1370
1371 static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
1372 {
1373 tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index);
1374 }
1375
1376 #define tcg_gen_ld_ptr tcg_gen_ld_i64
1377 #define tcg_gen_discard_ptr tcg_gen_discard_i64
1378
1379 #endif /* TCG_TARGET_REG_BITS != 32 */
1380
1381 #if TARGET_LONG_BITS == 64
1382 #define TCG_TYPE_TL TCG_TYPE_I64
1383 #define tcg_gen_movi_tl tcg_gen_movi_i64
1384 #define tcg_gen_mov_tl tcg_gen_mov_i64
1385 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1386 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1387 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1388 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1389 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1390 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1391 #define tcg_gen_ld_tl tcg_gen_ld_i64
1392 #define tcg_gen_st8_tl tcg_gen_st8_i64
1393 #define tcg_gen_st16_tl tcg_gen_st16_i64
1394 #define tcg_gen_st32_tl tcg_gen_st32_i64
1395 #define tcg_gen_st_tl tcg_gen_st_i64
1396 #define tcg_gen_add_tl tcg_gen_add_i64
1397 #define tcg_gen_addi_tl tcg_gen_addi_i64
1398 #define tcg_gen_sub_tl tcg_gen_sub_i64
1399 #define tcg_gen_subi_tl tcg_gen_subi_i64
1400 #define tcg_gen_and_tl tcg_gen_and_i64
1401 #define tcg_gen_andi_tl tcg_gen_andi_i64
1402 #define tcg_gen_or_tl tcg_gen_or_i64
1403 #define tcg_gen_ori_tl tcg_gen_ori_i64
1404 #define tcg_gen_xor_tl tcg_gen_xor_i64
1405 #define tcg_gen_xori_tl tcg_gen_xori_i64
1406 #define tcg_gen_shl_tl tcg_gen_shl_i64
1407 #define tcg_gen_shli_tl tcg_gen_shli_i64
1408 #define tcg_gen_shr_tl tcg_gen_shr_i64
1409 #define tcg_gen_shri_tl tcg_gen_shri_i64
1410 #define tcg_gen_sar_tl tcg_gen_sar_i64
1411 #define tcg_gen_sari_tl tcg_gen_sari_i64
1412 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1413 #define tcg_gen_mul_tl tcg_gen_mul_i64
1414 #define tcg_gen_muli_tl tcg_gen_muli_i64
1415 #define tcg_gen_discard_tl tcg_gen_discard_i64
1416 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
1417 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1418 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1419 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1420 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1421 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1422 #define tcg_const_tl tcg_const_i64
1423 #else
1424 #define TCG_TYPE_TL TCG_TYPE_I32
1425 #define tcg_gen_movi_tl tcg_gen_movi_i32
1426 #define tcg_gen_mov_tl tcg_gen_mov_i32
1427 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1428 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1429 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1430 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1431 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1432 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1433 #define tcg_gen_ld_tl tcg_gen_ld_i32
1434 #define tcg_gen_st8_tl tcg_gen_st8_i32
1435 #define tcg_gen_st16_tl tcg_gen_st16_i32
1436 #define tcg_gen_st32_tl tcg_gen_st_i32
1437 #define tcg_gen_st_tl tcg_gen_st_i32
1438 #define tcg_gen_add_tl tcg_gen_add_i32
1439 #define tcg_gen_addi_tl tcg_gen_addi_i32
1440 #define tcg_gen_sub_tl tcg_gen_sub_i32
1441 #define tcg_gen_subi_tl tcg_gen_subi_i32
1442 #define tcg_gen_and_tl tcg_gen_and_i32
1443 #define tcg_gen_andi_tl tcg_gen_andi_i32
1444 #define tcg_gen_or_tl tcg_gen_or_i32
1445 #define tcg_gen_ori_tl tcg_gen_ori_i32
1446 #define tcg_gen_xor_tl tcg_gen_xor_i32
1447 #define tcg_gen_xori_tl tcg_gen_xori_i32
1448 #define tcg_gen_shl_tl tcg_gen_shl_i32
1449 #define tcg_gen_shli_tl tcg_gen_shli_i32
1450 #define tcg_gen_shr_tl tcg_gen_shr_i32
1451 #define tcg_gen_shri_tl tcg_gen_shri_i32
1452 #define tcg_gen_sar_tl tcg_gen_sar_i32
1453 #define tcg_gen_sari_tl tcg_gen_sari_i32
1454 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1455 #define tcg_gen_mul_tl tcg_gen_mul_i32
1456 #define tcg_gen_muli_tl tcg_gen_muli_i32
1457 #define tcg_gen_discard_tl tcg_gen_discard_i32
1458 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1459 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
1460 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1461 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1462 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1463 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1464 #define tcg_const_tl tcg_const_i32
1465 #endif
1466
1467 #if TCG_TARGET_REG_BITS == 32
1468 #define tcg_gen_addi_ptr tcg_gen_addi_i32
1469 #else /* TCG_TARGET_REG_BITS == 32 */
1470 #define tcg_gen_addi_ptr tcg_gen_addi_i64
1471 #endif /* TCG_TARGET_REG_BITS != 32 */
1472