2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 int gen_new_label(void);
28 static inline void tcg_gen_op1_i32(int opc
, TCGv_i32 arg1
)
31 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
34 static inline void tcg_gen_op1_i64(int opc
, TCGv_i64 arg1
)
37 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
40 static inline void tcg_gen_op1i(int opc
, TCGArg arg1
)
43 *gen_opparam_ptr
++ = arg1
;
46 static inline void tcg_gen_op2_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
)
49 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
50 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
53 static inline void tcg_gen_op2_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
)
56 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
57 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
60 static inline void tcg_gen_op2i_i32(int opc
, TCGv_i32 arg1
, TCGArg arg2
)
63 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
64 *gen_opparam_ptr
++ = arg2
;
67 static inline void tcg_gen_op2i_i64(int opc
, TCGv_i64 arg1
, TCGArg arg2
)
70 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
71 *gen_opparam_ptr
++ = arg2
;
74 static inline void tcg_gen_op2ii(int opc
, TCGArg arg1
, TCGArg arg2
)
77 *gen_opparam_ptr
++ = arg1
;
78 *gen_opparam_ptr
++ = arg2
;
81 static inline void tcg_gen_op3_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
,
85 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
86 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
87 *gen_opparam_ptr
++ = GET_TCGV_I32(arg3
);
90 static inline void tcg_gen_op3_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
,
94 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
95 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
96 *gen_opparam_ptr
++ = GET_TCGV_I64(arg3
);
99 static inline void tcg_gen_op3i_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
,
102 *gen_opc_ptr
++ = opc
;
103 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
104 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
105 *gen_opparam_ptr
++ = arg3
;
108 static inline void tcg_gen_op3i_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
,
111 *gen_opc_ptr
++ = opc
;
112 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
113 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
114 *gen_opparam_ptr
++ = arg3
;
117 static inline void tcg_gen_ldst_op_i32(int opc
, TCGv_i32 val
, TCGv_ptr base
,
120 *gen_opc_ptr
++ = opc
;
121 *gen_opparam_ptr
++ = GET_TCGV_I32(val
);
122 *gen_opparam_ptr
++ = GET_TCGV_PTR(base
);
123 *gen_opparam_ptr
++ = offset
;
126 static inline void tcg_gen_ldst_op_i64(int opc
, TCGv_i64 val
, TCGv_ptr base
,
129 *gen_opc_ptr
++ = opc
;
130 *gen_opparam_ptr
++ = GET_TCGV_I64(val
);
131 *gen_opparam_ptr
++ = GET_TCGV_PTR(base
);
132 *gen_opparam_ptr
++ = offset
;
135 static inline void tcg_gen_qemu_ldst_op_i64_i32(int opc
, TCGv_i64 val
, TCGv_i32 addr
,
138 *gen_opc_ptr
++ = opc
;
139 *gen_opparam_ptr
++ = GET_TCGV_I64(val
);
140 *gen_opparam_ptr
++ = GET_TCGV_I32(addr
);
141 *gen_opparam_ptr
++ = mem_index
;
144 static inline void tcg_gen_qemu_ldst_op_i64_i64(int opc
, TCGv_i64 val
, TCGv_i64 addr
,
147 *gen_opc_ptr
++ = opc
;
148 *gen_opparam_ptr
++ = GET_TCGV_I64(val
);
149 *gen_opparam_ptr
++ = GET_TCGV_I64(addr
);
150 *gen_opparam_ptr
++ = mem_index
;
153 static inline void tcg_gen_op4_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
,
154 TCGv_i32 arg3
, TCGv_i32 arg4
)
156 *gen_opc_ptr
++ = opc
;
157 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
158 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
159 *gen_opparam_ptr
++ = GET_TCGV_I32(arg3
);
160 *gen_opparam_ptr
++ = GET_TCGV_I32(arg4
);
163 static inline void tcg_gen_op4_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
,
164 TCGv_i64 arg3
, TCGv_i64 arg4
)
166 *gen_opc_ptr
++ = opc
;
167 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
168 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
169 *gen_opparam_ptr
++ = GET_TCGV_I64(arg3
);
170 *gen_opparam_ptr
++ = GET_TCGV_I64(arg4
);
173 static inline void tcg_gen_op4i_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
,
174 TCGv_i32 arg3
, TCGArg arg4
)
176 *gen_opc_ptr
++ = opc
;
177 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
178 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
179 *gen_opparam_ptr
++ = GET_TCGV_I32(arg3
);
180 *gen_opparam_ptr
++ = arg4
;
183 static inline void tcg_gen_op4i_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
,
184 TCGv_i64 arg3
, TCGArg arg4
)
186 *gen_opc_ptr
++ = opc
;
187 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
188 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
189 *gen_opparam_ptr
++ = GET_TCGV_I64(arg3
);
190 *gen_opparam_ptr
++ = arg4
;
193 static inline void tcg_gen_op4ii_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
,
194 TCGArg arg3
, TCGArg arg4
)
196 *gen_opc_ptr
++ = opc
;
197 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
198 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
199 *gen_opparam_ptr
++ = arg3
;
200 *gen_opparam_ptr
++ = arg4
;
203 static inline void tcg_gen_op4ii_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
,
204 TCGArg arg3
, TCGArg arg4
)
206 *gen_opc_ptr
++ = opc
;
207 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
208 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
209 *gen_opparam_ptr
++ = arg3
;
210 *gen_opparam_ptr
++ = arg4
;
213 static inline void tcg_gen_op5_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
,
214 TCGv_i32 arg3
, TCGv_i32 arg4
, TCGv_i32 arg5
)
216 *gen_opc_ptr
++ = opc
;
217 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
218 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
219 *gen_opparam_ptr
++ = GET_TCGV_I32(arg3
);
220 *gen_opparam_ptr
++ = GET_TCGV_I32(arg4
);
221 *gen_opparam_ptr
++ = GET_TCGV_I32(arg5
);
224 static inline void tcg_gen_op5_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
,
225 TCGv_i64 arg3
, TCGv_i64 arg4
, TCGv_i64 arg5
)
227 *gen_opc_ptr
++ = opc
;
228 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
229 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
230 *gen_opparam_ptr
++ = GET_TCGV_I64(arg3
);
231 *gen_opparam_ptr
++ = GET_TCGV_I64(arg4
);
232 *gen_opparam_ptr
++ = GET_TCGV_I64(arg5
);
235 static inline void tcg_gen_op5i_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
,
236 TCGv_i32 arg3
, TCGv_i32 arg4
, TCGArg arg5
)
238 *gen_opc_ptr
++ = opc
;
239 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
240 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
241 *gen_opparam_ptr
++ = GET_TCGV_I32(arg3
);
242 *gen_opparam_ptr
++ = GET_TCGV_I32(arg4
);
243 *gen_opparam_ptr
++ = arg5
;
246 static inline void tcg_gen_op5i_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
,
247 TCGv_i64 arg3
, TCGv_i64 arg4
, TCGArg arg5
)
249 *gen_opc_ptr
++ = opc
;
250 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
251 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
252 *gen_opparam_ptr
++ = GET_TCGV_I64(arg3
);
253 *gen_opparam_ptr
++ = GET_TCGV_I64(arg4
);
254 *gen_opparam_ptr
++ = arg5
;
257 static inline void tcg_gen_op6_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
,
258 TCGv_i32 arg3
, TCGv_i32 arg4
, TCGv_i32 arg5
,
261 *gen_opc_ptr
++ = opc
;
262 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
263 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
264 *gen_opparam_ptr
++ = GET_TCGV_I32(arg3
);
265 *gen_opparam_ptr
++ = GET_TCGV_I32(arg4
);
266 *gen_opparam_ptr
++ = GET_TCGV_I32(arg5
);
267 *gen_opparam_ptr
++ = GET_TCGV_I32(arg6
);
270 static inline void tcg_gen_op6_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
,
271 TCGv_i64 arg3
, TCGv_i64 arg4
, TCGv_i64 arg5
,
274 *gen_opc_ptr
++ = opc
;
275 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
276 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
277 *gen_opparam_ptr
++ = GET_TCGV_I64(arg3
);
278 *gen_opparam_ptr
++ = GET_TCGV_I64(arg4
);
279 *gen_opparam_ptr
++ = GET_TCGV_I64(arg5
);
280 *gen_opparam_ptr
++ = GET_TCGV_I64(arg6
);
283 static inline void tcg_gen_op6ii_i32(int opc
, TCGv_i32 arg1
, TCGv_i32 arg2
,
284 TCGv_i32 arg3
, TCGv_i32 arg4
, TCGArg arg5
,
287 *gen_opc_ptr
++ = opc
;
288 *gen_opparam_ptr
++ = GET_TCGV_I32(arg1
);
289 *gen_opparam_ptr
++ = GET_TCGV_I32(arg2
);
290 *gen_opparam_ptr
++ = GET_TCGV_I32(arg3
);
291 *gen_opparam_ptr
++ = GET_TCGV_I32(arg4
);
292 *gen_opparam_ptr
++ = arg5
;
293 *gen_opparam_ptr
++ = arg6
;
296 static inline void tcg_gen_op6ii_i64(int opc
, TCGv_i64 arg1
, TCGv_i64 arg2
,
297 TCGv_i64 arg3
, TCGv_i64 arg4
, TCGArg arg5
,
300 *gen_opc_ptr
++ = opc
;
301 *gen_opparam_ptr
++ = GET_TCGV_I64(arg1
);
302 *gen_opparam_ptr
++ = GET_TCGV_I64(arg2
);
303 *gen_opparam_ptr
++ = GET_TCGV_I64(arg3
);
304 *gen_opparam_ptr
++ = GET_TCGV_I64(arg4
);
305 *gen_opparam_ptr
++ = arg5
;
306 *gen_opparam_ptr
++ = arg6
;
309 static inline void gen_set_label(int n
)
311 tcg_gen_op1i(INDEX_op_set_label
, n
);
314 static inline void tcg_gen_br(int label
)
316 tcg_gen_op1i(INDEX_op_br
, label
);
319 static inline void tcg_gen_mov_i32(TCGv_i32 ret
, TCGv_i32 arg
)
321 if (GET_TCGV_I32(ret
) != GET_TCGV_I32(arg
))
322 tcg_gen_op2_i32(INDEX_op_mov_i32
, ret
, arg
);
325 static inline void tcg_gen_movi_i32(TCGv_i32 ret
, int32_t arg
)
327 tcg_gen_op2i_i32(INDEX_op_movi_i32
, ret
, arg
);
331 static inline void tcg_gen_helperN(void *func
, int flags
, int sizemask
,
332 TCGArg ret
, int nargs
, TCGArg
*args
)
335 fn
= tcg_const_ptr((tcg_target_long
)func
);
336 tcg_gen_callN(&tcg_ctx
, fn
, flags
, sizemask
, ret
,
338 tcg_temp_free_ptr(fn
);
341 /* FIXME: Should this be pure? */
342 static inline void tcg_gen_helper64(void *func
, TCGv_i64 ret
,
343 TCGv_i64 a
, TCGv_i64 b
)
347 fn
= tcg_const_ptr((tcg_target_long
)func
);
348 args
[0] = GET_TCGV_I64(a
);
349 args
[1] = GET_TCGV_I64(b
);
350 tcg_gen_callN(&tcg_ctx
, fn
, 0, 7, GET_TCGV_I64(ret
), 2, args
);
351 tcg_temp_free_ptr(fn
);
356 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret
, TCGv_ptr arg2
, tcg_target_long offset
)
358 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32
, ret
, arg2
, offset
);
361 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret
, TCGv_ptr arg2
, tcg_target_long offset
)
363 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32
, ret
, arg2
, offset
);
366 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret
, TCGv_ptr arg2
, tcg_target_long offset
)
368 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32
, ret
, arg2
, offset
);
371 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret
, TCGv_ptr arg2
, tcg_target_long offset
)
373 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32
, ret
, arg2
, offset
);
376 static inline void tcg_gen_ld_i32(TCGv_i32 ret
, TCGv_ptr arg2
, tcg_target_long offset
)
378 tcg_gen_ldst_op_i32(INDEX_op_ld_i32
, ret
, arg2
, offset
);
381 static inline void tcg_gen_st8_i32(TCGv_i32 arg1
, TCGv_ptr arg2
, tcg_target_long offset
)
383 tcg_gen_ldst_op_i32(INDEX_op_st8_i32
, arg1
, arg2
, offset
);
386 static inline void tcg_gen_st16_i32(TCGv_i32 arg1
, TCGv_ptr arg2
, tcg_target_long offset
)
388 tcg_gen_ldst_op_i32(INDEX_op_st16_i32
, arg1
, arg2
, offset
);
391 static inline void tcg_gen_st_i32(TCGv_i32 arg1
, TCGv_ptr arg2
, tcg_target_long offset
)
393 tcg_gen_ldst_op_i32(INDEX_op_st_i32
, arg1
, arg2
, offset
);
396 static inline void tcg_gen_add_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
398 tcg_gen_op3_i32(INDEX_op_add_i32
, ret
, arg1
, arg2
);
401 static inline void tcg_gen_addi_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
403 /* some cases can be optimized here */
405 tcg_gen_mov_i32(ret
, arg1
);
407 TCGv_i32 t0
= tcg_const_i32(arg2
);
408 tcg_gen_add_i32(ret
, arg1
, t0
);
409 tcg_temp_free_i32(t0
);
413 static inline void tcg_gen_sub_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
415 tcg_gen_op3_i32(INDEX_op_sub_i32
, ret
, arg1
, arg2
);
418 static inline void tcg_gen_subfi_i32(TCGv_i32 ret
, int32_t arg1
, TCGv_i32 arg2
)
420 TCGv_i32 t0
= tcg_const_i32(arg1
);
421 tcg_gen_sub_i32(ret
, t0
, arg2
);
422 tcg_temp_free_i32(t0
);
425 static inline void tcg_gen_subi_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
427 /* some cases can be optimized here */
429 tcg_gen_mov_i32(ret
, arg1
);
431 TCGv_i32 t0
= tcg_const_i32(arg2
);
432 tcg_gen_sub_i32(ret
, arg1
, t0
);
433 tcg_temp_free_i32(t0
);
437 static inline void tcg_gen_and_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
439 tcg_gen_op3_i32(INDEX_op_and_i32
, ret
, arg1
, arg2
);
442 static inline void tcg_gen_andi_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
444 /* some cases can be optimized here */
446 tcg_gen_movi_i32(ret
, 0);
447 } else if (arg2
== 0xffffffff) {
448 tcg_gen_mov_i32(ret
, arg1
);
450 TCGv_i32 t0
= tcg_const_i32(arg2
);
451 tcg_gen_and_i32(ret
, arg1
, t0
);
452 tcg_temp_free_i32(t0
);
456 static inline void tcg_gen_or_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
458 tcg_gen_op3_i32(INDEX_op_or_i32
, ret
, arg1
, arg2
);
461 static inline void tcg_gen_ori_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
463 /* some cases can be optimized here */
464 if (arg2
== 0xffffffff) {
465 tcg_gen_movi_i32(ret
, 0xffffffff);
466 } else if (arg2
== 0) {
467 tcg_gen_mov_i32(ret
, arg1
);
469 TCGv_i32 t0
= tcg_const_i32(arg2
);
470 tcg_gen_or_i32(ret
, arg1
, t0
);
471 tcg_temp_free_i32(t0
);
475 static inline void tcg_gen_xor_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
477 tcg_gen_op3_i32(INDEX_op_xor_i32
, ret
, arg1
, arg2
);
480 static inline void tcg_gen_xori_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
482 /* some cases can be optimized here */
484 tcg_gen_mov_i32(ret
, arg1
);
486 TCGv_i32 t0
= tcg_const_i32(arg2
);
487 tcg_gen_xor_i32(ret
, arg1
, t0
);
488 tcg_temp_free_i32(t0
);
492 static inline void tcg_gen_shl_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
494 tcg_gen_op3_i32(INDEX_op_shl_i32
, ret
, arg1
, arg2
);
497 static inline void tcg_gen_shli_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
500 tcg_gen_mov_i32(ret
, arg1
);
502 TCGv_i32 t0
= tcg_const_i32(arg2
);
503 tcg_gen_shl_i32(ret
, arg1
, t0
);
504 tcg_temp_free_i32(t0
);
508 static inline void tcg_gen_shr_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
510 tcg_gen_op3_i32(INDEX_op_shr_i32
, ret
, arg1
, arg2
);
513 static inline void tcg_gen_shri_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
516 tcg_gen_mov_i32(ret
, arg1
);
518 TCGv_i32 t0
= tcg_const_i32(arg2
);
519 tcg_gen_shr_i32(ret
, arg1
, t0
);
520 tcg_temp_free_i32(t0
);
524 static inline void tcg_gen_sar_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
526 tcg_gen_op3_i32(INDEX_op_sar_i32
, ret
, arg1
, arg2
);
529 static inline void tcg_gen_sari_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
532 tcg_gen_mov_i32(ret
, arg1
);
534 TCGv_i32 t0
= tcg_const_i32(arg2
);
535 tcg_gen_sar_i32(ret
, arg1
, t0
);
536 tcg_temp_free_i32(t0
);
540 static inline void tcg_gen_brcond_i32(int cond
, TCGv_i32 arg1
, TCGv_i32 arg2
,
543 tcg_gen_op4ii_i32(INDEX_op_brcond_i32
, arg1
, arg2
, cond
, label_index
);
546 static inline void tcg_gen_brcondi_i32(int cond
, TCGv_i32 arg1
, int32_t arg2
,
549 TCGv_i32 t0
= tcg_const_i32(arg2
);
550 tcg_gen_brcond_i32(cond
, arg1
, t0
, label_index
);
551 tcg_temp_free_i32(t0
);
554 static inline void tcg_gen_mul_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
556 tcg_gen_op3_i32(INDEX_op_mul_i32
, ret
, arg1
, arg2
);
559 static inline void tcg_gen_muli_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
561 TCGv_i32 t0
= tcg_const_i32(arg2
);
562 tcg_gen_mul_i32(ret
, arg1
, t0
);
563 tcg_temp_free_i32(t0
);
566 #ifdef TCG_TARGET_HAS_div_i32
567 static inline void tcg_gen_div_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
569 tcg_gen_op3_i32(INDEX_op_div_i32
, ret
, arg1
, arg2
);
572 static inline void tcg_gen_rem_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
574 tcg_gen_op3_i32(INDEX_op_rem_i32
, ret
, arg1
, arg2
);
577 static inline void tcg_gen_divu_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
579 tcg_gen_op3_i32(INDEX_op_divu_i32
, ret
, arg1
, arg2
);
582 static inline void tcg_gen_remu_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
584 tcg_gen_op3_i32(INDEX_op_remu_i32
, ret
, arg1
, arg2
);
587 static inline void tcg_gen_div_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
590 t0
= tcg_temp_new_i32();
591 tcg_gen_sari_i32(t0
, arg1
, 31);
592 tcg_gen_op5_i32(INDEX_op_div2_i32
, ret
, t0
, arg1
, t0
, arg2
);
593 tcg_temp_free_i32(t0
);
596 static inline void tcg_gen_rem_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
599 t0
= tcg_temp_new_i32();
600 tcg_gen_sari_i32(t0
, arg1
, 31);
601 tcg_gen_op5_i32(INDEX_op_div2_i32
, t0
, ret
, arg1
, t0
, arg2
);
602 tcg_temp_free_i32(t0
);
605 static inline void tcg_gen_divu_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
608 t0
= tcg_temp_new_i32();
609 tcg_gen_movi_i32(t0
, 0);
610 tcg_gen_op5_i32(INDEX_op_divu2_i32
, ret
, t0
, arg1
, t0
, arg2
);
611 tcg_temp_free_i32(t0
);
614 static inline void tcg_gen_remu_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
617 t0
= tcg_temp_new_i32();
618 tcg_gen_movi_i32(t0
, 0);
619 tcg_gen_op5_i32(INDEX_op_divu2_i32
, t0
, ret
, arg1
, t0
, arg2
);
620 tcg_temp_free_i32(t0
);
624 #if TCG_TARGET_REG_BITS == 32
626 static inline void tcg_gen_mov_i64(TCGv_i64 ret
, TCGv_i64 arg
)
628 if (GET_TCGV_I64(ret
) != GET_TCGV_I64(arg
)) {
629 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg
));
630 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg
));
634 static inline void tcg_gen_movi_i64(TCGv_i64 ret
, int64_t arg
)
636 tcg_gen_movi_i32(TCGV_LOW(ret
), arg
);
637 tcg_gen_movi_i32(TCGV_HIGH(ret
), arg
>> 32);
640 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret
, TCGv_ptr arg2
,
641 tcg_target_long offset
)
643 tcg_gen_ld8u_i32(TCGV_LOW(ret
), arg2
, offset
);
644 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
647 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret
, TCGv_ptr arg2
,
648 tcg_target_long offset
)
650 tcg_gen_ld8s_i32(TCGV_LOW(ret
), arg2
, offset
);
651 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), 31);
654 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret
, TCGv_ptr arg2
,
655 tcg_target_long offset
)
657 tcg_gen_ld16u_i32(TCGV_LOW(ret
), arg2
, offset
);
658 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
661 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret
, TCGv_ptr arg2
,
662 tcg_target_long offset
)
664 tcg_gen_ld16s_i32(TCGV_LOW(ret
), arg2
, offset
);
665 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_LOW(ret
), 31);
668 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret
, TCGv_ptr arg2
,
669 tcg_target_long offset
)
671 tcg_gen_ld_i32(TCGV_LOW(ret
), arg2
, offset
);
672 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
675 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret
, TCGv_ptr arg2
,
676 tcg_target_long offset
)
678 tcg_gen_ld_i32(TCGV_LOW(ret
), arg2
, offset
);
679 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_LOW(ret
), 31);
682 static inline void tcg_gen_ld_i64(TCGv_i64 ret
, TCGv_ptr arg2
,
683 tcg_target_long offset
)
685 /* since arg2 and ret have different types, they cannot be the
687 #ifdef TCG_TARGET_WORDS_BIGENDIAN
688 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
);
689 tcg_gen_ld_i32(TCGV_LOW(ret
), arg2
, offset
+ 4);
691 tcg_gen_ld_i32(TCGV_LOW(ret
), arg2
, offset
);
692 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
+ 4);
696 static inline void tcg_gen_st8_i64(TCGv_i64 arg1
, TCGv_ptr arg2
,
697 tcg_target_long offset
)
699 tcg_gen_st8_i32(TCGV_LOW(arg1
), arg2
, offset
);
702 static inline void tcg_gen_st16_i64(TCGv_i64 arg1
, TCGv_ptr arg2
,
703 tcg_target_long offset
)
705 tcg_gen_st16_i32(TCGV_LOW(arg1
), arg2
, offset
);
708 static inline void tcg_gen_st32_i64(TCGv_i64 arg1
, TCGv_ptr arg2
,
709 tcg_target_long offset
)
711 tcg_gen_st_i32(TCGV_LOW(arg1
), arg2
, offset
);
714 static inline void tcg_gen_st_i64(TCGv_i64 arg1
, TCGv_ptr arg2
,
715 tcg_target_long offset
)
717 #ifdef TCG_TARGET_WORDS_BIGENDIAN
718 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
);
719 tcg_gen_st_i32(TCGV_LOW(arg1
), arg2
, offset
+ 4);
721 tcg_gen_st_i32(TCGV_LOW(arg1
), arg2
, offset
);
722 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
+ 4);
726 static inline void tcg_gen_add_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
728 tcg_gen_op6_i32(INDEX_op_add2_i32
, TCGV_LOW(ret
), TCGV_HIGH(ret
),
729 TCGV_LOW(arg1
), TCGV_HIGH(arg1
), TCGV_LOW(arg2
),
733 static inline void tcg_gen_sub_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
735 tcg_gen_op6_i32(INDEX_op_sub2_i32
, TCGV_LOW(ret
), TCGV_HIGH(ret
),
736 TCGV_LOW(arg1
), TCGV_HIGH(arg1
), TCGV_LOW(arg2
),
740 static inline void tcg_gen_and_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
742 tcg_gen_and_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), TCGV_LOW(arg2
));
743 tcg_gen_and_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
746 static inline void tcg_gen_andi_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
748 tcg_gen_andi_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), arg2
);
749 tcg_gen_andi_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
752 static inline void tcg_gen_or_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
754 tcg_gen_or_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), TCGV_LOW(arg2
));
755 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
758 static inline void tcg_gen_ori_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
760 tcg_gen_ori_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), arg2
);
761 tcg_gen_ori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
764 static inline void tcg_gen_xor_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
766 tcg_gen_xor_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), TCGV_LOW(arg2
));
767 tcg_gen_xor_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
770 static inline void tcg_gen_xori_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
772 tcg_gen_xori_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), arg2
);
773 tcg_gen_xori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
776 /* XXX: use generic code when basic block handling is OK or CPU
777 specific code (x86) */
778 static inline void tcg_gen_shl_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
780 tcg_gen_helper64(tcg_helper_shl_i64
, ret
, arg1
, arg2
);
783 static inline void tcg_gen_shli_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
785 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 0, 0);
788 static inline void tcg_gen_shr_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
790 tcg_gen_helper64(tcg_helper_shr_i64
, ret
, arg1
, arg2
);
793 static inline void tcg_gen_shri_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
795 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 0);
798 static inline void tcg_gen_sar_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
800 tcg_gen_helper64(tcg_helper_sar_i64
, ret
, arg1
, arg2
);
803 static inline void tcg_gen_sari_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
805 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 1);
808 static inline void tcg_gen_brcond_i64(int cond
, TCGv_i64 arg1
, TCGv_i64 arg2
,
811 tcg_gen_op6ii_i32(INDEX_op_brcond2_i32
,
812 TCGV_LOW(arg1
), TCGV_HIGH(arg1
), TCGV_LOW(arg2
),
813 TCGV_HIGH(arg2
), cond
, label_index
);
816 static inline void tcg_gen_mul_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
821 t0
= tcg_temp_new_i64();
822 t1
= tcg_temp_new_i32();
824 tcg_gen_op4_i32(INDEX_op_mulu2_i32
, TCGV_LOW(t0
), TCGV_HIGH(t0
),
825 TCGV_LOW(arg1
), TCGV_LOW(arg2
));
827 tcg_gen_mul_i32(t1
, TCGV_LOW(arg1
), TCGV_HIGH(arg2
));
828 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
829 tcg_gen_mul_i32(t1
, TCGV_HIGH(arg1
), TCGV_LOW(arg2
));
830 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
832 tcg_gen_mov_i64(ret
, t0
);
833 tcg_temp_free_i64(t0
);
834 tcg_temp_free_i32(t1
);
837 static inline void tcg_gen_div_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
839 tcg_gen_helper64(tcg_helper_div_i64
, ret
, arg1
, arg2
);
842 static inline void tcg_gen_rem_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
844 tcg_gen_helper64(tcg_helper_rem_i64
, ret
, arg1
, arg2
);
847 static inline void tcg_gen_divu_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
849 tcg_gen_helper64(tcg_helper_divu_i64
, ret
, arg1
, arg2
);
852 static inline void tcg_gen_remu_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
854 tcg_gen_helper64(tcg_helper_remu_i64
, ret
, arg1
, arg2
);
859 static inline void tcg_gen_mov_i64(TCGv_i64 ret
, TCGv_i64 arg
)
861 if (GET_TCGV_I64(ret
) != GET_TCGV_I64(arg
))
862 tcg_gen_op2_i64(INDEX_op_mov_i64
, ret
, arg
);
865 static inline void tcg_gen_movi_i64(TCGv_i64 ret
, int64_t arg
)
867 tcg_gen_op2i_i64(INDEX_op_movi_i64
, ret
, arg
);
870 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret
, TCGv_i64 arg2
,
871 tcg_target_long offset
)
873 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64
, ret
, arg2
, offset
);
876 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret
, TCGv_i64 arg2
,
877 tcg_target_long offset
)
879 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64
, ret
, arg2
, offset
);
882 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret
, TCGv_i64 arg2
,
883 tcg_target_long offset
)
885 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64
, ret
, arg2
, offset
);
888 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret
, TCGv_i64 arg2
,
889 tcg_target_long offset
)
891 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64
, ret
, arg2
, offset
);
894 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret
, TCGv_i64 arg2
,
895 tcg_target_long offset
)
897 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64
, ret
, arg2
, offset
);
900 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret
, TCGv_i64 arg2
,
901 tcg_target_long offset
)
903 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64
, ret
, arg2
, offset
);
906 static inline void tcg_gen_ld_i64(TCGv_i64 ret
, TCGv_i64 arg2
, tcg_target_long offset
)
908 tcg_gen_ldst_op_i64(INDEX_op_ld_i64
, ret
, arg2
, offset
);
911 static inline void tcg_gen_st8_i64(TCGv_i64 arg1
, TCGv_i64 arg2
,
912 tcg_target_long offset
)
914 tcg_gen_ldst_op_i64(INDEX_op_st8_i64
, arg1
, arg2
, offset
);
917 static inline void tcg_gen_st16_i64(TCGv_i64 arg1
, TCGv_i64 arg2
,
918 tcg_target_long offset
)
920 tcg_gen_ldst_op_i64(INDEX_op_st16_i64
, arg1
, arg2
, offset
);
923 static inline void tcg_gen_st32_i64(TCGv_i64 arg1
, TCGv_i64 arg2
,
924 tcg_target_long offset
)
926 tcg_gen_ldst_op_i64(INDEX_op_st32_i64
, arg1
, arg2
, offset
);
929 static inline void tcg_gen_st_i64(TCGv_i64 arg1
, TCGv_i64 arg2
, tcg_target_long offset
)
931 tcg_gen_ldst_op_i64(INDEX_op_st_i64
, arg1
, arg2
, offset
);
934 static inline void tcg_gen_add_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
936 tcg_gen_op3_i64(INDEX_op_add_i64
, ret
, arg1
, arg2
);
939 static inline void tcg_gen_sub_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
941 tcg_gen_op3_i64(INDEX_op_sub_i64
, ret
, arg1
, arg2
);
944 static inline void tcg_gen_and_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
946 tcg_gen_op3_i64(INDEX_op_and_i64
, ret
, arg1
, arg2
);
949 static inline void tcg_gen_andi_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
951 TCGv_i64 t0
= tcg_const_i64(arg2
);
952 tcg_gen_and_i64(ret
, arg1
, t0
);
953 tcg_temp_free_i64(t0
);
956 static inline void tcg_gen_or_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
958 tcg_gen_op3_i64(INDEX_op_or_i64
, ret
, arg1
, arg2
);
961 static inline void tcg_gen_ori_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
963 TCGv_i64 t0
= tcg_const_i64(arg2
);
964 tcg_gen_or_i64(ret
, arg1
, t0
);
965 tcg_temp_free_i64(t0
);
968 static inline void tcg_gen_xor_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
970 tcg_gen_op3_i64(INDEX_op_xor_i64
, ret
, arg1
, arg2
);
973 static inline void tcg_gen_xori_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
975 TCGv_i64 t0
= tcg_const_i64(arg2
);
976 tcg_gen_xor_i64(ret
, arg1
, t0
);
977 tcg_temp_free_i64(t0
);
980 static inline void tcg_gen_shl_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
982 tcg_gen_op3_i64(INDEX_op_shl_i64
, ret
, arg1
, arg2
);
985 static inline void tcg_gen_shli_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
988 tcg_gen_mov_i64(ret
, arg1
);
990 TCGv_i64 t0
= tcg_const_i64(arg2
);
991 tcg_gen_shl_i64(ret
, arg1
, t0
);
992 tcg_temp_free_i64(t0
);
996 static inline void tcg_gen_shr_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
998 tcg_gen_op3_i64(INDEX_op_shr_i64
, ret
, arg1
, arg2
);
1001 static inline void tcg_gen_shri_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
1004 tcg_gen_mov_i64(ret
, arg1
);
1006 TCGv_i64 t0
= tcg_const_i64(arg2
);
1007 tcg_gen_shr_i64(ret
, arg1
, t0
);
1008 tcg_temp_free_i64(t0
);
1012 static inline void tcg_gen_sar_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1014 tcg_gen_op3_i64(INDEX_op_sar_i64
, ret
, arg1
, arg2
);
1017 static inline void tcg_gen_sari_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
1020 tcg_gen_mov_i64(ret
, arg1
);
1022 TCGv_i64 t0
= tcg_const_i64(arg2
);
1023 tcg_gen_sar_i64(ret
, arg1
, t0
);
1024 tcg_temp_free_i64(t0
);
1028 static inline void tcg_gen_brcond_i64(int cond
, TCGv_i64 arg1
, TCGv_i64 arg2
,
1031 tcg_gen_op4ii_i64(INDEX_op_brcond_i64
, arg1
, arg2
, cond
, label_index
);
1034 static inline void tcg_gen_mul_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1036 tcg_gen_op3_i64(INDEX_op_mul_i64
, ret
, arg1
, arg2
);
1039 #ifdef TCG_TARGET_HAS_div_i64
1040 static inline void tcg_gen_div_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1042 tcg_gen_op3_i64(INDEX_op_div_i64
, ret
, arg1
, arg2
);
1045 static inline void tcg_gen_rem_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1047 tcg_gen_op3_i64(INDEX_op_rem_i64
, ret
, arg1
, arg2
);
1050 static inline void tcg_gen_divu_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1052 tcg_gen_op3_i64(INDEX_op_divu_i64
, ret
, arg1
, arg2
);
1055 static inline void tcg_gen_remu_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1057 tcg_gen_op3_i64(INDEX_op_remu_i64
, ret
, arg1
, arg2
);
1060 static inline void tcg_gen_div_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1063 t0
= tcg_temp_new_i64();
1064 tcg_gen_sari_i64(t0
, arg1
, 63);
1065 tcg_gen_op5_i64(INDEX_op_div2_i64
, ret
, t0
, arg1
, t0
, arg2
);
1066 tcg_temp_free_i64(t0
);
1069 static inline void tcg_gen_rem_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1072 t0
= tcg_temp_new_i64();
1073 tcg_gen_sari_i64(t0
, arg1
, 63);
1074 tcg_gen_op5_i64(INDEX_op_div2_i64
, t0
, ret
, arg1
, t0
, arg2
);
1075 tcg_temp_free_i64(t0
);
1078 static inline void tcg_gen_divu_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1081 t0
= tcg_temp_new_i64();
1082 tcg_gen_movi_i64(t0
, 0);
1083 tcg_gen_op5_i64(INDEX_op_divu2_i64
, ret
, t0
, arg1
, t0
, arg2
);
1084 tcg_temp_free_i64(t0
);
1087 static inline void tcg_gen_remu_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1090 t0
= tcg_temp_new_i64();
1091 tcg_gen_movi_i64(t0
, 0);
1092 tcg_gen_op5_i64(INDEX_op_divu2_i64
, t0
, ret
, arg1
, t0
, arg2
);
1093 tcg_temp_free_i64(t0
);
1099 static inline void tcg_gen_addi_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
1101 /* some cases can be optimized here */
1103 tcg_gen_mov_i64(ret
, arg1
);
1105 TCGv_i64 t0
= tcg_const_i64(arg2
);
1106 tcg_gen_add_i64(ret
, arg1
, t0
);
1107 tcg_temp_free_i64(t0
);
1111 static inline void tcg_gen_subfi_i64(TCGv_i64 ret
, int64_t arg1
, TCGv_i64 arg2
)
1113 TCGv_i64 t0
= tcg_const_i64(arg1
);
1114 tcg_gen_sub_i64(ret
, t0
, arg2
);
1115 tcg_temp_free_i64(t0
);
1118 static inline void tcg_gen_subi_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
1120 /* some cases can be optimized here */
1122 tcg_gen_mov_i64(ret
, arg1
);
1124 TCGv_i64 t0
= tcg_const_i64(arg2
);
1125 tcg_gen_sub_i64(ret
, arg1
, t0
);
1126 tcg_temp_free_i64(t0
);
1129 static inline void tcg_gen_brcondi_i64(int cond
, TCGv_i64 arg1
, int64_t arg2
,
1132 TCGv_i64 t0
= tcg_const_i64(arg2
);
1133 tcg_gen_brcond_i64(cond
, arg1
, t0
, label_index
);
1134 tcg_temp_free_i64(t0
);
1137 static inline void tcg_gen_muli_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
1139 TCGv_i64 t0
= tcg_const_i64(arg2
);
1140 tcg_gen_mul_i64(ret
, arg1
, t0
);
1141 tcg_temp_free_i64(t0
);
1145 /***************************************/
1146 /* optional operations */
1148 static inline void tcg_gen_ext8s_i32(TCGv_i32 ret
, TCGv_i32 arg
)
1150 #ifdef TCG_TARGET_HAS_ext8s_i32
1151 tcg_gen_op2_i32(INDEX_op_ext8s_i32
, ret
, arg
);
1153 tcg_gen_shli_i32(ret
, arg
, 24);
1154 tcg_gen_sari_i32(ret
, ret
, 24);
1158 static inline void tcg_gen_ext16s_i32(TCGv_i32 ret
, TCGv_i32 arg
)
1160 #ifdef TCG_TARGET_HAS_ext16s_i32
1161 tcg_gen_op2_i32(INDEX_op_ext16s_i32
, ret
, arg
);
1163 tcg_gen_shli_i32(ret
, arg
, 16);
1164 tcg_gen_sari_i32(ret
, ret
, 16);
1168 /* These are currently just for convenience.
1169 We assume a target will recognise these automatically . */
1170 static inline void tcg_gen_ext8u_i32(TCGv_i32 ret
, TCGv_i32 arg
)
1172 tcg_gen_andi_i32(ret
, arg
, 0xffu
);
1175 static inline void tcg_gen_ext16u_i32(TCGv_i32 ret
, TCGv_i32 arg
)
1177 tcg_gen_andi_i32(ret
, arg
, 0xffffu
);
1180 /* Note: we assume the two high bytes are set to zero */
1181 static inline void tcg_gen_bswap16_i32(TCGv_i32 ret
, TCGv_i32 arg
)
1183 #ifdef TCG_TARGET_HAS_bswap16_i32
1184 tcg_gen_op2_i32(INDEX_op_bswap16_i32
, ret
, arg
);
1187 t0
= tcg_temp_new_i32();
1188 t1
= tcg_temp_new_i32();
1190 tcg_gen_shri_i32(t0
, arg
, 8);
1191 tcg_gen_andi_i32(t1
, arg
, 0x000000ff);
1192 tcg_gen_shli_i32(t1
, t1
, 8);
1193 tcg_gen_or_i32(ret
, t0
, t1
);
1194 tcg_temp_free_i32(t0
);
1195 tcg_temp_free_i32(t1
);
1199 static inline void tcg_gen_bswap_i32(TCGv_i32 ret
, TCGv_i32 arg
)
1201 #ifdef TCG_TARGET_HAS_bswap_i32
1202 tcg_gen_op2_i32(INDEX_op_bswap_i32
, ret
, arg
);
1205 t0
= tcg_temp_new_i32();
1206 t1
= tcg_temp_new_i32();
1208 tcg_gen_shli_i32(t0
, arg
, 24);
1210 tcg_gen_andi_i32(t1
, arg
, 0x0000ff00);
1211 tcg_gen_shli_i32(t1
, t1
, 8);
1212 tcg_gen_or_i32(t0
, t0
, t1
);
1214 tcg_gen_shri_i32(t1
, arg
, 8);
1215 tcg_gen_andi_i32(t1
, t1
, 0x0000ff00);
1216 tcg_gen_or_i32(t0
, t0
, t1
);
1218 tcg_gen_shri_i32(t1
, arg
, 24);
1219 tcg_gen_or_i32(ret
, t0
, t1
);
1220 tcg_temp_free_i32(t0
);
1221 tcg_temp_free_i32(t1
);
1225 #if TCG_TARGET_REG_BITS == 32
1226 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1228 tcg_gen_ext8s_i32(TCGV_LOW(ret
), TCGV_LOW(arg
));
1229 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_LOW(ret
), 31);
1232 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1234 tcg_gen_ext16s_i32(TCGV_LOW(ret
), TCGV_LOW(arg
));
1235 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_LOW(ret
), 31);
1238 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1240 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg
));
1241 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_LOW(ret
), 31);
1244 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1246 tcg_gen_ext8u_i32(TCGV_LOW(ret
), TCGV_LOW(arg
));
1247 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1250 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1252 tcg_gen_ext16u_i32(TCGV_LOW(ret
), TCGV_LOW(arg
));
1253 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1256 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1258 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg
));
1259 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1262 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret
, TCGv_i64 arg
)
1264 tcg_gen_mov_i32(ret
, TCGV_LOW(arg
));
1267 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret
, TCGv_i32 arg
)
1269 tcg_gen_mov_i32(TCGV_LOW(ret
), arg
);
1270 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1273 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret
, TCGv_i32 arg
)
1275 tcg_gen_mov_i32(TCGV_LOW(ret
), arg
);
1276 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_LOW(ret
), 31);
1279 static inline void tcg_gen_bswap_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1282 t0
= tcg_temp_new_i32();
1283 t1
= tcg_temp_new_i32();
1285 tcg_gen_bswap_i32(t0
, TCGV_LOW(arg
));
1286 tcg_gen_bswap_i32(t1
, TCGV_HIGH(arg
));
1287 tcg_gen_mov_i32(TCGV_LOW(ret
), t1
);
1288 tcg_gen_mov_i32(TCGV_HIGH(ret
), t0
);
1289 tcg_temp_free_i32(t0
);
1290 tcg_temp_free_i32(t1
);
1294 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1296 #ifdef TCG_TARGET_HAS_ext8s_i64
1297 tcg_gen_op2_i64(INDEX_op_ext8s_i64
, ret
, arg
);
1299 tcg_gen_shli_i64(ret
, arg
, 56);
1300 tcg_gen_sari_i64(ret
, ret
, 56);
1304 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1306 #ifdef TCG_TARGET_HAS_ext16s_i64
1307 tcg_gen_op2_i64(INDEX_op_ext16s_i64
, ret
, arg
);
1309 tcg_gen_shli_i64(ret
, arg
, 48);
1310 tcg_gen_sari_i64(ret
, ret
, 48);
1314 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1316 #ifdef TCG_TARGET_HAS_ext32s_i64
1317 tcg_gen_op2_i64(INDEX_op_ext32s_i64
, ret
, arg
);
1319 tcg_gen_shli_i64(ret
, arg
, 32);
1320 tcg_gen_sari_i64(ret
, ret
, 32);
1324 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1326 tcg_gen_andi_i64(ret
, arg
, 0xffu
);
1329 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1331 tcg_gen_andi_i64(ret
, arg
, 0xffffu
);
1334 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1336 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1339 /* Note: we assume the target supports move between 32 and 64 bit
1340 registers. This will probably break MIPS64 targets. */
1341 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret
, TCGv_i64 arg
)
1343 tcg_gen_mov_i32(ret
, MAKE_TCGV_I32(GET_TCGV_I64(arg
)));
1346 /* Note: we assume the target supports move between 32 and 64 bit
1348 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret
, TCGv_i32 arg
)
1350 tcg_gen_andi_i64(ret
, MAKE_TCGV_I64(GET_TCGV_I32(arg
)), 0xffffffffu
);
1353 /* Note: we assume the target supports move between 32 and 64 bit
1355 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret
, TCGv_i32 arg
)
1357 tcg_gen_ext32s_i64(ret
, MAKE_TCGV_I64(GET_TCGV_I32(arg
)));
1360 static inline void tcg_gen_bswap_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1362 #ifdef TCG_TARGET_HAS_bswap_i64
1363 tcg_gen_op2_i64(INDEX_op_bswap_i64
, ret
, arg
);
1366 t0
= tcg_temp_new_i32();
1367 t1
= tcg_temp_new_i32();
1369 tcg_gen_shli_i64(t0
, arg
, 56);
1371 tcg_gen_andi_i64(t1
, arg
, 0x0000ff00);
1372 tcg_gen_shli_i64(t1
, t1
, 40);
1373 tcg_gen_or_i64(t0
, t0
, t1
);
1375 tcg_gen_andi_i64(t1
, arg
, 0x00ff0000);
1376 tcg_gen_shli_i64(t1
, t1
, 24);
1377 tcg_gen_or_i64(t0
, t0
, t1
);
1379 tcg_gen_andi_i64(t1
, arg
, 0xff000000);
1380 tcg_gen_shli_i64(t1
, t1
, 8);
1381 tcg_gen_or_i64(t0
, t0
, t1
);
1383 tcg_gen_shri_i64(t1
, arg
, 8);
1384 tcg_gen_andi_i64(t1
, t1
, 0xff000000);
1385 tcg_gen_or_i64(t0
, t0
, t1
);
1387 tcg_gen_shri_i64(t1
, arg
, 24);
1388 tcg_gen_andi_i64(t1
, t1
, 0x00ff0000);
1389 tcg_gen_or_i64(t0
, t0
, t1
);
1391 tcg_gen_shri_i64(t1
, arg
, 40);
1392 tcg_gen_andi_i64(t1
, t1
, 0x0000ff00);
1393 tcg_gen_or_i64(t0
, t0
, t1
);
1395 tcg_gen_shri_i64(t1
, arg
, 56);
1396 tcg_gen_or_i64(ret
, t0
, t1
);
1397 tcg_temp_free_i32(t0
);
1398 tcg_temp_free_i32(t1
);
1404 static inline void tcg_gen_neg_i32(TCGv_i32 ret
, TCGv_i32 arg
)
1406 #ifdef TCG_TARGET_HAS_neg_i32
1407 tcg_gen_op2_i32(INDEX_op_neg_i32
, ret
, arg
);
1409 TCGv_i32 t0
= tcg_const_i32(0);
1410 tcg_gen_sub_i32(ret
, t0
, arg
);
1411 tcg_temp_free_i32(t0
);
1415 static inline void tcg_gen_neg_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1417 #ifdef TCG_TARGET_HAS_neg_i64
1418 tcg_gen_op2_i64(INDEX_op_neg_i64
, ret
, arg
);
1420 TCGv_i64 t0
= tcg_const_i64(0);
1421 tcg_gen_sub_i64(ret
, t0
, arg
);
1422 tcg_temp_free_i64(t0
);
1426 static inline void tcg_gen_not_i32(TCGv_i32 ret
, TCGv_i32 arg
)
1428 #ifdef TCG_TARGET_HAS_not_i32
1429 tcg_gen_op2_i32(INDEX_op_not_i32
, ret
, arg
);
1431 tcg_gen_xori_i32(ret
, arg
, -1);
1435 static inline void tcg_gen_not_i64(TCGv_i64 ret
, TCGv_i64 arg
)
1437 #ifdef TCG_TARGET_HAS_not_i64
1438 tcg_gen_op2_i32(INDEX_op_not_i64
, ret
, arg
);
1440 tcg_gen_xori_i64(ret
, arg
, -1);
1444 static inline void tcg_gen_discard_i32(TCGv_i32 arg
)
1446 tcg_gen_op1_i32(INDEX_op_discard
, arg
);
1449 #if TCG_TARGET_REG_BITS == 32
1450 static inline void tcg_gen_discard_i64(TCGv_i64 arg
)
1452 tcg_gen_discard_i32(TCGV_LOW(arg
));
1453 tcg_gen_discard_i32(TCGV_HIGH(arg
));
1456 static inline void tcg_gen_discard_i64(TCGv_i64 arg
)
1458 tcg_gen_op1_i64(INDEX_op_discard
, arg
);
1462 static inline void tcg_gen_concat_i32_i64(TCGv_i64 dest
, TCGv_i32 low
, TCGv_i32 high
)
1464 #if TCG_TARGET_REG_BITS == 32
1465 tcg_gen_mov_i32(TCGV_LOW(dest
), low
);
1466 tcg_gen_mov_i32(TCGV_HIGH(dest
), high
);
1468 TCGv_i64 tmp
= tcg_temp_new_i64();
1469 /* This extension is only needed for type correctness.
1470 We may be able to do better given target specific information. */
1471 tcg_gen_extu_i32_i64(tmp
, high
);
1472 tcg_gen_shli_i64(tmp
, tmp
, 32);
1473 tcg_gen_extu_i32_i64(dest
, low
);
1474 tcg_gen_or_i64(dest
, dest
, tmp
);
1475 tcg_temp_free_i64(tmp
);
1479 static inline void tcg_gen_concat32_i64(TCGv_i64 dest
, TCGv_i64 low
, TCGv_i64 high
)
1481 #if TCG_TARGET_REG_BITS == 32
1482 tcg_gen_concat_i32_i64(dest
, TCGV_LOW(low
), TCGV_LOW(high
));
1484 TCGv_i64 tmp
= tcg_temp_new_i64();
1485 tcg_gen_ext32u_i64(dest
, low
);
1486 tcg_gen_shli_i64(tmp
, high
, 32);
1487 tcg_gen_or_i64(dest
, dest
, tmp
);
1488 tcg_temp_free_i64(tmp
);
1492 static inline void tcg_gen_andc_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
1495 t0
= tcg_temp_new_i32();
1496 tcg_gen_not_i32(t0
, arg2
);
1497 tcg_gen_and_i32(ret
, arg1
, t0
);
1498 tcg_temp_free_i32(t0
);
1501 static inline void tcg_gen_andc_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1504 t0
= tcg_temp_new_i64();
1505 tcg_gen_not_i64(t0
, arg2
);
1506 tcg_gen_and_i64(ret
, arg1
, t0
);
1507 tcg_temp_free_i64(t0
);
1510 static inline void tcg_gen_eqv_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
1513 t0
= tcg_temp_new_i32();
1514 tcg_gen_xor_i32(t0
, arg1
, arg2
);
1515 tcg_gen_not_i32(ret
, t0
);
1516 tcg_temp_free_i32(t0
);
1519 static inline void tcg_gen_eqv_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1522 t0
= tcg_temp_new_i64();
1523 tcg_gen_xor_i64(t0
, arg1
, arg2
);
1524 tcg_gen_not_i64(ret
, t0
);
1525 tcg_temp_free_i64(t0
);
1528 static inline void tcg_gen_nand_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
1531 t0
= tcg_temp_new_i32();
1532 tcg_gen_and_i32(t0
, arg1
, arg2
);
1533 tcg_gen_not_i32(ret
, t0
);
1534 tcg_temp_free_i32(t0
);
1537 static inline void tcg_gen_nand_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1540 t0
= tcg_temp_new_i64();
1541 tcg_gen_and_i64(t0
, arg1
, arg2
);
1542 tcg_gen_not_i64(ret
, t0
);
1543 tcg_temp_free_i64(t0
);
1546 static inline void tcg_gen_nor_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
1549 t0
= tcg_temp_new_i32();
1550 tcg_gen_or_i32(t0
, arg1
, arg2
);
1551 tcg_gen_not_i32(ret
, t0
);
1552 tcg_temp_free_i32(t0
);
1555 static inline void tcg_gen_nor_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1558 t0
= tcg_temp_new_i64();
1559 tcg_gen_or_i64(t0
, arg1
, arg2
);
1560 tcg_gen_not_i64(ret
, t0
);
1561 tcg_temp_free_i64(t0
);
1564 static inline void tcg_gen_orc_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
1567 t0
= tcg_temp_new_i32();
1568 tcg_gen_not_i32(t0
, arg2
);
1569 tcg_gen_or_i32(ret
, arg1
, t0
);
1570 tcg_temp_free_i32(t0
);
1573 static inline void tcg_gen_orc_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1576 t0
= tcg_temp_new_i64();
1577 tcg_gen_not_i64(t0
, arg2
);
1578 tcg_gen_or_i64(ret
, arg1
, t0
);
1579 tcg_temp_free_i64(t0
);
1582 static inline void tcg_gen_rotl_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
1584 #ifdef TCG_TARGET_HAS_rot_i32
1585 tcg_gen_op3_i32(INDEX_op_rotl_i32
, ret
, arg1
, arg2
);
1589 t0
= tcg_temp_new_i32();
1590 t1
= tcg_temp_new_i32();
1591 tcg_gen_shl_i32(t0
, arg1
, arg2
);
1592 tcg_gen_subfi_i32(t1
, 32, arg2
);
1593 tcg_gen_shr_i32(t1
, arg1
, t1
);
1594 tcg_gen_or_i32(ret
, t0
, t1
);
1595 tcg_temp_free_i32(t0
);
1596 tcg_temp_free_i32(t1
);
1600 static inline void tcg_gen_rotl_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1602 #ifdef TCG_TARGET_HAS_rot_i64
1603 tcg_gen_op3_i64(INDEX_op_rotl_i64
, ret
, arg1
, arg2
);
1607 t0
= tcg_temp_new_i64();
1608 t1
= tcg_temp_new_i64();
1609 tcg_gen_shl_i64(t0
, arg1
, arg2
);
1610 tcg_gen_subfi_i64(t1
, 64, arg2
);
1611 tcg_gen_shr_i64(t1
, arg1
, t1
);
1612 tcg_gen_or_i64(ret
, t0
, t1
);
1613 tcg_temp_free_i64(t0
);
1614 tcg_temp_free_i64(t1
);
1618 static inline void tcg_gen_rotli_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
1620 /* some cases can be optimized here */
1622 tcg_gen_mov_i32(ret
, arg1
);
1624 #ifdef TCG_TARGET_HAS_rot_i32
1625 TCGv_i32 t0
= tcg_const_i32(arg2
);
1626 tcg_gen_rotl_i32(ret
, arg1
, t0
);
1627 tcg_temp_free_i32(t0
);
1630 t0
= tcg_temp_new_i32();
1631 t1
= tcg_temp_new_i32();
1632 tcg_gen_shli_i32(t0
, arg1
, arg2
);
1633 tcg_gen_shri_i32(t1
, arg1
, 32 - arg2
);
1634 tcg_gen_or_i32(ret
, t0
, t1
);
1635 tcg_temp_free_i32(t0
);
1636 tcg_temp_free_i32(t1
);
1641 static inline void tcg_gen_rotli_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
1643 /* some cases can be optimized here */
1645 tcg_gen_mov_i64(ret
, arg1
);
1647 #ifdef TCG_TARGET_HAS_rot_i64
1648 TCGv_i64 t0
= tcg_const_i64(arg2
);
1649 tcg_gen_rotl_i64(ret
, arg1
, t0
);
1650 tcg_temp_free_i64(t0
);
1653 t0
= tcg_temp_new_i64();
1654 t1
= tcg_temp_new_i64();
1655 tcg_gen_shli_i64(t0
, arg1
, arg2
);
1656 tcg_gen_shri_i64(t1
, arg1
, 64 - arg2
);
1657 tcg_gen_or_i64(ret
, t0
, t1
);
1658 tcg_temp_free_i64(t0
);
1659 tcg_temp_free_i64(t1
);
1664 static inline void tcg_gen_rotr_i32(TCGv_i32 ret
, TCGv_i32 arg1
, TCGv_i32 arg2
)
1666 #ifdef TCG_TARGET_HAS_rot_i32
1667 tcg_gen_op3_i32(INDEX_op_rotr_i32
, ret
, arg1
, arg2
);
1671 t0
= tcg_temp_new_i32();
1672 t1
= tcg_temp_new_i32();
1673 tcg_gen_shr_i32(t0
, arg1
, arg2
);
1674 tcg_gen_subfi_i32(t1
, 32, arg2
);
1675 tcg_gen_shl_i32(t1
, arg1
, t1
);
1676 tcg_gen_or_i32(ret
, t0
, t1
);
1677 tcg_temp_free_i32(t0
);
1678 tcg_temp_free_i32(t1
);
1682 static inline void tcg_gen_rotr_i64(TCGv_i64 ret
, TCGv_i64 arg1
, TCGv_i64 arg2
)
1684 #ifdef TCG_TARGET_HAS_rot_i64
1685 tcg_gen_op3_i64(INDEX_op_rotr_i64
, ret
, arg1
, arg2
);
1689 t0
= tcg_temp_new_i64();
1690 t1
= tcg_temp_new_i64();
1691 tcg_gen_shl_i64(t0
, arg1
, arg2
);
1692 tcg_gen_subfi_i64(t1
, 64, arg2
);
1693 tcg_gen_shl_i64(t1
, arg1
, t1
);
1694 tcg_gen_or_i64(ret
, t0
, t1
);
1695 tcg_temp_free_i64(t0
);
1696 tcg_temp_free_i64(t1
);
1700 static inline void tcg_gen_rotri_i32(TCGv_i32 ret
, TCGv_i32 arg1
, int32_t arg2
)
1702 /* some cases can be optimized here */
1704 tcg_gen_mov_i32(ret
, arg1
);
1706 tcg_gen_rotli_i32(ret
, arg1
, 32 - arg2
);
1710 static inline void tcg_gen_rotri_i64(TCGv_i64 ret
, TCGv_i64 arg1
, int64_t arg2
)
1712 /* some cases can be optimized here */
1714 tcg_gen_mov_i64(ret
, arg1
);
1716 tcg_gen_rotli_i64(ret
, arg1
, 64 - arg2
);
1720 /***************************************/
1721 /* QEMU specific operations. Their type depend on the QEMU CPU
1723 #ifndef TARGET_LONG_BITS
1724 #error must include QEMU headers
1727 #if TARGET_LONG_BITS == 32
1728 #define TCGv TCGv_i32
1729 #define tcg_temp_new() tcg_temp_new_i32()
1730 #define tcg_global_reg_new tcg_global_reg_new_i32
1731 #define tcg_global_mem_new tcg_global_mem_new_i32
1732 #define tcg_temp_local_new() tcg_temp_local_new_i32()
1733 #define tcg_temp_free tcg_temp_free_i32
1734 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
1735 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
1736 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
1737 #define TCGV_EQUAL(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
1739 #define TCGv TCGv_i64
1740 #define tcg_temp_new() tcg_temp_new_i64()
1741 #define tcg_global_reg_new tcg_global_reg_new_i64
1742 #define tcg_global_mem_new tcg_global_mem_new_i64
1743 #define tcg_temp_local_new() tcg_temp_local_new_i64()
1744 #define tcg_temp_free tcg_temp_free_i64
1745 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
1746 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64
1747 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
1748 #define TCGV_EQUAL(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
1751 /* debug info: write the PC of the corresponding QEMU CPU instruction */
1752 static inline void tcg_gen_debug_insn_start(uint64_t pc
)
1754 /* XXX: must really use a 32 bit size for TCGArg in all cases */
1755 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1756 tcg_gen_op2ii(INDEX_op_debug_insn_start
,
1757 (uint32_t)(pc
), (uint32_t)(pc
>> 32));
1759 tcg_gen_op1i(INDEX_op_debug_insn_start
, pc
);
1763 static inline void tcg_gen_exit_tb(tcg_target_long val
)
1765 tcg_gen_op1i(INDEX_op_exit_tb
, val
);
1768 static inline void tcg_gen_goto_tb(int idx
)
1770 tcg_gen_op1i(INDEX_op_goto_tb
, idx
);
1773 #if TCG_TARGET_REG_BITS == 32
1774 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1776 #if TARGET_LONG_BITS == 32
1777 tcg_gen_op3i_i32(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1779 tcg_gen_op4i_i32(INDEX_op_qemu_ld8u
, TCGV_LOW(ret
), TCGV_LOW(addr
),
1780 TCGV_HIGH(addr
), mem_index
);
1781 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1785 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1787 #if TARGET_LONG_BITS == 32
1788 tcg_gen_op3i_i32(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1790 tcg_gen_op4i_i32(INDEX_op_qemu_ld8s
, TCGV_LOW(ret
), TCGV_LOW(addr
),
1791 TCGV_HIGH(addr
), mem_index
);
1792 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_LOW(ret
), 31);
1796 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1798 #if TARGET_LONG_BITS == 32
1799 tcg_gen_op3i_i32(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1801 tcg_gen_op4i_i32(INDEX_op_qemu_ld16u
, TCGV_LOW(ret
), TCGV_LOW(addr
),
1802 TCGV_HIGH(addr
), mem_index
);
1803 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1807 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1809 #if TARGET_LONG_BITS == 32
1810 tcg_gen_op3i_i32(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1812 tcg_gen_op4i_i32(INDEX_op_qemu_ld16s
, TCGV_LOW(ret
), TCGV_LOW(addr
),
1813 TCGV_HIGH(addr
), mem_index
);
1814 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_LOW(ret
), 31);
1818 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1820 #if TARGET_LONG_BITS == 32
1821 tcg_gen_op3i_i32(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1823 tcg_gen_op4i_i32(INDEX_op_qemu_ld32u
, TCGV_LOW(ret
), TCGV_LOW(addr
),
1824 TCGV_HIGH(addr
), mem_index
);
1825 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1829 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1831 #if TARGET_LONG_BITS == 32
1832 tcg_gen_op3i_i32(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1834 tcg_gen_op4i_i32(INDEX_op_qemu_ld32u
, TCGV_LOW(ret
), TCGV_LOW(addr
),
1835 TCGV_HIGH(addr
), mem_index
);
1836 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_LOW(ret
), 31);
1840 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret
, TCGv addr
, int mem_index
)
1842 #if TARGET_LONG_BITS == 32
1843 tcg_gen_op4i_i32(INDEX_op_qemu_ld64
, TCGV_LOW(ret
), TCGV_HIGH(ret
), addr
, mem_index
);
1845 tcg_gen_op5i_i32(INDEX_op_qemu_ld64
, TCGV_LOW(ret
), TCGV_HIGH(ret
),
1846 TCGV_LOW(addr
), TCGV_HIGH(addr
), mem_index
);
1850 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1852 #if TARGET_LONG_BITS == 32
1853 tcg_gen_op3i_i32(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1855 tcg_gen_op4i_i32(INDEX_op_qemu_st8
, TCGV_LOW(arg
), TCGV_LOW(addr
),
1856 TCGV_HIGH(addr
), mem_index
);
1860 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1862 #if TARGET_LONG_BITS == 32
1863 tcg_gen_op3i_i32(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1865 tcg_gen_op4i_i32(INDEX_op_qemu_st16
, TCGV_LOW(arg
), TCGV_LOW(addr
),
1866 TCGV_HIGH(addr
), mem_index
);
1870 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1872 #if TARGET_LONG_BITS == 32
1873 tcg_gen_op3i_i32(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1875 tcg_gen_op4i_i32(INDEX_op_qemu_st32
, TCGV_LOW(arg
), TCGV_LOW(addr
),
1876 TCGV_HIGH(addr
), mem_index
);
1880 static inline void tcg_gen_qemu_st64(TCGv_i64 arg
, TCGv addr
, int mem_index
)
1882 #if TARGET_LONG_BITS == 32
1883 tcg_gen_op4i_i32(INDEX_op_qemu_st64
, TCGV_LOW(arg
), TCGV_HIGH(arg
), addr
,
1886 tcg_gen_op5i_i32(INDEX_op_qemu_st64
, TCGV_LOW(arg
), TCGV_HIGH(arg
),
1887 TCGV_LOW(addr
), TCGV_HIGH(addr
), mem_index
);
1891 #define tcg_gen_ld_ptr tcg_gen_ld_i32
1892 #define tcg_gen_discard_ptr tcg_gen_discard_i32
1894 #else /* TCG_TARGET_REG_BITS == 32 */
1896 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1898 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1901 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1903 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1906 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1908 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1911 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1913 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1916 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1918 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1921 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1923 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32s
, ret
, addr
, mem_index
);
1926 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret
, TCGv addr
, int mem_index
)
1928 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_ld64
, ret
, addr
, mem_index
);
1931 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1933 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1936 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1938 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1941 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1943 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1946 static inline void tcg_gen_qemu_st64(TCGv_i64 arg
, TCGv addr
, int mem_index
)
1948 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_st64
, arg
, addr
, mem_index
);
1951 #define tcg_gen_ld_ptr tcg_gen_ld_i64
1952 #define tcg_gen_discard_ptr tcg_gen_discard_i64
1954 #endif /* TCG_TARGET_REG_BITS != 32 */
1956 #if TARGET_LONG_BITS == 64
1957 #define TCG_TYPE_TL TCG_TYPE_I64
1958 #define tcg_gen_movi_tl tcg_gen_movi_i64
1959 #define tcg_gen_mov_tl tcg_gen_mov_i64
1960 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1961 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1962 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1963 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1964 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1965 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1966 #define tcg_gen_ld_tl tcg_gen_ld_i64
1967 #define tcg_gen_st8_tl tcg_gen_st8_i64
1968 #define tcg_gen_st16_tl tcg_gen_st16_i64
1969 #define tcg_gen_st32_tl tcg_gen_st32_i64
1970 #define tcg_gen_st_tl tcg_gen_st_i64
1971 #define tcg_gen_add_tl tcg_gen_add_i64
1972 #define tcg_gen_addi_tl tcg_gen_addi_i64
1973 #define tcg_gen_sub_tl tcg_gen_sub_i64
1974 #define tcg_gen_neg_tl tcg_gen_neg_i64
1975 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
1976 #define tcg_gen_subi_tl tcg_gen_subi_i64
1977 #define tcg_gen_and_tl tcg_gen_and_i64
1978 #define tcg_gen_andi_tl tcg_gen_andi_i64
1979 #define tcg_gen_or_tl tcg_gen_or_i64
1980 #define tcg_gen_ori_tl tcg_gen_ori_i64
1981 #define tcg_gen_xor_tl tcg_gen_xor_i64
1982 #define tcg_gen_xori_tl tcg_gen_xori_i64
1983 #define tcg_gen_not_tl tcg_gen_not_i64
1984 #define tcg_gen_shl_tl tcg_gen_shl_i64
1985 #define tcg_gen_shli_tl tcg_gen_shli_i64
1986 #define tcg_gen_shr_tl tcg_gen_shr_i64
1987 #define tcg_gen_shri_tl tcg_gen_shri_i64
1988 #define tcg_gen_sar_tl tcg_gen_sar_i64
1989 #define tcg_gen_sari_tl tcg_gen_sari_i64
1990 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1991 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1992 #define tcg_gen_mul_tl tcg_gen_mul_i64
1993 #define tcg_gen_muli_tl tcg_gen_muli_i64
1994 #define tcg_gen_discard_tl tcg_gen_discard_i64
1995 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
1996 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1997 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1998 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1999 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
2000 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
2001 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
2002 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
2003 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
2004 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
2005 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
2006 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
2007 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
2008 #define tcg_gen_andc_tl tcg_gen_andc_i64
2009 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
2010 #define tcg_gen_nand_tl tcg_gen_nand_i64
2011 #define tcg_gen_nor_tl tcg_gen_nor_i64
2012 #define tcg_gen_orc_tl tcg_gen_orc_i64
2013 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
2014 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
2015 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
2016 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
2017 #define tcg_const_tl tcg_const_i64
2018 #define tcg_const_local_tl tcg_const_local_i64
2020 #define TCG_TYPE_TL TCG_TYPE_I32
2021 #define tcg_gen_movi_tl tcg_gen_movi_i32
2022 #define tcg_gen_mov_tl tcg_gen_mov_i32
2023 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
2024 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
2025 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
2026 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
2027 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
2028 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
2029 #define tcg_gen_ld_tl tcg_gen_ld_i32
2030 #define tcg_gen_st8_tl tcg_gen_st8_i32
2031 #define tcg_gen_st16_tl tcg_gen_st16_i32
2032 #define tcg_gen_st32_tl tcg_gen_st_i32
2033 #define tcg_gen_st_tl tcg_gen_st_i32
2034 #define tcg_gen_add_tl tcg_gen_add_i32
2035 #define tcg_gen_addi_tl tcg_gen_addi_i32
2036 #define tcg_gen_sub_tl tcg_gen_sub_i32
2037 #define tcg_gen_neg_tl tcg_gen_neg_i32
2038 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
2039 #define tcg_gen_subi_tl tcg_gen_subi_i32
2040 #define tcg_gen_and_tl tcg_gen_and_i32
2041 #define tcg_gen_andi_tl tcg_gen_andi_i32
2042 #define tcg_gen_or_tl tcg_gen_or_i32
2043 #define tcg_gen_ori_tl tcg_gen_ori_i32
2044 #define tcg_gen_xor_tl tcg_gen_xor_i32
2045 #define tcg_gen_xori_tl tcg_gen_xori_i32
2046 #define tcg_gen_not_tl tcg_gen_not_i32
2047 #define tcg_gen_shl_tl tcg_gen_shl_i32
2048 #define tcg_gen_shli_tl tcg_gen_shli_i32
2049 #define tcg_gen_shr_tl tcg_gen_shr_i32
2050 #define tcg_gen_shri_tl tcg_gen_shri_i32
2051 #define tcg_gen_sar_tl tcg_gen_sar_i32
2052 #define tcg_gen_sari_tl tcg_gen_sari_i32
2053 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
2054 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
2055 #define tcg_gen_mul_tl tcg_gen_mul_i32
2056 #define tcg_gen_muli_tl tcg_gen_muli_i32
2057 #define tcg_gen_discard_tl tcg_gen_discard_i32
2058 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
2059 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
2060 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
2061 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
2062 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
2063 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
2064 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
2065 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
2066 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
2067 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
2068 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
2069 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
2070 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
2071 #define tcg_gen_andc_tl tcg_gen_andc_i32
2072 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
2073 #define tcg_gen_nand_tl tcg_gen_nand_i32
2074 #define tcg_gen_nor_tl tcg_gen_nor_i32
2075 #define tcg_gen_orc_tl tcg_gen_orc_i32
2076 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
2077 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
2078 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
2079 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
2080 #define tcg_const_tl tcg_const_i32
2081 #define tcg_const_local_tl tcg_const_local_i32
2084 #if TCG_TARGET_REG_BITS == 32
2085 #define tcg_gen_add_ptr tcg_gen_add_i32
2086 #define tcg_gen_addi_ptr tcg_gen_addi_i32
2087 #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
2088 #else /* TCG_TARGET_REG_BITS == 32 */
2089 #define tcg_gen_add_ptr tcg_gen_add_i64
2090 #define tcg_gen_addi_ptr tcg_gen_addi_i64
2091 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
2092 #endif /* TCG_TARGET_REG_BITS != 32 */