2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "cache-utils.h"
41 #include "host-utils.h"
42 #include "qemu-timer.h"
44 /* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
47 #define NO_CPU_IO_DEFS
52 #if TCG_TARGET_REG_BITS == 64
53 # define ELF_CLASS ELFCLASS64
55 # define ELF_CLASS ELFCLASS32
57 #ifdef HOST_WORDS_BIGENDIAN
58 # define ELF_DATA ELFDATA2MSB
60 # define ELF_DATA ELFDATA2LSB
65 /* Forward declarations for functions declared in tcg-target.c and used here. */
66 static void tcg_target_init(TCGContext
*s
);
67 static void tcg_target_qemu_prologue(TCGContext
*s
);
68 static void patch_reloc(uint8_t *code_ptr
, int type
,
69 tcg_target_long value
, tcg_target_long addend
);
71 static void tcg_register_jit_int(void *buf
, size_t size
,
72 void *debug_frame
, size_t debug_frame_size
)
73 __attribute__((unused
));
75 /* Forward declarations for functions declared and used in tcg-target.c. */
76 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
77 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
78 tcg_target_long arg2
);
79 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
80 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
81 TCGReg ret
, tcg_target_long arg
);
82 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
83 const int *const_args
);
84 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
85 tcg_target_long arg2
);
86 static int tcg_target_const_match(tcg_target_long val
,
87 const TCGArgConstraint
*arg_ct
);
89 TCGOpDef tcg_op_defs
[] = {
90 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
94 const size_t tcg_op_defs_max
= ARRAY_SIZE(tcg_op_defs
);
96 static TCGRegSet tcg_target_available_regs
[2];
97 static TCGRegSet tcg_target_call_clobber_regs
;
99 /* XXX: move that inside the context */
100 uint16_t *gen_opc_ptr
;
101 TCGArg
*gen_opparam_ptr
;
103 static inline void tcg_out8(TCGContext
*s
, uint8_t v
)
108 static inline void tcg_out16(TCGContext
*s
, uint16_t v
)
110 *(uint16_t *)s
->code_ptr
= v
;
114 static inline void tcg_out32(TCGContext
*s
, uint32_t v
)
116 *(uint32_t *)s
->code_ptr
= v
;
120 /* label relocation processing */
122 static void tcg_out_reloc(TCGContext
*s
, uint8_t *code_ptr
, int type
,
123 int label_index
, long addend
)
128 l
= &s
->labels
[label_index
];
130 /* FIXME: This may break relocations on RISC targets that
131 modify instruction fields in place. The caller may not have
132 written the initial value. */
133 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
135 /* add a new relocation entry */
136 r
= tcg_malloc(sizeof(TCGRelocation
));
140 r
->next
= l
->u
.first_reloc
;
141 l
->u
.first_reloc
= r
;
145 static void tcg_out_label(TCGContext
*s
, int label_index
, void *ptr
)
149 tcg_target_long value
= (tcg_target_long
)ptr
;
151 l
= &s
->labels
[label_index
];
154 r
= l
->u
.first_reloc
;
156 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
163 int gen_new_label(void)
165 TCGContext
*s
= &tcg_ctx
;
169 if (s
->nb_labels
>= TCG_MAX_LABELS
)
171 idx
= s
->nb_labels
++;
174 l
->u
.first_reloc
= NULL
;
178 #include "tcg-target.c"
180 /* pool based memory allocation */
181 void *tcg_malloc_internal(TCGContext
*s
, int size
)
186 if (size
> TCG_POOL_CHUNK_SIZE
) {
187 /* big malloc: insert a new pool (XXX: could optimize) */
188 p
= g_malloc(sizeof(TCGPool
) + size
);
190 p
->next
= s
->pool_first_large
;
191 s
->pool_first_large
= p
;
202 pool_size
= TCG_POOL_CHUNK_SIZE
;
203 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
207 s
->pool_current
->next
= p
;
216 s
->pool_cur
= p
->data
+ size
;
217 s
->pool_end
= p
->data
+ p
->size
;
221 void tcg_pool_reset(TCGContext
*s
)
224 for (p
= s
->pool_first_large
; p
; p
= t
) {
228 s
->pool_first_large
= NULL
;
229 s
->pool_cur
= s
->pool_end
= NULL
;
230 s
->pool_current
= NULL
;
233 void tcg_context_init(TCGContext
*s
)
235 int op
, total_args
, n
;
237 TCGArgConstraint
*args_ct
;
240 memset(s
, 0, sizeof(*s
));
243 /* Count total number of arguments and allocate the corresponding
246 for(op
= 0; op
< NB_OPS
; op
++) {
247 def
= &tcg_op_defs
[op
];
248 n
= def
->nb_iargs
+ def
->nb_oargs
;
252 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
253 sorted_args
= g_malloc(sizeof(int) * total_args
);
255 for(op
= 0; op
< NB_OPS
; op
++) {
256 def
= &tcg_op_defs
[op
];
257 def
->args_ct
= args_ct
;
258 def
->sorted_args
= sorted_args
;
259 n
= def
->nb_iargs
+ def
->nb_oargs
;
267 void tcg_prologue_init(TCGContext
*s
)
269 /* init global prologue and epilogue */
270 s
->code_buf
= code_gen_prologue
;
271 s
->code_ptr
= s
->code_buf
;
272 tcg_target_qemu_prologue(s
);
273 flush_icache_range((tcg_target_ulong
)s
->code_buf
,
274 (tcg_target_ulong
)s
->code_ptr
);
277 void tcg_set_frame(TCGContext
*s
, int reg
,
278 tcg_target_long start
, tcg_target_long size
)
280 s
->frame_start
= start
;
281 s
->frame_end
= start
+ size
;
285 void tcg_func_start(TCGContext
*s
)
289 s
->nb_temps
= s
->nb_globals
;
290 for(i
= 0; i
< (TCG_TYPE_COUNT
* 2); i
++)
291 s
->first_free_temp
[i
] = -1;
292 s
->labels
= tcg_malloc(sizeof(TCGLabel
) * TCG_MAX_LABELS
);
294 s
->current_frame_offset
= s
->frame_start
;
296 #ifdef CONFIG_DEBUG_TCG
297 s
->goto_tb_issue_mask
= 0;
300 s
->gen_opc_ptr
= s
->gen_opc_buf
;
301 s
->gen_opparam_ptr
= s
->gen_opparam_buf
;
303 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
304 /* Initialize qemu_ld/st labels to assist code generation at the end of TB
305 for TLB miss cases at the end of TB */
306 s
->qemu_ldst_labels
= tcg_malloc(sizeof(TCGLabelQemuLdst
) *
308 s
->nb_qemu_ldst_labels
= 0;
312 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
314 if (n
> TCG_MAX_TEMPS
)
318 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
321 TCGContext
*s
= &tcg_ctx
;
325 #if TCG_TARGET_REG_BITS == 32
326 if (type
!= TCG_TYPE_I32
)
329 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
332 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
333 ts
= &s
->temps
[s
->nb_globals
];
334 ts
->base_type
= type
;
340 tcg_regset_set_reg(s
->reserved_regs
, reg
);
344 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
348 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
349 return MAKE_TCGV_I32(idx
);
352 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
356 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
357 return MAKE_TCGV_I64(idx
);
360 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
361 tcg_target_long offset
,
364 TCGContext
*s
= &tcg_ctx
;
369 #if TCG_TARGET_REG_BITS == 32
370 if (type
== TCG_TYPE_I64
) {
372 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
373 ts
= &s
->temps
[s
->nb_globals
];
374 ts
->base_type
= type
;
375 ts
->type
= TCG_TYPE_I32
;
377 ts
->mem_allocated
= 1;
379 #ifdef TCG_TARGET_WORDS_BIGENDIAN
380 ts
->mem_offset
= offset
+ 4;
382 ts
->mem_offset
= offset
;
384 pstrcpy(buf
, sizeof(buf
), name
);
385 pstrcat(buf
, sizeof(buf
), "_0");
386 ts
->name
= strdup(buf
);
389 ts
->base_type
= type
;
390 ts
->type
= TCG_TYPE_I32
;
392 ts
->mem_allocated
= 1;
394 #ifdef TCG_TARGET_WORDS_BIGENDIAN
395 ts
->mem_offset
= offset
;
397 ts
->mem_offset
= offset
+ 4;
399 pstrcpy(buf
, sizeof(buf
), name
);
400 pstrcat(buf
, sizeof(buf
), "_1");
401 ts
->name
= strdup(buf
);
407 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
408 ts
= &s
->temps
[s
->nb_globals
];
409 ts
->base_type
= type
;
412 ts
->mem_allocated
= 1;
414 ts
->mem_offset
= offset
;
421 TCGv_i32
tcg_global_mem_new_i32(int reg
, tcg_target_long offset
,
426 idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
427 return MAKE_TCGV_I32(idx
);
430 TCGv_i64
tcg_global_mem_new_i64(int reg
, tcg_target_long offset
,
435 idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
436 return MAKE_TCGV_I64(idx
);
439 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
441 TCGContext
*s
= &tcg_ctx
;
448 idx
= s
->first_free_temp
[k
];
450 /* There is already an available temp with the
453 s
->first_free_temp
[k
] = ts
->next_free_temp
;
454 ts
->temp_allocated
= 1;
455 assert(ts
->temp_local
== temp_local
);
458 #if TCG_TARGET_REG_BITS == 32
459 if (type
== TCG_TYPE_I64
) {
460 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
461 ts
= &s
->temps
[s
->nb_temps
];
462 ts
->base_type
= type
;
463 ts
->type
= TCG_TYPE_I32
;
464 ts
->temp_allocated
= 1;
465 ts
->temp_local
= temp_local
;
468 ts
->base_type
= TCG_TYPE_I32
;
469 ts
->type
= TCG_TYPE_I32
;
470 ts
->temp_allocated
= 1;
471 ts
->temp_local
= temp_local
;
477 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
478 ts
= &s
->temps
[s
->nb_temps
];
479 ts
->base_type
= type
;
481 ts
->temp_allocated
= 1;
482 ts
->temp_local
= temp_local
;
488 #if defined(CONFIG_DEBUG_TCG)
494 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
498 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
499 return MAKE_TCGV_I32(idx
);
502 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
506 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
507 return MAKE_TCGV_I64(idx
);
510 static inline void tcg_temp_free_internal(int idx
)
512 TCGContext
*s
= &tcg_ctx
;
516 #if defined(CONFIG_DEBUG_TCG)
518 if (s
->temps_in_use
< 0) {
519 fprintf(stderr
, "More temporaries freed than allocated!\n");
523 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
525 assert(ts
->temp_allocated
!= 0);
526 ts
->temp_allocated
= 0;
530 ts
->next_free_temp
= s
->first_free_temp
[k
];
531 s
->first_free_temp
[k
] = idx
;
534 void tcg_temp_free_i32(TCGv_i32 arg
)
536 tcg_temp_free_internal(GET_TCGV_I32(arg
));
539 void tcg_temp_free_i64(TCGv_i64 arg
)
541 tcg_temp_free_internal(GET_TCGV_I64(arg
));
544 TCGv_i32
tcg_const_i32(int32_t val
)
547 t0
= tcg_temp_new_i32();
548 tcg_gen_movi_i32(t0
, val
);
552 TCGv_i64
tcg_const_i64(int64_t val
)
555 t0
= tcg_temp_new_i64();
556 tcg_gen_movi_i64(t0
, val
);
560 TCGv_i32
tcg_const_local_i32(int32_t val
)
563 t0
= tcg_temp_local_new_i32();
564 tcg_gen_movi_i32(t0
, val
);
568 TCGv_i64
tcg_const_local_i64(int64_t val
)
571 t0
= tcg_temp_local_new_i64();
572 tcg_gen_movi_i64(t0
, val
);
576 #if defined(CONFIG_DEBUG_TCG)
577 void tcg_clear_temp_count(void)
579 TCGContext
*s
= &tcg_ctx
;
583 int tcg_check_temp_count(void)
585 TCGContext
*s
= &tcg_ctx
;
586 if (s
->temps_in_use
) {
587 /* Clear the count so that we don't give another
588 * warning immediately next time around.
597 void tcg_register_helper(void *func
, const char *name
)
599 TCGContext
*s
= &tcg_ctx
;
601 if ((s
->nb_helpers
+ 1) > s
->allocated_helpers
) {
602 n
= s
->allocated_helpers
;
608 s
->helpers
= realloc(s
->helpers
, n
* sizeof(TCGHelperInfo
));
609 s
->allocated_helpers
= n
;
611 s
->helpers
[s
->nb_helpers
].func
= (tcg_target_ulong
)func
;
612 s
->helpers
[s
->nb_helpers
].name
= name
;
616 /* Note: we convert the 64 bit args to 32 bit and do some alignment
617 and endian swap. Maybe it would be better to do the alignment
618 and endian swap in tcg_reg_alloc_call(). */
619 void tcg_gen_callN(TCGContext
*s
, TCGv_ptr func
, unsigned int flags
,
620 int sizemask
, TCGArg ret
, int nargs
, TCGArg
*args
)
627 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
628 for (i
= 0; i
< nargs
; ++i
) {
629 int is_64bit
= sizemask
& (1 << (i
+1)*2);
630 int is_signed
= sizemask
& (2 << (i
+1)*2);
632 TCGv_i64 temp
= tcg_temp_new_i64();
633 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
635 tcg_gen_ext32s_i64(temp
, orig
);
637 tcg_gen_ext32u_i64(temp
, orig
);
639 args
[i
] = GET_TCGV_I64(temp
);
642 #endif /* TCG_TARGET_EXTEND_ARGS */
644 *s
->gen_opc_ptr
++ = INDEX_op_call
;
645 nparam
= s
->gen_opparam_ptr
++;
646 if (ret
!= TCG_CALL_DUMMY_ARG
) {
647 #if TCG_TARGET_REG_BITS < 64
649 #ifdef TCG_TARGET_WORDS_BIGENDIAN
650 *s
->gen_opparam_ptr
++ = ret
+ 1;
651 *s
->gen_opparam_ptr
++ = ret
;
653 *s
->gen_opparam_ptr
++ = ret
;
654 *s
->gen_opparam_ptr
++ = ret
+ 1;
660 *s
->gen_opparam_ptr
++ = ret
;
667 for (i
= 0; i
< nargs
; i
++) {
668 #if TCG_TARGET_REG_BITS < 64
669 int is_64bit
= sizemask
& (1 << (i
+1)*2);
671 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
672 /* some targets want aligned 64 bit args */
674 *s
->gen_opparam_ptr
++ = TCG_CALL_DUMMY_ARG
;
678 /* If stack grows up, then we will be placing successive
679 arguments at lower addresses, which means we need to
680 reverse the order compared to how we would normally
681 treat either big or little-endian. For those arguments
682 that will wind up in registers, this still works for
683 HPPA (the only current STACK_GROWSUP target) since the
684 argument registers are *also* allocated in decreasing
685 order. If another such target is added, this logic may
686 have to get more complicated to differentiate between
687 stack arguments and register arguments. */
688 #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
689 *s
->gen_opparam_ptr
++ = args
[i
] + 1;
690 *s
->gen_opparam_ptr
++ = args
[i
];
692 *s
->gen_opparam_ptr
++ = args
[i
];
693 *s
->gen_opparam_ptr
++ = args
[i
] + 1;
698 #endif /* TCG_TARGET_REG_BITS < 64 */
700 *s
->gen_opparam_ptr
++ = args
[i
];
703 *s
->gen_opparam_ptr
++ = GET_TCGV_PTR(func
);
705 *s
->gen_opparam_ptr
++ = flags
;
707 *nparam
= (nb_rets
<< 16) | (real_args
+ 1);
709 /* total parameters, needed to go backward in the instruction stream */
710 *s
->gen_opparam_ptr
++ = 1 + nb_rets
+ real_args
+ 3;
712 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
713 for (i
= 0; i
< nargs
; ++i
) {
714 int is_64bit
= sizemask
& (1 << (i
+1)*2);
716 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
717 tcg_temp_free_i64(temp
);
720 #endif /* TCG_TARGET_EXTEND_ARGS */
723 #if TCG_TARGET_REG_BITS == 32
724 void tcg_gen_shifti_i64(TCGv_i64 ret
, TCGv_i64 arg1
,
725 int c
, int right
, int arith
)
728 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
));
729 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
));
730 } else if (c
>= 32) {
734 tcg_gen_sari_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
735 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), 31);
737 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
738 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
741 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_LOW(arg1
), c
);
742 tcg_gen_movi_i32(TCGV_LOW(ret
), 0);
747 t0
= tcg_temp_new_i32();
748 t1
= tcg_temp_new_i32();
750 tcg_gen_shli_i32(t0
, TCGV_HIGH(arg1
), 32 - c
);
752 tcg_gen_sari_i32(t1
, TCGV_HIGH(arg1
), c
);
754 tcg_gen_shri_i32(t1
, TCGV_HIGH(arg1
), c
);
755 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), c
);
756 tcg_gen_or_i32(TCGV_LOW(ret
), TCGV_LOW(ret
), t0
);
757 tcg_gen_mov_i32(TCGV_HIGH(ret
), t1
);
759 tcg_gen_shri_i32(t0
, TCGV_LOW(arg1
), 32 - c
);
760 /* Note: ret can be the same as arg1, so we use t1 */
761 tcg_gen_shli_i32(t1
, TCGV_LOW(arg1
), c
);
762 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), c
);
763 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), t0
);
764 tcg_gen_mov_i32(TCGV_LOW(ret
), t1
);
766 tcg_temp_free_i32(t0
);
767 tcg_temp_free_i32(t1
);
773 static void tcg_reg_alloc_start(TCGContext
*s
)
777 for(i
= 0; i
< s
->nb_globals
; i
++) {
780 ts
->val_type
= TEMP_VAL_REG
;
782 ts
->val_type
= TEMP_VAL_MEM
;
785 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
787 if (ts
->temp_local
) {
788 ts
->val_type
= TEMP_VAL_MEM
;
790 ts
->val_type
= TEMP_VAL_DEAD
;
792 ts
->mem_allocated
= 0;
795 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
796 s
->reg_to_temp
[i
] = -1;
800 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
805 assert(idx
>= 0 && idx
< s
->nb_temps
);
808 if (idx
< s
->nb_globals
) {
809 pstrcpy(buf
, buf_size
, ts
->name
);
812 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
814 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
819 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
821 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
824 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
826 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
829 static int helper_cmp(const void *p1
, const void *p2
)
831 const TCGHelperInfo
*th1
= p1
;
832 const TCGHelperInfo
*th2
= p2
;
833 if (th1
->func
< th2
->func
)
835 else if (th1
->func
== th2
->func
)
841 /* find helper definition (Note: A hash table would be better) */
842 static TCGHelperInfo
*tcg_find_helper(TCGContext
*s
, tcg_target_ulong val
)
848 if (unlikely(!s
->helpers_sorted
)) {
849 qsort(s
->helpers
, s
->nb_helpers
, sizeof(TCGHelperInfo
),
851 s
->helpers_sorted
= 1;
856 m_max
= s
->nb_helpers
- 1;
857 while (m_min
<= m_max
) {
858 m
= (m_min
+ m_max
) >> 1;
872 static const char * const cond_name
[] =
874 [TCG_COND_NEVER
] = "never",
875 [TCG_COND_ALWAYS
] = "always",
876 [TCG_COND_EQ
] = "eq",
877 [TCG_COND_NE
] = "ne",
878 [TCG_COND_LT
] = "lt",
879 [TCG_COND_GE
] = "ge",
880 [TCG_COND_LE
] = "le",
881 [TCG_COND_GT
] = "gt",
882 [TCG_COND_LTU
] = "ltu",
883 [TCG_COND_GEU
] = "geu",
884 [TCG_COND_LEU
] = "leu",
885 [TCG_COND_GTU
] = "gtu"
888 void tcg_dump_ops(TCGContext
*s
)
890 const uint16_t *opc_ptr
;
894 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
, first_insn
;
899 opc_ptr
= s
->gen_opc_buf
;
900 args
= s
->gen_opparam_buf
;
901 while (opc_ptr
< s
->gen_opc_ptr
) {
903 def
= &tcg_op_defs
[c
];
904 if (c
== INDEX_op_debug_insn_start
) {
906 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
907 pc
= ((uint64_t)args
[1] << 32) | args
[0];
914 qemu_log(" ---- 0x%" PRIx64
, pc
);
916 nb_oargs
= def
->nb_oargs
;
917 nb_iargs
= def
->nb_iargs
;
918 nb_cargs
= def
->nb_cargs
;
919 } else if (c
== INDEX_op_call
) {
922 /* variable number of arguments */
924 nb_oargs
= arg
>> 16;
925 nb_iargs
= arg
& 0xffff;
926 nb_cargs
= def
->nb_cargs
;
928 qemu_log(" %s ", def
->name
);
932 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
933 args
[nb_oargs
+ nb_iargs
- 1]));
935 qemu_log(",$0x%" TCG_PRIlx
, args
[nb_oargs
+ nb_iargs
]);
937 qemu_log(",$%d", nb_oargs
);
938 for(i
= 0; i
< nb_oargs
; i
++) {
940 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
943 for(i
= 0; i
< (nb_iargs
- 1); i
++) {
945 if (args
[nb_oargs
+ i
] == TCG_CALL_DUMMY_ARG
) {
948 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
949 args
[nb_oargs
+ i
]));
952 } else if (c
== INDEX_op_movi_i32
|| c
== INDEX_op_movi_i64
) {
953 tcg_target_ulong val
;
956 nb_oargs
= def
->nb_oargs
;
957 nb_iargs
= def
->nb_iargs
;
958 nb_cargs
= def
->nb_cargs
;
959 qemu_log(" %s %s,$", def
->name
,
960 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[0]));
962 th
= tcg_find_helper(s
, val
);
964 qemu_log("%s", th
->name
);
966 if (c
== INDEX_op_movi_i32
) {
967 qemu_log("0x%x", (uint32_t)val
);
969 qemu_log("0x%" PRIx64
, (uint64_t)val
);
973 qemu_log(" %s ", def
->name
);
974 if (c
== INDEX_op_nopn
) {
975 /* variable number of arguments */
980 nb_oargs
= def
->nb_oargs
;
981 nb_iargs
= def
->nb_iargs
;
982 nb_cargs
= def
->nb_cargs
;
986 for(i
= 0; i
< nb_oargs
; i
++) {
990 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
993 for(i
= 0; i
< nb_iargs
; i
++) {
997 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1001 case INDEX_op_brcond_i32
:
1002 case INDEX_op_setcond_i32
:
1003 case INDEX_op_movcond_i32
:
1004 case INDEX_op_brcond2_i32
:
1005 case INDEX_op_setcond2_i32
:
1006 case INDEX_op_brcond_i64
:
1007 case INDEX_op_setcond_i64
:
1008 case INDEX_op_movcond_i64
:
1009 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
1010 qemu_log(",%s", cond_name
[args
[k
++]]);
1012 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1020 for(; i
< nb_cargs
; i
++) {
1025 qemu_log("$0x%" TCG_PRIlx
, arg
);
1029 args
+= nb_iargs
+ nb_oargs
+ nb_cargs
;
1033 /* we give more priority to constraints with less registers */
1034 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1036 const TCGArgConstraint
*arg_ct
;
1039 arg_ct
= &def
->args_ct
[k
];
1040 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1041 /* an alias is equivalent to a single register */
1044 if (!(arg_ct
->ct
& TCG_CT_REG
))
1047 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1048 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1052 return TCG_TARGET_NB_REGS
- n
+ 1;
1055 /* sort from highest priority to lowest */
1056 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1058 int i
, j
, p1
, p2
, tmp
;
1060 for(i
= 0; i
< n
; i
++)
1061 def
->sorted_args
[start
+ i
] = start
+ i
;
1064 for(i
= 0; i
< n
- 1; i
++) {
1065 for(j
= i
+ 1; j
< n
; j
++) {
1066 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1067 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1069 tmp
= def
->sorted_args
[start
+ i
];
1070 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1071 def
->sorted_args
[start
+ j
] = tmp
;
1077 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1085 if (tdefs
->op
== (TCGOpcode
)-1)
1088 assert((unsigned)op
< NB_OPS
);
1089 def
= &tcg_op_defs
[op
];
1090 #if defined(CONFIG_DEBUG_TCG)
1091 /* Duplicate entry in op definitions? */
1095 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1096 for(i
= 0; i
< nb_args
; i
++) {
1097 ct_str
= tdefs
->args_ct_str
[i
];
1098 /* Incomplete TCGTargetOpDef entry? */
1099 assert(ct_str
!= NULL
);
1100 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1101 def
->args_ct
[i
].ct
= 0;
1102 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1104 oarg
= ct_str
[0] - '0';
1105 assert(oarg
< def
->nb_oargs
);
1106 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1107 /* TCG_CT_ALIAS is for the output arguments. The input
1108 argument is tagged with TCG_CT_IALIAS. */
1109 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1110 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1111 def
->args_ct
[oarg
].alias_index
= i
;
1112 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1113 def
->args_ct
[i
].alias_index
= oarg
;
1116 if (*ct_str
== '\0')
1120 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1124 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1125 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1126 ct_str
, i
, def
->name
);
1134 /* TCGTargetOpDef entry with too much information? */
1135 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1137 /* sort the constraints (XXX: this is just an heuristic) */
1138 sort_constraints(def
, 0, def
->nb_oargs
);
1139 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1145 printf("%s: sorted=", def
->name
);
1146 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1147 printf(" %d", def
->sorted_args
[i
]);
1154 #if defined(CONFIG_DEBUG_TCG)
1156 for (op
= 0; op
< ARRAY_SIZE(tcg_op_defs
); op
++) {
1157 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1158 if (op
< INDEX_op_call
1159 || op
== INDEX_op_debug_insn_start
1160 || (def
->flags
& TCG_OPF_NOT_PRESENT
)) {
1161 /* Wrong entry in op definitions? */
1163 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1167 /* Missing entry in op definitions? */
1169 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1180 #ifdef USE_LIVENESS_ANALYSIS
1182 /* set a nop for an operation using 'nb_args' */
1183 static inline void tcg_set_nop(TCGContext
*s
, uint16_t *opc_ptr
,
1184 TCGArg
*args
, int nb_args
)
1187 *opc_ptr
= INDEX_op_nop
;
1189 *opc_ptr
= INDEX_op_nopn
;
1191 args
[nb_args
- 1] = nb_args
;
1195 /* liveness analysis: end of function: all temps are dead, and globals
1196 should be in memory. */
1197 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
,
1200 memset(dead_temps
, 1, s
->nb_temps
);
1201 memset(mem_temps
, 1, s
->nb_globals
);
1202 memset(mem_temps
+ s
->nb_globals
, 0, s
->nb_temps
- s
->nb_globals
);
1205 /* liveness analysis: end of basic block: all temps are dead, globals
1206 and local temps should be in memory. */
1207 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
,
1212 memset(dead_temps
, 1, s
->nb_temps
);
1213 memset(mem_temps
, 1, s
->nb_globals
);
1214 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1215 mem_temps
[i
] = s
->temps
[i
].temp_local
;
1219 /* Liveness analysis : update the opc_dead_args array to tell if a
1220 given input arguments is dead. Instructions updating dead
1221 temporaries are removed. */
1222 static void tcg_liveness_analysis(TCGContext
*s
)
1224 int i
, op_index
, nb_args
, nb_iargs
, nb_oargs
, arg
, nb_ops
;
1227 const TCGOpDef
*def
;
1228 uint8_t *dead_temps
, *mem_temps
;
1232 s
->gen_opc_ptr
++; /* skip end */
1234 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1236 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1237 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1239 dead_temps
= tcg_malloc(s
->nb_temps
);
1240 mem_temps
= tcg_malloc(s
->nb_temps
);
1241 tcg_la_func_end(s
, dead_temps
, mem_temps
);
1243 args
= s
->gen_opparam_ptr
;
1244 op_index
= nb_ops
- 1;
1245 while (op_index
>= 0) {
1246 op
= s
->gen_opc_buf
[op_index
];
1247 def
= &tcg_op_defs
[op
];
1255 nb_iargs
= args
[0] & 0xffff;
1256 nb_oargs
= args
[0] >> 16;
1258 call_flags
= args
[nb_oargs
+ nb_iargs
];
1260 /* pure functions can be removed if their result is not
1262 if (call_flags
& TCG_CALL_NO_SIDE_EFFECTS
) {
1263 for(i
= 0; i
< nb_oargs
; i
++) {
1265 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1266 goto do_not_remove_call
;
1269 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
,
1274 /* output args are dead */
1277 for(i
= 0; i
< nb_oargs
; i
++) {
1279 if (dead_temps
[arg
]) {
1280 dead_args
|= (1 << i
);
1282 if (mem_temps
[arg
]) {
1283 sync_args
|= (1 << i
);
1285 dead_temps
[arg
] = 1;
1289 if (!(call_flags
& TCG_CALL_NO_READ_GLOBALS
)) {
1290 /* globals should be synced to memory */
1291 memset(mem_temps
, 1, s
->nb_globals
);
1293 if (!(call_flags
& (TCG_CALL_NO_WRITE_GLOBALS
|
1294 TCG_CALL_NO_READ_GLOBALS
))) {
1295 /* globals should go back to memory */
1296 memset(dead_temps
, 1, s
->nb_globals
);
1299 /* input args are live */
1300 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1302 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1303 if (dead_temps
[arg
]) {
1304 dead_args
|= (1 << i
);
1306 dead_temps
[arg
] = 0;
1309 s
->op_dead_args
[op_index
] = dead_args
;
1310 s
->op_sync_args
[op_index
] = sync_args
;
1315 case INDEX_op_debug_insn_start
:
1316 args
-= def
->nb_args
;
1322 case INDEX_op_discard
:
1324 /* mark the temporary as dead */
1325 dead_temps
[args
[0]] = 1;
1326 mem_temps
[args
[0]] = 0;
1331 case INDEX_op_add2_i32
:
1332 case INDEX_op_sub2_i32
:
1336 /* Test if the high part of the operation is dead, but not
1337 the low part. The result can be optimized to a simple
1338 add or sub. This happens often for x86_64 guest when the
1339 cpu mode is set to 32 bit. */
1340 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1341 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1344 /* Create the single operation plus nop. */
1345 if (op
== INDEX_op_add2_i32
) {
1346 op
= INDEX_op_add_i32
;
1348 op
= INDEX_op_sub_i32
;
1350 s
->gen_opc_buf
[op_index
] = op
;
1353 assert(s
->gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1354 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
+ 1, args
+ 3, 3);
1355 /* Fall through and mark the single-word operation live. */
1361 case INDEX_op_mulu2_i32
:
1365 /* Likewise, test for the high part of the operation dead. */
1366 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1367 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1370 s
->gen_opc_buf
[op_index
] = op
= INDEX_op_mul_i32
;
1373 assert(s
->gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1374 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
+ 1, args
+ 3, 1);
1375 /* Fall through and mark the single-word operation live. */
1381 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1382 args
-= def
->nb_args
;
1383 nb_iargs
= def
->nb_iargs
;
1384 nb_oargs
= def
->nb_oargs
;
1386 /* Test if the operation can be removed because all
1387 its outputs are dead. We assume that nb_oargs == 0
1388 implies side effects */
1389 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1390 for(i
= 0; i
< nb_oargs
; i
++) {
1392 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1397 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
, args
, def
->nb_args
);
1398 #ifdef CONFIG_PROFILER
1404 /* output args are dead */
1407 for(i
= 0; i
< nb_oargs
; i
++) {
1409 if (dead_temps
[arg
]) {
1410 dead_args
|= (1 << i
);
1412 if (mem_temps
[arg
]) {
1413 sync_args
|= (1 << i
);
1415 dead_temps
[arg
] = 1;
1419 /* if end of basic block, update */
1420 if (def
->flags
& TCG_OPF_BB_END
) {
1421 tcg_la_bb_end(s
, dead_temps
, mem_temps
);
1422 } else if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1423 /* globals should be synced to memory */
1424 memset(mem_temps
, 1, s
->nb_globals
);
1427 /* input args are live */
1428 for(i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1430 if (dead_temps
[arg
]) {
1431 dead_args
|= (1 << i
);
1433 dead_temps
[arg
] = 0;
1435 s
->op_dead_args
[op_index
] = dead_args
;
1436 s
->op_sync_args
[op_index
] = sync_args
;
1443 if (args
!= s
->gen_opparam_buf
) {
1448 /* dummy liveness analysis */
1449 static void tcg_liveness_analysis(TCGContext
*s
)
1452 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1454 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1455 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1456 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1457 memset(s
->op_sync_args
, 0, nb_ops
* sizeof(uint8_t));
1462 static void dump_regs(TCGContext
*s
)
1468 for(i
= 0; i
< s
->nb_temps
; i
++) {
1470 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1471 switch(ts
->val_type
) {
1473 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1476 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1478 case TEMP_VAL_CONST
:
1479 printf("$0x%" TCG_PRIlx
, ts
->val
);
1491 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1492 if (s
->reg_to_temp
[i
] >= 0) {
1494 tcg_target_reg_names
[i
],
1495 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1500 static void check_regs(TCGContext
*s
)
1506 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1507 k
= s
->reg_to_temp
[reg
];
1510 if (ts
->val_type
!= TEMP_VAL_REG
||
1512 printf("Inconsistency for register %s:\n",
1513 tcg_target_reg_names
[reg
]);
1518 for(k
= 0; k
< s
->nb_temps
; k
++) {
1520 if (ts
->val_type
== TEMP_VAL_REG
&&
1522 s
->reg_to_temp
[ts
->reg
] != k
) {
1523 printf("Inconsistency for temp %s:\n",
1524 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1526 printf("reg state:\n");
1534 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1537 ts
= &s
->temps
[temp
];
1538 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1539 /* Sparc64 stack is accessed with offset of 2047 */
1540 s
->current_frame_offset
= (s
->current_frame_offset
+
1541 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1542 ~(sizeof(tcg_target_long
) - 1);
1544 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1548 ts
->mem_offset
= s
->current_frame_offset
;
1549 ts
->mem_reg
= s
->frame_reg
;
1550 ts
->mem_allocated
= 1;
1551 s
->current_frame_offset
+= (tcg_target_long
)sizeof(tcg_target_long
);
1554 /* sync register 'reg' by saving it to the corresponding temporary */
1555 static inline void tcg_reg_sync(TCGContext
*s
, int reg
)
1560 temp
= s
->reg_to_temp
[reg
];
1561 ts
= &s
->temps
[temp
];
1562 assert(ts
->val_type
== TEMP_VAL_REG
);
1563 if (!ts
->mem_coherent
&& !ts
->fixed_reg
) {
1564 if (!ts
->mem_allocated
) {
1565 temp_allocate_frame(s
, temp
);
1567 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1569 ts
->mem_coherent
= 1;
1572 /* free register 'reg' by spilling the corresponding temporary if necessary */
1573 static void tcg_reg_free(TCGContext
*s
, int reg
)
1577 temp
= s
->reg_to_temp
[reg
];
1579 tcg_reg_sync(s
, reg
);
1580 s
->temps
[temp
].val_type
= TEMP_VAL_MEM
;
1581 s
->reg_to_temp
[reg
] = -1;
1585 /* Allocate a register belonging to reg1 & ~reg2 */
1586 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1591 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1593 /* first try free registers */
1594 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1595 reg
= tcg_target_reg_alloc_order
[i
];
1596 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1600 /* XXX: do better spill choice */
1601 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1602 reg
= tcg_target_reg_alloc_order
[i
];
1603 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1604 tcg_reg_free(s
, reg
);
1612 /* mark a temporary as dead. */
1613 static inline void temp_dead(TCGContext
*s
, int temp
)
1617 ts
= &s
->temps
[temp
];
1618 if (!ts
->fixed_reg
) {
1619 if (ts
->val_type
== TEMP_VAL_REG
) {
1620 s
->reg_to_temp
[ts
->reg
] = -1;
1622 if (temp
< s
->nb_globals
|| (ts
->temp_local
&& ts
->mem_allocated
)) {
1623 ts
->val_type
= TEMP_VAL_MEM
;
1625 ts
->val_type
= TEMP_VAL_DEAD
;
1630 /* sync a temporary to memory. 'allocated_regs' is used in case a
1631 temporary registers needs to be allocated to store a constant. */
1632 static inline void temp_sync(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1636 ts
= &s
->temps
[temp
];
1637 if (!ts
->fixed_reg
) {
1638 switch(ts
->val_type
) {
1639 case TEMP_VAL_CONST
:
1640 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1642 ts
->val_type
= TEMP_VAL_REG
;
1643 s
->reg_to_temp
[ts
->reg
] = temp
;
1644 ts
->mem_coherent
= 0;
1645 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1648 tcg_reg_sync(s
, ts
->reg
);
1659 /* save a temporary to memory. 'allocated_regs' is used in case a
1660 temporary registers needs to be allocated to store a constant. */
1661 static inline void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1663 #ifdef USE_LIVENESS_ANALYSIS
1664 /* The liveness analysis already ensures that globals are back
1665 in memory. Keep an assert for safety. */
1666 assert(s
->temps
[temp
].val_type
== TEMP_VAL_MEM
|| s
->temps
[temp
].fixed_reg
);
1668 temp_sync(s
, temp
, allocated_regs
);
1673 /* save globals to their canonical location and assume they can be
1674 modified be the following code. 'allocated_regs' is used in case a
1675 temporary registers needs to be allocated to store a constant. */
1676 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1680 for(i
= 0; i
< s
->nb_globals
; i
++) {
1681 temp_save(s
, i
, allocated_regs
);
1685 /* sync globals to their canonical location and assume they can be
1686 read by the following code. 'allocated_regs' is used in case a
1687 temporary registers needs to be allocated to store a constant. */
1688 static void sync_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1692 for (i
= 0; i
< s
->nb_globals
; i
++) {
1693 #ifdef USE_LIVENESS_ANALYSIS
1694 assert(s
->temps
[i
].val_type
!= TEMP_VAL_REG
|| s
->temps
[i
].fixed_reg
||
1695 s
->temps
[i
].mem_coherent
);
1697 temp_sync(s
, i
, allocated_regs
);
1702 /* at the end of a basic block, we assume all temporaries are dead and
1703 all globals are stored at their canonical location. */
1704 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1709 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1711 if (ts
->temp_local
) {
1712 temp_save(s
, i
, allocated_regs
);
1714 #ifdef USE_LIVENESS_ANALYSIS
1715 /* The liveness analysis already ensures that temps are dead.
1716 Keep an assert for safety. */
1717 assert(ts
->val_type
== TEMP_VAL_DEAD
);
1724 save_globals(s
, allocated_regs
);
1727 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1728 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1730 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
,
1731 uint16_t dead_args
, uint8_t sync_args
)
1734 tcg_target_ulong val
;
1736 ots
= &s
->temps
[args
[0]];
1739 if (ots
->fixed_reg
) {
1740 /* for fixed registers, we do not do any constant
1742 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1744 /* The movi is not explicitly generated here */
1745 if (ots
->val_type
== TEMP_VAL_REG
)
1746 s
->reg_to_temp
[ots
->reg
] = -1;
1747 ots
->val_type
= TEMP_VAL_CONST
;
1750 if (NEED_SYNC_ARG(0)) {
1751 temp_sync(s
, args
[0], s
->reserved_regs
);
1753 if (IS_DEAD_ARG(0)) {
1754 temp_dead(s
, args
[0]);
1758 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1759 const TCGArg
*args
, uint16_t dead_args
,
1762 TCGRegSet allocated_regs
;
1764 const TCGArgConstraint
*arg_ct
, *oarg_ct
;
1766 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1767 ots
= &s
->temps
[args
[0]];
1768 ts
= &s
->temps
[args
[1]];
1769 oarg_ct
= &def
->args_ct
[0];
1770 arg_ct
= &def
->args_ct
[1];
1772 /* If the source value is not in a register, and we're going to be
1773 forced to have it in a register in order to perform the copy,
1774 then copy the SOURCE value into its own register first. That way
1775 we don't have to reload SOURCE the next time it is used. */
1776 if (((NEED_SYNC_ARG(0) || ots
->fixed_reg
) && ts
->val_type
!= TEMP_VAL_REG
)
1777 || ts
->val_type
== TEMP_VAL_MEM
) {
1778 ts
->reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1779 if (ts
->val_type
== TEMP_VAL_MEM
) {
1780 tcg_out_ld(s
, ts
->type
, ts
->reg
, ts
->mem_reg
, ts
->mem_offset
);
1781 ts
->mem_coherent
= 1;
1782 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1783 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1785 s
->reg_to_temp
[ts
->reg
] = args
[1];
1786 ts
->val_type
= TEMP_VAL_REG
;
1789 if (IS_DEAD_ARG(0) && !ots
->fixed_reg
) {
1790 /* mov to a non-saved dead register makes no sense (even with
1791 liveness analysis disabled). */
1792 assert(NEED_SYNC_ARG(0));
1793 /* The code above should have moved the temp to a register. */
1794 assert(ts
->val_type
== TEMP_VAL_REG
);
1795 if (!ots
->mem_allocated
) {
1796 temp_allocate_frame(s
, args
[0]);
1798 tcg_out_st(s
, ots
->type
, ts
->reg
, ots
->mem_reg
, ots
->mem_offset
);
1799 if (IS_DEAD_ARG(1)) {
1800 temp_dead(s
, args
[1]);
1802 temp_dead(s
, args
[0]);
1803 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1804 /* propagate constant */
1805 if (ots
->val_type
== TEMP_VAL_REG
) {
1806 s
->reg_to_temp
[ots
->reg
] = -1;
1808 ots
->val_type
= TEMP_VAL_CONST
;
1811 /* The code in the first if block should have moved the
1812 temp to a register. */
1813 assert(ts
->val_type
== TEMP_VAL_REG
);
1814 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1815 /* the mov can be suppressed */
1816 if (ots
->val_type
== TEMP_VAL_REG
) {
1817 s
->reg_to_temp
[ots
->reg
] = -1;
1820 temp_dead(s
, args
[1]);
1822 if (ots
->val_type
!= TEMP_VAL_REG
) {
1823 /* When allocating a new register, make sure to not spill the
1825 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1826 ots
->reg
= tcg_reg_alloc(s
, oarg_ct
->u
.regs
, allocated_regs
);
1828 tcg_out_mov(s
, ots
->type
, ots
->reg
, ts
->reg
);
1830 ots
->val_type
= TEMP_VAL_REG
;
1831 ots
->mem_coherent
= 0;
1832 s
->reg_to_temp
[ots
->reg
] = args
[0];
1833 if (NEED_SYNC_ARG(0)) {
1834 tcg_reg_sync(s
, ots
->reg
);
1839 static void tcg_reg_alloc_op(TCGContext
*s
,
1840 const TCGOpDef
*def
, TCGOpcode opc
,
1841 const TCGArg
*args
, uint16_t dead_args
,
1844 TCGRegSet allocated_regs
;
1845 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1847 const TCGArgConstraint
*arg_ct
;
1849 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1850 int const_args
[TCG_MAX_OP_ARGS
];
1852 nb_oargs
= def
->nb_oargs
;
1853 nb_iargs
= def
->nb_iargs
;
1855 /* copy constants */
1856 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1857 args
+ nb_oargs
+ nb_iargs
,
1858 sizeof(TCGArg
) * def
->nb_cargs
);
1860 /* satisfy input constraints */
1861 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1862 for(k
= 0; k
< nb_iargs
; k
++) {
1863 i
= def
->sorted_args
[nb_oargs
+ k
];
1865 arg_ct
= &def
->args_ct
[i
];
1866 ts
= &s
->temps
[arg
];
1867 if (ts
->val_type
== TEMP_VAL_MEM
) {
1868 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1869 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1870 ts
->val_type
= TEMP_VAL_REG
;
1872 ts
->mem_coherent
= 1;
1873 s
->reg_to_temp
[reg
] = arg
;
1874 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1875 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1876 /* constant is OK for instruction */
1878 new_args
[i
] = ts
->val
;
1881 /* need to move to a register */
1882 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1883 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1884 ts
->val_type
= TEMP_VAL_REG
;
1886 ts
->mem_coherent
= 0;
1887 s
->reg_to_temp
[reg
] = arg
;
1890 assert(ts
->val_type
== TEMP_VAL_REG
);
1891 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
1892 if (ts
->fixed_reg
) {
1893 /* if fixed register, we must allocate a new register
1894 if the alias is not the same register */
1895 if (arg
!= args
[arg_ct
->alias_index
])
1896 goto allocate_in_reg
;
1898 /* if the input is aliased to an output and if it is
1899 not dead after the instruction, we must allocate
1900 a new register and move it */
1901 if (!IS_DEAD_ARG(i
)) {
1902 goto allocate_in_reg
;
1907 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1908 /* nothing to do : the constraint is satisfied */
1911 /* allocate a new register matching the constraint
1912 and move the temporary register into it */
1913 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1914 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1918 tcg_regset_set_reg(allocated_regs
, reg
);
1922 /* mark dead temporaries and free the associated registers */
1923 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1924 if (IS_DEAD_ARG(i
)) {
1925 temp_dead(s
, args
[i
]);
1929 if (def
->flags
& TCG_OPF_BB_END
) {
1930 tcg_reg_alloc_bb_end(s
, allocated_regs
);
1932 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1933 /* XXX: permit generic clobber register list ? */
1934 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1935 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1936 tcg_reg_free(s
, reg
);
1940 if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1941 /* sync globals if the op has side effects and might trigger
1943 sync_globals(s
, allocated_regs
);
1946 /* satisfy the output constraints */
1947 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1948 for(k
= 0; k
< nb_oargs
; k
++) {
1949 i
= def
->sorted_args
[k
];
1951 arg_ct
= &def
->args_ct
[i
];
1952 ts
= &s
->temps
[arg
];
1953 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1954 reg
= new_args
[arg_ct
->alias_index
];
1956 /* if fixed register, we try to use it */
1958 if (ts
->fixed_reg
&&
1959 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1962 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1964 tcg_regset_set_reg(allocated_regs
, reg
);
1965 /* if a fixed register is used, then a move will be done afterwards */
1966 if (!ts
->fixed_reg
) {
1967 if (ts
->val_type
== TEMP_VAL_REG
) {
1968 s
->reg_to_temp
[ts
->reg
] = -1;
1970 ts
->val_type
= TEMP_VAL_REG
;
1972 /* temp value is modified, so the value kept in memory is
1973 potentially not the same */
1974 ts
->mem_coherent
= 0;
1975 s
->reg_to_temp
[reg
] = arg
;
1982 /* emit instruction */
1983 tcg_out_op(s
, opc
, new_args
, const_args
);
1985 /* move the outputs in the correct register if needed */
1986 for(i
= 0; i
< nb_oargs
; i
++) {
1987 ts
= &s
->temps
[args
[i
]];
1989 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
1990 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
1992 if (NEED_SYNC_ARG(i
)) {
1993 tcg_reg_sync(s
, reg
);
1995 if (IS_DEAD_ARG(i
)) {
1996 temp_dead(s
, args
[i
]);
2001 #ifdef TCG_TARGET_STACK_GROWSUP
2002 #define STACK_DIR(x) (-(x))
2004 #define STACK_DIR(x) (x)
2007 static int tcg_reg_alloc_call(TCGContext
*s
, const TCGOpDef
*def
,
2008 TCGOpcode opc
, const TCGArg
*args
,
2009 uint16_t dead_args
, uint8_t sync_args
)
2011 int nb_iargs
, nb_oargs
, flags
, nb_regs
, i
, reg
, nb_params
;
2012 TCGArg arg
, func_arg
;
2014 tcg_target_long stack_offset
, call_stack_size
, func_addr
;
2015 int const_func_arg
, allocate_args
;
2016 TCGRegSet allocated_regs
;
2017 const TCGArgConstraint
*arg_ct
;
2021 nb_oargs
= arg
>> 16;
2022 nb_iargs
= arg
& 0xffff;
2023 nb_params
= nb_iargs
- 1;
2025 flags
= args
[nb_oargs
+ nb_iargs
];
2027 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
2028 if (nb_regs
> nb_params
)
2029 nb_regs
= nb_params
;
2031 /* assign stack slots first */
2032 call_stack_size
= (nb_params
- nb_regs
) * sizeof(tcg_target_long
);
2033 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
2034 ~(TCG_TARGET_STACK_ALIGN
- 1);
2035 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
2036 if (allocate_args
) {
2037 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2038 preallocate call stack */
2042 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
2043 for(i
= nb_regs
; i
< nb_params
; i
++) {
2044 arg
= args
[nb_oargs
+ i
];
2045 #ifdef TCG_TARGET_STACK_GROWSUP
2046 stack_offset
-= sizeof(tcg_target_long
);
2048 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2049 ts
= &s
->temps
[arg
];
2050 if (ts
->val_type
== TEMP_VAL_REG
) {
2051 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
2052 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2053 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2055 /* XXX: not correct if reading values from the stack */
2056 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2057 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2058 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2059 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2061 /* XXX: sign extend may be needed on some targets */
2062 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2063 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2068 #ifndef TCG_TARGET_STACK_GROWSUP
2069 stack_offset
+= sizeof(tcg_target_long
);
2073 /* assign input registers */
2074 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2075 for(i
= 0; i
< nb_regs
; i
++) {
2076 arg
= args
[nb_oargs
+ i
];
2077 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2078 ts
= &s
->temps
[arg
];
2079 reg
= tcg_target_call_iarg_regs
[i
];
2080 tcg_reg_free(s
, reg
);
2081 if (ts
->val_type
== TEMP_VAL_REG
) {
2082 if (ts
->reg
!= reg
) {
2083 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2085 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2086 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2087 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2088 /* XXX: sign extend ? */
2089 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2093 tcg_regset_set_reg(allocated_regs
, reg
);
2097 /* assign function address */
2098 func_arg
= args
[nb_oargs
+ nb_iargs
- 1];
2099 arg_ct
= &def
->args_ct
[0];
2100 ts
= &s
->temps
[func_arg
];
2101 func_addr
= ts
->val
;
2103 if (ts
->val_type
== TEMP_VAL_MEM
) {
2104 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2105 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2107 tcg_regset_set_reg(allocated_regs
, reg
);
2108 } else if (ts
->val_type
== TEMP_VAL_REG
) {
2110 if (!tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2111 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2112 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2115 tcg_regset_set_reg(allocated_regs
, reg
);
2116 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2117 if (tcg_target_const_match(func_addr
, arg_ct
)) {
2119 func_arg
= func_addr
;
2121 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2122 tcg_out_movi(s
, ts
->type
, reg
, func_addr
);
2124 tcg_regset_set_reg(allocated_regs
, reg
);
2131 /* mark dead temporaries and free the associated registers */
2132 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2133 if (IS_DEAD_ARG(i
)) {
2134 temp_dead(s
, args
[i
]);
2138 /* clobber call registers */
2139 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2140 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2141 tcg_reg_free(s
, reg
);
2145 /* Save globals if they might be written by the helper, sync them if
2146 they might be read. */
2147 if (flags
& TCG_CALL_NO_READ_GLOBALS
) {
2149 } else if (flags
& TCG_CALL_NO_WRITE_GLOBALS
) {
2150 sync_globals(s
, allocated_regs
);
2152 save_globals(s
, allocated_regs
);
2155 tcg_out_op(s
, opc
, &func_arg
, &const_func_arg
);
2157 /* assign output registers and emit moves if needed */
2158 for(i
= 0; i
< nb_oargs
; i
++) {
2160 ts
= &s
->temps
[arg
];
2161 reg
= tcg_target_call_oarg_regs
[i
];
2162 assert(s
->reg_to_temp
[reg
] == -1);
2163 if (ts
->fixed_reg
) {
2164 if (ts
->reg
!= reg
) {
2165 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2168 if (ts
->val_type
== TEMP_VAL_REG
) {
2169 s
->reg_to_temp
[ts
->reg
] = -1;
2171 ts
->val_type
= TEMP_VAL_REG
;
2173 ts
->mem_coherent
= 0;
2174 s
->reg_to_temp
[reg
] = arg
;
2175 if (NEED_SYNC_ARG(i
)) {
2176 tcg_reg_sync(s
, reg
);
2178 if (IS_DEAD_ARG(i
)) {
2179 temp_dead(s
, args
[i
]);
2184 return nb_iargs
+ nb_oargs
+ def
->nb_cargs
+ 1;
2187 #ifdef CONFIG_PROFILER
2189 static int64_t tcg_table_op_count
[NB_OPS
];
2191 static void dump_op_count(void)
2195 f
= fopen("/tmp/op.log", "w");
2196 for(i
= INDEX_op_end
; i
< NB_OPS
; i
++) {
2197 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, tcg_table_op_count
[i
]);
2204 static inline int tcg_gen_code_common(TCGContext
*s
, uint8_t *gen_code_buf
,
2209 const TCGOpDef
*def
;
2213 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2220 #ifdef CONFIG_PROFILER
2221 s
->opt_time
-= profile_getclock();
2224 #ifdef USE_TCG_OPTIMIZATIONS
2225 s
->gen_opparam_ptr
=
2226 tcg_optimize(s
, s
->gen_opc_ptr
, s
->gen_opparam_buf
, tcg_op_defs
);
2229 #ifdef CONFIG_PROFILER
2230 s
->opt_time
+= profile_getclock();
2231 s
->la_time
-= profile_getclock();
2234 tcg_liveness_analysis(s
);
2236 #ifdef CONFIG_PROFILER
2237 s
->la_time
+= profile_getclock();
2241 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2242 qemu_log("OP after optimization and liveness analysis:\n");
2248 tcg_reg_alloc_start(s
);
2250 s
->code_buf
= gen_code_buf
;
2251 s
->code_ptr
= gen_code_buf
;
2253 args
= s
->gen_opparam_buf
;
2257 opc
= s
->gen_opc_buf
[op_index
];
2258 #ifdef CONFIG_PROFILER
2259 tcg_table_op_count
[opc
]++;
2261 def
= &tcg_op_defs
[opc
];
2263 printf("%s: %d %d %d\n", def
->name
,
2264 def
->nb_oargs
, def
->nb_iargs
, def
->nb_cargs
);
2268 case INDEX_op_mov_i32
:
2269 case INDEX_op_mov_i64
:
2270 tcg_reg_alloc_mov(s
, def
, args
, s
->op_dead_args
[op_index
],
2271 s
->op_sync_args
[op_index
]);
2273 case INDEX_op_movi_i32
:
2274 case INDEX_op_movi_i64
:
2275 tcg_reg_alloc_movi(s
, args
, s
->op_dead_args
[op_index
],
2276 s
->op_sync_args
[op_index
]);
2278 case INDEX_op_debug_insn_start
:
2279 /* debug instruction */
2289 case INDEX_op_discard
:
2290 temp_dead(s
, args
[0]);
2292 case INDEX_op_set_label
:
2293 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2294 tcg_out_label(s
, args
[0], s
->code_ptr
);
2297 args
+= tcg_reg_alloc_call(s
, def
, opc
, args
,
2298 s
->op_dead_args
[op_index
],
2299 s
->op_sync_args
[op_index
]);
2304 /* Sanity check that we've not introduced any unhandled opcodes. */
2305 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2308 /* Note: in order to speed up the code, it would be much
2309 faster to have specialized register allocator functions for
2310 some common argument patterns */
2311 tcg_reg_alloc_op(s
, def
, opc
, args
, s
->op_dead_args
[op_index
],
2312 s
->op_sync_args
[op_index
]);
2315 args
+= def
->nb_args
;
2317 if (search_pc
>= 0 && search_pc
< s
->code_ptr
- gen_code_buf
) {
2326 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
2327 /* Generate TB finalization at the end of block */
2328 tcg_out_tb_finalize(s
);
2333 int tcg_gen_code(TCGContext
*s
, uint8_t *gen_code_buf
)
2335 #ifdef CONFIG_PROFILER
2338 n
= (s
->gen_opc_ptr
- s
->gen_opc_buf
);
2340 if (n
> s
->op_count_max
)
2341 s
->op_count_max
= n
;
2343 s
->temp_count
+= s
->nb_temps
;
2344 if (s
->nb_temps
> s
->temp_count_max
)
2345 s
->temp_count_max
= s
->nb_temps
;
2349 tcg_gen_code_common(s
, gen_code_buf
, -1);
2351 /* flush instruction cache */
2352 flush_icache_range((tcg_target_ulong
)gen_code_buf
,
2353 (tcg_target_ulong
)s
->code_ptr
);
2355 return s
->code_ptr
- gen_code_buf
;
2358 /* Return the index of the micro operation such as the pc after is <
2359 offset bytes from the start of the TB. The contents of gen_code_buf must
2360 not be changed, though writing the same values is ok.
2361 Return -1 if not found. */
2362 int tcg_gen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
, long offset
)
2364 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2367 #ifdef CONFIG_PROFILER
2368 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2370 TCGContext
*s
= &tcg_ctx
;
2373 tot
= s
->interm_time
+ s
->code_time
;
2374 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2376 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2378 s
->tb_count1
- s
->tb_count
,
2379 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2380 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2381 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2382 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2384 (double)s
->del_op_count
/ s
->tb_count
: 0);
2385 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2387 (double)s
->temp_count
/ s
->tb_count
: 0,
2390 cpu_fprintf(f
, "cycles/op %0.1f\n",
2391 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2392 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2393 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2394 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2395 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2398 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2399 (double)s
->interm_time
/ tot
* 100.0);
2400 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2401 (double)s
->code_time
/ tot
* 100.0);
2402 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2403 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2405 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2406 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2407 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2409 cpu_fprintf(f
, " avg cycles %0.1f\n",
2410 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2415 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2417 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2421 #ifdef ELF_HOST_MACHINE
2422 /* In order to use this feature, the backend needs to do three things:
2424 (1) Define ELF_HOST_MACHINE to indicate both what value to
2425 put into the ELF image and to indicate support for the feature.
2427 (2) Define tcg_register_jit. This should create a buffer containing
2428 the contents of a .debug_frame section that describes the post-
2429 prologue unwind info for the tcg machine.
2431 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2434 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2441 struct jit_code_entry
{
2442 struct jit_code_entry
*next_entry
;
2443 struct jit_code_entry
*prev_entry
;
2444 const void *symfile_addr
;
2445 uint64_t symfile_size
;
2448 struct jit_descriptor
{
2450 uint32_t action_flag
;
2451 struct jit_code_entry
*relevant_entry
;
2452 struct jit_code_entry
*first_entry
;
2455 void __jit_debug_register_code(void) __attribute__((noinline
));
2456 void __jit_debug_register_code(void)
2461 /* Must statically initialize the version, because GDB may check
2462 the version before we can set it. */
2463 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2465 /* End GDB interface. */
2467 static int find_string(const char *strtab
, const char *str
)
2469 const char *p
= strtab
+ 1;
2472 if (strcmp(p
, str
) == 0) {
2479 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2480 void *debug_frame
, size_t debug_frame_size
)
2482 struct __attribute__((packed
)) DebugInfo
{
2489 uintptr_t cu_low_pc
;
2490 uintptr_t cu_high_pc
;
2493 uintptr_t fn_low_pc
;
2494 uintptr_t fn_high_pc
;
2503 struct DebugInfo di
;
2508 struct ElfImage
*img
;
2510 static const struct ElfImage img_template
= {
2512 .e_ident
[EI_MAG0
] = ELFMAG0
,
2513 .e_ident
[EI_MAG1
] = ELFMAG1
,
2514 .e_ident
[EI_MAG2
] = ELFMAG2
,
2515 .e_ident
[EI_MAG3
] = ELFMAG3
,
2516 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2517 .e_ident
[EI_DATA
] = ELF_DATA
,
2518 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2520 .e_machine
= ELF_HOST_MACHINE
,
2521 .e_version
= EV_CURRENT
,
2522 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2523 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2524 .e_ehsize
= sizeof(ElfW(Shdr
)),
2525 .e_phentsize
= sizeof(ElfW(Phdr
)),
2527 .e_shentsize
= sizeof(ElfW(Shdr
)),
2528 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2529 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2530 #ifdef ELF_HOST_FLAGS
2531 .e_flags
= ELF_HOST_FLAGS
,
2534 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2542 [0] = { .sh_type
= SHT_NULL
},
2543 /* Trick: The contents of code_gen_buffer are not present in
2544 this fake ELF file; that got allocated elsewhere. Therefore
2545 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2546 will not look for contents. We can record any address. */
2548 .sh_type
= SHT_NOBITS
,
2549 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2551 [2] = { /* .debug_info */
2552 .sh_type
= SHT_PROGBITS
,
2553 .sh_offset
= offsetof(struct ElfImage
, di
),
2554 .sh_size
= sizeof(struct DebugInfo
),
2556 [3] = { /* .debug_abbrev */
2557 .sh_type
= SHT_PROGBITS
,
2558 .sh_offset
= offsetof(struct ElfImage
, da
),
2559 .sh_size
= sizeof(img
->da
),
2561 [4] = { /* .debug_frame */
2562 .sh_type
= SHT_PROGBITS
,
2563 .sh_offset
= sizeof(struct ElfImage
),
2565 [5] = { /* .symtab */
2566 .sh_type
= SHT_SYMTAB
,
2567 .sh_offset
= offsetof(struct ElfImage
, sym
),
2568 .sh_size
= sizeof(img
->sym
),
2570 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2571 .sh_entsize
= sizeof(ElfW(Sym
)),
2573 [6] = { /* .strtab */
2574 .sh_type
= SHT_STRTAB
,
2575 .sh_offset
= offsetof(struct ElfImage
, str
),
2576 .sh_size
= sizeof(img
->str
),
2580 [1] = { /* code_gen_buffer */
2581 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2586 .len
= sizeof(struct DebugInfo
) - 4,
2588 .ptr_size
= sizeof(void *),
2590 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2592 .fn_name
= "code_gen_buffer"
2595 1, /* abbrev number (the cu) */
2596 0x11, 1, /* DW_TAG_compile_unit, has children */
2597 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2598 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2599 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2600 0, 0, /* end of abbrev */
2601 2, /* abbrev number (the fn) */
2602 0x2e, 0, /* DW_TAG_subprogram, no children */
2603 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2604 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2605 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2606 0, 0, /* end of abbrev */
2607 0 /* no more abbrev */
2609 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2610 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2613 /* We only need a single jit entry; statically allocate it. */
2614 static struct jit_code_entry one_entry
;
2616 uintptr_t buf
= (uintptr_t)buf_ptr
;
2617 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2619 img
= g_malloc(img_size
);
2620 *img
= img_template
;
2621 memcpy(img
+ 1, debug_frame
, debug_frame_size
);
2623 img
->phdr
.p_vaddr
= buf
;
2624 img
->phdr
.p_paddr
= buf
;
2625 img
->phdr
.p_memsz
= buf_size
;
2627 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2628 img
->shdr
[1].sh_addr
= buf
;
2629 img
->shdr
[1].sh_size
= buf_size
;
2631 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2632 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2634 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2635 img
->shdr
[4].sh_size
= debug_frame_size
;
2637 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2638 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2640 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2641 img
->sym
[1].st_value
= buf
;
2642 img
->sym
[1].st_size
= buf_size
;
2644 img
->di
.cu_low_pc
= buf
;
2645 img
->di
.cu_high_pc
= buf_size
;
2646 img
->di
.fn_low_pc
= buf
;
2647 img
->di
.fn_high_pc
= buf_size
;
2650 /* Enable this block to be able to debug the ELF image file creation.
2651 One can use readelf, objdump, or other inspection utilities. */
2653 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2655 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2656 /* Avoid stupid unused return value warning for fwrite. */
2663 one_entry
.symfile_addr
= img
;
2664 one_entry
.symfile_size
= img_size
;
2666 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2667 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2668 __jit_debug_descriptor
.first_entry
= &one_entry
;
2669 __jit_debug_register_code();
2672 /* No support for the feature. Provide the entry point expected by exec.c,
2673 and implement the internal function we declared earlier. */
2675 static void tcg_register_jit_int(void *buf
, size_t size
,
2676 void *debug_frame
, size_t debug_frame_size
)
2680 void tcg_register_jit(void *buf
, size_t buf_size
)
2683 #endif /* ELF_HOST_MACHINE */