]> git.proxmox.com Git - qemu.git/blob - tcg/tcg.c
tcg: Add muluh and mulsh opcodes
[qemu.git] / tcg / tcg.c
1 /*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
28
29 #include "config.h"
30
31 /* Define to jump the ELF file used to communicate with GDB. */
32 #undef DEBUG_JIT
33
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
36 #define NDEBUG
37 #endif
38
39 #include "qemu-common.h"
40 #include "qemu/cache-utils.h"
41 #include "qemu/host-utils.h"
42 #include "qemu/timer.h"
43
44 /* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
46 instructions */
47 #define NO_CPU_IO_DEFS
48 #include "cpu.h"
49
50 #include "tcg-op.h"
51
52 #if TCG_TARGET_REG_BITS == 64
53 # define ELF_CLASS ELFCLASS64
54 #else
55 # define ELF_CLASS ELFCLASS32
56 #endif
57 #ifdef HOST_WORDS_BIGENDIAN
58 # define ELF_DATA ELFDATA2MSB
59 #else
60 # define ELF_DATA ELFDATA2LSB
61 #endif
62
63 #include "elf.h"
64
65 /* Forward declarations for functions declared in tcg-target.c and used here. */
66 static void tcg_target_init(TCGContext *s);
67 static void tcg_target_qemu_prologue(TCGContext *s);
68 static void patch_reloc(uint8_t *code_ptr, int type,
69 tcg_target_long value, tcg_target_long addend);
70
71 /* The CIE and FDE header definitions will be common to all hosts. */
72 typedef struct {
73 uint32_t len __attribute__((aligned((sizeof(void *)))));
74 uint32_t id;
75 uint8_t version;
76 char augmentation[1];
77 uint8_t code_align;
78 uint8_t data_align;
79 uint8_t return_column;
80 } DebugFrameCIE;
81
82 typedef struct QEMU_PACKED {
83 uint32_t len __attribute__((aligned((sizeof(void *)))));
84 uint32_t cie_offset;
85 tcg_target_long func_start;
86 tcg_target_long func_len;
87 } DebugFrameFDEHeader;
88
89 static void tcg_register_jit_int(void *buf, size_t size,
90 void *debug_frame, size_t debug_frame_size)
91 __attribute__((unused));
92
93 /* Forward declarations for functions declared and used in tcg-target.c. */
94 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str);
95 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
96 tcg_target_long arg2);
97 static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg);
98 static void tcg_out_movi(TCGContext *s, TCGType type,
99 TCGReg ret, tcg_target_long arg);
100 static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
101 const int *const_args);
102 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
103 tcg_target_long arg2);
104 static int tcg_target_const_match(tcg_target_long val,
105 const TCGArgConstraint *arg_ct);
106
107 TCGOpDef tcg_op_defs[] = {
108 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
109 #include "tcg-opc.h"
110 #undef DEF
111 };
112 const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs);
113
114 static TCGRegSet tcg_target_available_regs[2];
115 static TCGRegSet tcg_target_call_clobber_regs;
116
117 static inline void tcg_out8(TCGContext *s, uint8_t v)
118 {
119 *s->code_ptr++ = v;
120 }
121
122 static inline void tcg_out16(TCGContext *s, uint16_t v)
123 {
124 uint8_t *p = s->code_ptr;
125 *(uint16_t *)p = v;
126 s->code_ptr = p + 2;
127 }
128
129 static inline void tcg_out32(TCGContext *s, uint32_t v)
130 {
131 uint8_t *p = s->code_ptr;
132 *(uint32_t *)p = v;
133 s->code_ptr = p + 4;
134 }
135
136 static inline void tcg_out64(TCGContext *s, uint64_t v)
137 {
138 uint8_t *p = s->code_ptr;
139 *(uint64_t *)p = v;
140 s->code_ptr = p + 8;
141 }
142
143 /* label relocation processing */
144
145 static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
146 int label_index, long addend)
147 {
148 TCGLabel *l;
149 TCGRelocation *r;
150
151 l = &s->labels[label_index];
152 if (l->has_value) {
153 /* FIXME: This may break relocations on RISC targets that
154 modify instruction fields in place. The caller may not have
155 written the initial value. */
156 patch_reloc(code_ptr, type, l->u.value, addend);
157 } else {
158 /* add a new relocation entry */
159 r = tcg_malloc(sizeof(TCGRelocation));
160 r->type = type;
161 r->ptr = code_ptr;
162 r->addend = addend;
163 r->next = l->u.first_reloc;
164 l->u.first_reloc = r;
165 }
166 }
167
168 static void tcg_out_label(TCGContext *s, int label_index, void *ptr)
169 {
170 TCGLabel *l;
171 TCGRelocation *r;
172 tcg_target_long value = (tcg_target_long)ptr;
173
174 l = &s->labels[label_index];
175 if (l->has_value)
176 tcg_abort();
177 r = l->u.first_reloc;
178 while (r != NULL) {
179 patch_reloc(r->ptr, r->type, value, r->addend);
180 r = r->next;
181 }
182 l->has_value = 1;
183 l->u.value = value;
184 }
185
186 int gen_new_label(void)
187 {
188 TCGContext *s = &tcg_ctx;
189 int idx;
190 TCGLabel *l;
191
192 if (s->nb_labels >= TCG_MAX_LABELS)
193 tcg_abort();
194 idx = s->nb_labels++;
195 l = &s->labels[idx];
196 l->has_value = 0;
197 l->u.first_reloc = NULL;
198 return idx;
199 }
200
201 #include "tcg-target.c"
202
203 /* pool based memory allocation */
204 void *tcg_malloc_internal(TCGContext *s, int size)
205 {
206 TCGPool *p;
207 int pool_size;
208
209 if (size > TCG_POOL_CHUNK_SIZE) {
210 /* big malloc: insert a new pool (XXX: could optimize) */
211 p = g_malloc(sizeof(TCGPool) + size);
212 p->size = size;
213 p->next = s->pool_first_large;
214 s->pool_first_large = p;
215 return p->data;
216 } else {
217 p = s->pool_current;
218 if (!p) {
219 p = s->pool_first;
220 if (!p)
221 goto new_pool;
222 } else {
223 if (!p->next) {
224 new_pool:
225 pool_size = TCG_POOL_CHUNK_SIZE;
226 p = g_malloc(sizeof(TCGPool) + pool_size);
227 p->size = pool_size;
228 p->next = NULL;
229 if (s->pool_current)
230 s->pool_current->next = p;
231 else
232 s->pool_first = p;
233 } else {
234 p = p->next;
235 }
236 }
237 }
238 s->pool_current = p;
239 s->pool_cur = p->data + size;
240 s->pool_end = p->data + p->size;
241 return p->data;
242 }
243
244 void tcg_pool_reset(TCGContext *s)
245 {
246 TCGPool *p, *t;
247 for (p = s->pool_first_large; p; p = t) {
248 t = p->next;
249 g_free(p);
250 }
251 s->pool_first_large = NULL;
252 s->pool_cur = s->pool_end = NULL;
253 s->pool_current = NULL;
254 }
255
256 void tcg_context_init(TCGContext *s)
257 {
258 int op, total_args, n;
259 TCGOpDef *def;
260 TCGArgConstraint *args_ct;
261 int *sorted_args;
262
263 memset(s, 0, sizeof(*s));
264 s->nb_globals = 0;
265
266 /* Count total number of arguments and allocate the corresponding
267 space */
268 total_args = 0;
269 for(op = 0; op < NB_OPS; op++) {
270 def = &tcg_op_defs[op];
271 n = def->nb_iargs + def->nb_oargs;
272 total_args += n;
273 }
274
275 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args);
276 sorted_args = g_malloc(sizeof(int) * total_args);
277
278 for(op = 0; op < NB_OPS; op++) {
279 def = &tcg_op_defs[op];
280 def->args_ct = args_ct;
281 def->sorted_args = sorted_args;
282 n = def->nb_iargs + def->nb_oargs;
283 sorted_args += n;
284 args_ct += n;
285 }
286
287 tcg_target_init(s);
288 }
289
290 void tcg_prologue_init(TCGContext *s)
291 {
292 /* init global prologue and epilogue */
293 s->code_buf = s->code_gen_prologue;
294 s->code_ptr = s->code_buf;
295 tcg_target_qemu_prologue(s);
296 flush_icache_range((tcg_target_ulong)s->code_buf,
297 (tcg_target_ulong)s->code_ptr);
298
299 #ifdef DEBUG_DISAS
300 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
301 size_t size = s->code_ptr - s->code_buf;
302 qemu_log("PROLOGUE: [size=%zu]\n", size);
303 log_disas(s->code_buf, size);
304 qemu_log("\n");
305 qemu_log_flush();
306 }
307 #endif
308 }
309
310 void tcg_set_frame(TCGContext *s, int reg,
311 tcg_target_long start, tcg_target_long size)
312 {
313 s->frame_start = start;
314 s->frame_end = start + size;
315 s->frame_reg = reg;
316 }
317
318 void tcg_func_start(TCGContext *s)
319 {
320 int i;
321 tcg_pool_reset(s);
322 s->nb_temps = s->nb_globals;
323 for(i = 0; i < (TCG_TYPE_COUNT * 2); i++)
324 s->first_free_temp[i] = -1;
325 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
326 s->nb_labels = 0;
327 s->current_frame_offset = s->frame_start;
328
329 #ifdef CONFIG_DEBUG_TCG
330 s->goto_tb_issue_mask = 0;
331 #endif
332
333 s->gen_opc_ptr = s->gen_opc_buf;
334 s->gen_opparam_ptr = s->gen_opparam_buf;
335
336 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
337 /* Initialize qemu_ld/st labels to assist code generation at the end of TB
338 for TLB miss cases at the end of TB */
339 s->qemu_ldst_labels = tcg_malloc(sizeof(TCGLabelQemuLdst) *
340 TCG_MAX_QEMU_LDST);
341 s->nb_qemu_ldst_labels = 0;
342 #endif
343 }
344
345 static inline void tcg_temp_alloc(TCGContext *s, int n)
346 {
347 if (n > TCG_MAX_TEMPS)
348 tcg_abort();
349 }
350
351 static inline int tcg_global_reg_new_internal(TCGType type, int reg,
352 const char *name)
353 {
354 TCGContext *s = &tcg_ctx;
355 TCGTemp *ts;
356 int idx;
357
358 #if TCG_TARGET_REG_BITS == 32
359 if (type != TCG_TYPE_I32)
360 tcg_abort();
361 #endif
362 if (tcg_regset_test_reg(s->reserved_regs, reg))
363 tcg_abort();
364 idx = s->nb_globals;
365 tcg_temp_alloc(s, s->nb_globals + 1);
366 ts = &s->temps[s->nb_globals];
367 ts->base_type = type;
368 ts->type = type;
369 ts->fixed_reg = 1;
370 ts->reg = reg;
371 ts->name = name;
372 s->nb_globals++;
373 tcg_regset_set_reg(s->reserved_regs, reg);
374 return idx;
375 }
376
377 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
378 {
379 int idx;
380
381 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
382 return MAKE_TCGV_I32(idx);
383 }
384
385 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
386 {
387 int idx;
388
389 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
390 return MAKE_TCGV_I64(idx);
391 }
392
393 static inline int tcg_global_mem_new_internal(TCGType type, int reg,
394 tcg_target_long offset,
395 const char *name)
396 {
397 TCGContext *s = &tcg_ctx;
398 TCGTemp *ts;
399 int idx;
400
401 idx = s->nb_globals;
402 #if TCG_TARGET_REG_BITS == 32
403 if (type == TCG_TYPE_I64) {
404 char buf[64];
405 tcg_temp_alloc(s, s->nb_globals + 2);
406 ts = &s->temps[s->nb_globals];
407 ts->base_type = type;
408 ts->type = TCG_TYPE_I32;
409 ts->fixed_reg = 0;
410 ts->mem_allocated = 1;
411 ts->mem_reg = reg;
412 #ifdef TCG_TARGET_WORDS_BIGENDIAN
413 ts->mem_offset = offset + 4;
414 #else
415 ts->mem_offset = offset;
416 #endif
417 pstrcpy(buf, sizeof(buf), name);
418 pstrcat(buf, sizeof(buf), "_0");
419 ts->name = strdup(buf);
420 ts++;
421
422 ts->base_type = type;
423 ts->type = TCG_TYPE_I32;
424 ts->fixed_reg = 0;
425 ts->mem_allocated = 1;
426 ts->mem_reg = reg;
427 #ifdef TCG_TARGET_WORDS_BIGENDIAN
428 ts->mem_offset = offset;
429 #else
430 ts->mem_offset = offset + 4;
431 #endif
432 pstrcpy(buf, sizeof(buf), name);
433 pstrcat(buf, sizeof(buf), "_1");
434 ts->name = strdup(buf);
435
436 s->nb_globals += 2;
437 } else
438 #endif
439 {
440 tcg_temp_alloc(s, s->nb_globals + 1);
441 ts = &s->temps[s->nb_globals];
442 ts->base_type = type;
443 ts->type = type;
444 ts->fixed_reg = 0;
445 ts->mem_allocated = 1;
446 ts->mem_reg = reg;
447 ts->mem_offset = offset;
448 ts->name = name;
449 s->nb_globals++;
450 }
451 return idx;
452 }
453
454 TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
455 const char *name)
456 {
457 int idx;
458
459 idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
460 return MAKE_TCGV_I32(idx);
461 }
462
463 TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
464 const char *name)
465 {
466 int idx;
467
468 idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
469 return MAKE_TCGV_I64(idx);
470 }
471
472 static inline int tcg_temp_new_internal(TCGType type, int temp_local)
473 {
474 TCGContext *s = &tcg_ctx;
475 TCGTemp *ts;
476 int idx, k;
477
478 k = type;
479 if (temp_local)
480 k += TCG_TYPE_COUNT;
481 idx = s->first_free_temp[k];
482 if (idx != -1) {
483 /* There is already an available temp with the
484 right type */
485 ts = &s->temps[idx];
486 s->first_free_temp[k] = ts->next_free_temp;
487 ts->temp_allocated = 1;
488 assert(ts->temp_local == temp_local);
489 } else {
490 idx = s->nb_temps;
491 #if TCG_TARGET_REG_BITS == 32
492 if (type == TCG_TYPE_I64) {
493 tcg_temp_alloc(s, s->nb_temps + 2);
494 ts = &s->temps[s->nb_temps];
495 ts->base_type = type;
496 ts->type = TCG_TYPE_I32;
497 ts->temp_allocated = 1;
498 ts->temp_local = temp_local;
499 ts->name = NULL;
500 ts++;
501 ts->base_type = TCG_TYPE_I32;
502 ts->type = TCG_TYPE_I32;
503 ts->temp_allocated = 1;
504 ts->temp_local = temp_local;
505 ts->name = NULL;
506 s->nb_temps += 2;
507 } else
508 #endif
509 {
510 tcg_temp_alloc(s, s->nb_temps + 1);
511 ts = &s->temps[s->nb_temps];
512 ts->base_type = type;
513 ts->type = type;
514 ts->temp_allocated = 1;
515 ts->temp_local = temp_local;
516 ts->name = NULL;
517 s->nb_temps++;
518 }
519 }
520
521 #if defined(CONFIG_DEBUG_TCG)
522 s->temps_in_use++;
523 #endif
524 return idx;
525 }
526
527 TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
528 {
529 int idx;
530
531 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
532 return MAKE_TCGV_I32(idx);
533 }
534
535 TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
536 {
537 int idx;
538
539 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
540 return MAKE_TCGV_I64(idx);
541 }
542
543 static inline void tcg_temp_free_internal(int idx)
544 {
545 TCGContext *s = &tcg_ctx;
546 TCGTemp *ts;
547 int k;
548
549 #if defined(CONFIG_DEBUG_TCG)
550 s->temps_in_use--;
551 if (s->temps_in_use < 0) {
552 fprintf(stderr, "More temporaries freed than allocated!\n");
553 }
554 #endif
555
556 assert(idx >= s->nb_globals && idx < s->nb_temps);
557 ts = &s->temps[idx];
558 assert(ts->temp_allocated != 0);
559 ts->temp_allocated = 0;
560 k = ts->base_type;
561 if (ts->temp_local)
562 k += TCG_TYPE_COUNT;
563 ts->next_free_temp = s->first_free_temp[k];
564 s->first_free_temp[k] = idx;
565 }
566
567 void tcg_temp_free_i32(TCGv_i32 arg)
568 {
569 tcg_temp_free_internal(GET_TCGV_I32(arg));
570 }
571
572 void tcg_temp_free_i64(TCGv_i64 arg)
573 {
574 tcg_temp_free_internal(GET_TCGV_I64(arg));
575 }
576
577 TCGv_i32 tcg_const_i32(int32_t val)
578 {
579 TCGv_i32 t0;
580 t0 = tcg_temp_new_i32();
581 tcg_gen_movi_i32(t0, val);
582 return t0;
583 }
584
585 TCGv_i64 tcg_const_i64(int64_t val)
586 {
587 TCGv_i64 t0;
588 t0 = tcg_temp_new_i64();
589 tcg_gen_movi_i64(t0, val);
590 return t0;
591 }
592
593 TCGv_i32 tcg_const_local_i32(int32_t val)
594 {
595 TCGv_i32 t0;
596 t0 = tcg_temp_local_new_i32();
597 tcg_gen_movi_i32(t0, val);
598 return t0;
599 }
600
601 TCGv_i64 tcg_const_local_i64(int64_t val)
602 {
603 TCGv_i64 t0;
604 t0 = tcg_temp_local_new_i64();
605 tcg_gen_movi_i64(t0, val);
606 return t0;
607 }
608
609 #if defined(CONFIG_DEBUG_TCG)
610 void tcg_clear_temp_count(void)
611 {
612 TCGContext *s = &tcg_ctx;
613 s->temps_in_use = 0;
614 }
615
616 int tcg_check_temp_count(void)
617 {
618 TCGContext *s = &tcg_ctx;
619 if (s->temps_in_use) {
620 /* Clear the count so that we don't give another
621 * warning immediately next time around.
622 */
623 s->temps_in_use = 0;
624 return 1;
625 }
626 return 0;
627 }
628 #endif
629
630 void tcg_register_helper(void *func, const char *name)
631 {
632 TCGContext *s = &tcg_ctx;
633 int n;
634 if ((s->nb_helpers + 1) > s->allocated_helpers) {
635 n = s->allocated_helpers;
636 if (n == 0) {
637 n = 4;
638 } else {
639 n *= 2;
640 }
641 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
642 s->allocated_helpers = n;
643 }
644 s->helpers[s->nb_helpers].func = (tcg_target_ulong)func;
645 s->helpers[s->nb_helpers].name = name;
646 s->nb_helpers++;
647 }
648
649 /* Note: we convert the 64 bit args to 32 bit and do some alignment
650 and endian swap. Maybe it would be better to do the alignment
651 and endian swap in tcg_reg_alloc_call(). */
652 void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
653 int sizemask, TCGArg ret, int nargs, TCGArg *args)
654 {
655 int i;
656 int real_args;
657 int nb_rets;
658 TCGArg *nparam;
659
660 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
661 for (i = 0; i < nargs; ++i) {
662 int is_64bit = sizemask & (1 << (i+1)*2);
663 int is_signed = sizemask & (2 << (i+1)*2);
664 if (!is_64bit) {
665 TCGv_i64 temp = tcg_temp_new_i64();
666 TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
667 if (is_signed) {
668 tcg_gen_ext32s_i64(temp, orig);
669 } else {
670 tcg_gen_ext32u_i64(temp, orig);
671 }
672 args[i] = GET_TCGV_I64(temp);
673 }
674 }
675 #endif /* TCG_TARGET_EXTEND_ARGS */
676
677 *s->gen_opc_ptr++ = INDEX_op_call;
678 nparam = s->gen_opparam_ptr++;
679 if (ret != TCG_CALL_DUMMY_ARG) {
680 #if TCG_TARGET_REG_BITS < 64
681 if (sizemask & 1) {
682 #ifdef TCG_TARGET_WORDS_BIGENDIAN
683 *s->gen_opparam_ptr++ = ret + 1;
684 *s->gen_opparam_ptr++ = ret;
685 #else
686 *s->gen_opparam_ptr++ = ret;
687 *s->gen_opparam_ptr++ = ret + 1;
688 #endif
689 nb_rets = 2;
690 } else
691 #endif
692 {
693 *s->gen_opparam_ptr++ = ret;
694 nb_rets = 1;
695 }
696 } else {
697 nb_rets = 0;
698 }
699 real_args = 0;
700 for (i = 0; i < nargs; i++) {
701 #if TCG_TARGET_REG_BITS < 64
702 int is_64bit = sizemask & (1 << (i+1)*2);
703 if (is_64bit) {
704 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
705 /* some targets want aligned 64 bit args */
706 if (real_args & 1) {
707 *s->gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
708 real_args++;
709 }
710 #endif
711 /* If stack grows up, then we will be placing successive
712 arguments at lower addresses, which means we need to
713 reverse the order compared to how we would normally
714 treat either big or little-endian. For those arguments
715 that will wind up in registers, this still works for
716 HPPA (the only current STACK_GROWSUP target) since the
717 argument registers are *also* allocated in decreasing
718 order. If another such target is added, this logic may
719 have to get more complicated to differentiate between
720 stack arguments and register arguments. */
721 #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
722 *s->gen_opparam_ptr++ = args[i] + 1;
723 *s->gen_opparam_ptr++ = args[i];
724 #else
725 *s->gen_opparam_ptr++ = args[i];
726 *s->gen_opparam_ptr++ = args[i] + 1;
727 #endif
728 real_args += 2;
729 continue;
730 }
731 #endif /* TCG_TARGET_REG_BITS < 64 */
732
733 *s->gen_opparam_ptr++ = args[i];
734 real_args++;
735 }
736 *s->gen_opparam_ptr++ = GET_TCGV_PTR(func);
737
738 *s->gen_opparam_ptr++ = flags;
739
740 *nparam = (nb_rets << 16) | (real_args + 1);
741
742 /* total parameters, needed to go backward in the instruction stream */
743 *s->gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
744
745 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
746 for (i = 0; i < nargs; ++i) {
747 int is_64bit = sizemask & (1 << (i+1)*2);
748 if (!is_64bit) {
749 TCGv_i64 temp = MAKE_TCGV_I64(args[i]);
750 tcg_temp_free_i64(temp);
751 }
752 }
753 #endif /* TCG_TARGET_EXTEND_ARGS */
754 }
755
756 #if TCG_TARGET_REG_BITS == 32
757 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
758 int c, int right, int arith)
759 {
760 if (c == 0) {
761 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
762 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
763 } else if (c >= 32) {
764 c -= 32;
765 if (right) {
766 if (arith) {
767 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
768 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
769 } else {
770 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
771 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
772 }
773 } else {
774 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
775 tcg_gen_movi_i32(TCGV_LOW(ret), 0);
776 }
777 } else {
778 TCGv_i32 t0, t1;
779
780 t0 = tcg_temp_new_i32();
781 t1 = tcg_temp_new_i32();
782 if (right) {
783 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
784 if (arith)
785 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
786 else
787 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
788 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
789 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
790 tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
791 } else {
792 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
793 /* Note: ret can be the same as arg1, so we use t1 */
794 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
795 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
796 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
797 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
798 }
799 tcg_temp_free_i32(t0);
800 tcg_temp_free_i32(t1);
801 }
802 }
803 #endif
804
805
806 static void tcg_reg_alloc_start(TCGContext *s)
807 {
808 int i;
809 TCGTemp *ts;
810 for(i = 0; i < s->nb_globals; i++) {
811 ts = &s->temps[i];
812 if (ts->fixed_reg) {
813 ts->val_type = TEMP_VAL_REG;
814 } else {
815 ts->val_type = TEMP_VAL_MEM;
816 }
817 }
818 for(i = s->nb_globals; i < s->nb_temps; i++) {
819 ts = &s->temps[i];
820 if (ts->temp_local) {
821 ts->val_type = TEMP_VAL_MEM;
822 } else {
823 ts->val_type = TEMP_VAL_DEAD;
824 }
825 ts->mem_allocated = 0;
826 ts->fixed_reg = 0;
827 }
828 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
829 s->reg_to_temp[i] = -1;
830 }
831 }
832
833 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
834 int idx)
835 {
836 TCGTemp *ts;
837
838 assert(idx >= 0 && idx < s->nb_temps);
839 ts = &s->temps[idx];
840 if (idx < s->nb_globals) {
841 pstrcpy(buf, buf_size, ts->name);
842 } else {
843 if (ts->temp_local)
844 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
845 else
846 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
847 }
848 return buf;
849 }
850
851 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
852 {
853 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
854 }
855
856 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
857 {
858 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
859 }
860
861 static int helper_cmp(const void *p1, const void *p2)
862 {
863 const TCGHelperInfo *th1 = p1;
864 const TCGHelperInfo *th2 = p2;
865 if (th1->func < th2->func)
866 return -1;
867 else if (th1->func == th2->func)
868 return 0;
869 else
870 return 1;
871 }
872
873 /* find helper definition (Note: A hash table would be better) */
874 static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val)
875 {
876 int m, m_min, m_max;
877 TCGHelperInfo *th;
878 tcg_target_ulong v;
879
880 if (unlikely(!s->helpers_sorted)) {
881 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
882 helper_cmp);
883 s->helpers_sorted = 1;
884 }
885
886 /* binary search */
887 m_min = 0;
888 m_max = s->nb_helpers - 1;
889 while (m_min <= m_max) {
890 m = (m_min + m_max) >> 1;
891 th = &s->helpers[m];
892 v = th->func;
893 if (v == val)
894 return th;
895 else if (val < v) {
896 m_max = m - 1;
897 } else {
898 m_min = m + 1;
899 }
900 }
901 return NULL;
902 }
903
904 static const char * const cond_name[] =
905 {
906 [TCG_COND_NEVER] = "never",
907 [TCG_COND_ALWAYS] = "always",
908 [TCG_COND_EQ] = "eq",
909 [TCG_COND_NE] = "ne",
910 [TCG_COND_LT] = "lt",
911 [TCG_COND_GE] = "ge",
912 [TCG_COND_LE] = "le",
913 [TCG_COND_GT] = "gt",
914 [TCG_COND_LTU] = "ltu",
915 [TCG_COND_GEU] = "geu",
916 [TCG_COND_LEU] = "leu",
917 [TCG_COND_GTU] = "gtu"
918 };
919
920 void tcg_dump_ops(TCGContext *s)
921 {
922 const uint16_t *opc_ptr;
923 const TCGArg *args;
924 TCGArg arg;
925 TCGOpcode c;
926 int i, k, nb_oargs, nb_iargs, nb_cargs, first_insn;
927 const TCGOpDef *def;
928 char buf[128];
929
930 first_insn = 1;
931 opc_ptr = s->gen_opc_buf;
932 args = s->gen_opparam_buf;
933 while (opc_ptr < s->gen_opc_ptr) {
934 c = *opc_ptr++;
935 def = &tcg_op_defs[c];
936 if (c == INDEX_op_debug_insn_start) {
937 uint64_t pc;
938 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
939 pc = ((uint64_t)args[1] << 32) | args[0];
940 #else
941 pc = args[0];
942 #endif
943 if (!first_insn) {
944 qemu_log("\n");
945 }
946 qemu_log(" ---- 0x%" PRIx64, pc);
947 first_insn = 0;
948 nb_oargs = def->nb_oargs;
949 nb_iargs = def->nb_iargs;
950 nb_cargs = def->nb_cargs;
951 } else if (c == INDEX_op_call) {
952 TCGArg arg;
953
954 /* variable number of arguments */
955 arg = *args++;
956 nb_oargs = arg >> 16;
957 nb_iargs = arg & 0xffff;
958 nb_cargs = def->nb_cargs;
959
960 qemu_log(" %s ", def->name);
961
962 /* function name */
963 qemu_log("%s",
964 tcg_get_arg_str_idx(s, buf, sizeof(buf),
965 args[nb_oargs + nb_iargs - 1]));
966 /* flags */
967 qemu_log(",$0x%" TCG_PRIlx, args[nb_oargs + nb_iargs]);
968 /* nb out args */
969 qemu_log(",$%d", nb_oargs);
970 for(i = 0; i < nb_oargs; i++) {
971 qemu_log(",");
972 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
973 args[i]));
974 }
975 for(i = 0; i < (nb_iargs - 1); i++) {
976 qemu_log(",");
977 if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) {
978 qemu_log("<dummy>");
979 } else {
980 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
981 args[nb_oargs + i]));
982 }
983 }
984 } else if (c == INDEX_op_movi_i32 || c == INDEX_op_movi_i64) {
985 tcg_target_ulong val;
986 TCGHelperInfo *th;
987
988 nb_oargs = def->nb_oargs;
989 nb_iargs = def->nb_iargs;
990 nb_cargs = def->nb_cargs;
991 qemu_log(" %s %s,$", def->name,
992 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0]));
993 val = args[1];
994 th = tcg_find_helper(s, val);
995 if (th) {
996 qemu_log("%s", th->name);
997 } else {
998 if (c == INDEX_op_movi_i32) {
999 qemu_log("0x%x", (uint32_t)val);
1000 } else {
1001 qemu_log("0x%" PRIx64 , (uint64_t)val);
1002 }
1003 }
1004 } else {
1005 qemu_log(" %s ", def->name);
1006 if (c == INDEX_op_nopn) {
1007 /* variable number of arguments */
1008 nb_cargs = *args;
1009 nb_oargs = 0;
1010 nb_iargs = 0;
1011 } else {
1012 nb_oargs = def->nb_oargs;
1013 nb_iargs = def->nb_iargs;
1014 nb_cargs = def->nb_cargs;
1015 }
1016
1017 k = 0;
1018 for(i = 0; i < nb_oargs; i++) {
1019 if (k != 0) {
1020 qemu_log(",");
1021 }
1022 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
1023 args[k++]));
1024 }
1025 for(i = 0; i < nb_iargs; i++) {
1026 if (k != 0) {
1027 qemu_log(",");
1028 }
1029 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
1030 args[k++]));
1031 }
1032 switch (c) {
1033 case INDEX_op_brcond_i32:
1034 case INDEX_op_setcond_i32:
1035 case INDEX_op_movcond_i32:
1036 case INDEX_op_brcond2_i32:
1037 case INDEX_op_setcond2_i32:
1038 case INDEX_op_brcond_i64:
1039 case INDEX_op_setcond_i64:
1040 case INDEX_op_movcond_i64:
1041 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) {
1042 qemu_log(",%s", cond_name[args[k++]]);
1043 } else {
1044 qemu_log(",$0x%" TCG_PRIlx, args[k++]);
1045 }
1046 i = 1;
1047 break;
1048 default:
1049 i = 0;
1050 break;
1051 }
1052 for(; i < nb_cargs; i++) {
1053 if (k != 0) {
1054 qemu_log(",");
1055 }
1056 arg = args[k++];
1057 qemu_log("$0x%" TCG_PRIlx, arg);
1058 }
1059 }
1060 qemu_log("\n");
1061 args += nb_iargs + nb_oargs + nb_cargs;
1062 }
1063 }
1064
1065 /* we give more priority to constraints with less registers */
1066 static int get_constraint_priority(const TCGOpDef *def, int k)
1067 {
1068 const TCGArgConstraint *arg_ct;
1069
1070 int i, n;
1071 arg_ct = &def->args_ct[k];
1072 if (arg_ct->ct & TCG_CT_ALIAS) {
1073 /* an alias is equivalent to a single register */
1074 n = 1;
1075 } else {
1076 if (!(arg_ct->ct & TCG_CT_REG))
1077 return 0;
1078 n = 0;
1079 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1080 if (tcg_regset_test_reg(arg_ct->u.regs, i))
1081 n++;
1082 }
1083 }
1084 return TCG_TARGET_NB_REGS - n + 1;
1085 }
1086
1087 /* sort from highest priority to lowest */
1088 static void sort_constraints(TCGOpDef *def, int start, int n)
1089 {
1090 int i, j, p1, p2, tmp;
1091
1092 for(i = 0; i < n; i++)
1093 def->sorted_args[start + i] = start + i;
1094 if (n <= 1)
1095 return;
1096 for(i = 0; i < n - 1; i++) {
1097 for(j = i + 1; j < n; j++) {
1098 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
1099 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
1100 if (p1 < p2) {
1101 tmp = def->sorted_args[start + i];
1102 def->sorted_args[start + i] = def->sorted_args[start + j];
1103 def->sorted_args[start + j] = tmp;
1104 }
1105 }
1106 }
1107 }
1108
1109 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
1110 {
1111 TCGOpcode op;
1112 TCGOpDef *def;
1113 const char *ct_str;
1114 int i, nb_args;
1115
1116 for(;;) {
1117 if (tdefs->op == (TCGOpcode)-1)
1118 break;
1119 op = tdefs->op;
1120 assert((unsigned)op < NB_OPS);
1121 def = &tcg_op_defs[op];
1122 #if defined(CONFIG_DEBUG_TCG)
1123 /* Duplicate entry in op definitions? */
1124 assert(!def->used);
1125 def->used = 1;
1126 #endif
1127 nb_args = def->nb_iargs + def->nb_oargs;
1128 for(i = 0; i < nb_args; i++) {
1129 ct_str = tdefs->args_ct_str[i];
1130 /* Incomplete TCGTargetOpDef entry? */
1131 assert(ct_str != NULL);
1132 tcg_regset_clear(def->args_ct[i].u.regs);
1133 def->args_ct[i].ct = 0;
1134 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
1135 int oarg;
1136 oarg = ct_str[0] - '0';
1137 assert(oarg < def->nb_oargs);
1138 assert(def->args_ct[oarg].ct & TCG_CT_REG);
1139 /* TCG_CT_ALIAS is for the output arguments. The input
1140 argument is tagged with TCG_CT_IALIAS. */
1141 def->args_ct[i] = def->args_ct[oarg];
1142 def->args_ct[oarg].ct = TCG_CT_ALIAS;
1143 def->args_ct[oarg].alias_index = i;
1144 def->args_ct[i].ct |= TCG_CT_IALIAS;
1145 def->args_ct[i].alias_index = oarg;
1146 } else {
1147 for(;;) {
1148 if (*ct_str == '\0')
1149 break;
1150 switch(*ct_str) {
1151 case 'i':
1152 def->args_ct[i].ct |= TCG_CT_CONST;
1153 ct_str++;
1154 break;
1155 default:
1156 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
1157 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1158 ct_str, i, def->name);
1159 exit(1);
1160 }
1161 }
1162 }
1163 }
1164 }
1165
1166 /* TCGTargetOpDef entry with too much information? */
1167 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL);
1168
1169 /* sort the constraints (XXX: this is just an heuristic) */
1170 sort_constraints(def, 0, def->nb_oargs);
1171 sort_constraints(def, def->nb_oargs, def->nb_iargs);
1172
1173 #if 0
1174 {
1175 int i;
1176
1177 printf("%s: sorted=", def->name);
1178 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
1179 printf(" %d", def->sorted_args[i]);
1180 printf("\n");
1181 }
1182 #endif
1183 tdefs++;
1184 }
1185
1186 #if defined(CONFIG_DEBUG_TCG)
1187 i = 0;
1188 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) {
1189 const TCGOpDef *def = &tcg_op_defs[op];
1190 if (def->flags & TCG_OPF_NOT_PRESENT) {
1191 /* Wrong entry in op definitions? */
1192 if (def->used) {
1193 fprintf(stderr, "Invalid op definition for %s\n", def->name);
1194 i = 1;
1195 }
1196 } else {
1197 /* Missing entry in op definitions? */
1198 if (!def->used) {
1199 fprintf(stderr, "Missing op definition for %s\n", def->name);
1200 i = 1;
1201 }
1202 }
1203 }
1204 if (i == 1) {
1205 tcg_abort();
1206 }
1207 #endif
1208 }
1209
1210 #ifdef USE_LIVENESS_ANALYSIS
1211
1212 /* set a nop for an operation using 'nb_args' */
1213 static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr,
1214 TCGArg *args, int nb_args)
1215 {
1216 if (nb_args == 0) {
1217 *opc_ptr = INDEX_op_nop;
1218 } else {
1219 *opc_ptr = INDEX_op_nopn;
1220 args[0] = nb_args;
1221 args[nb_args - 1] = nb_args;
1222 }
1223 }
1224
1225 /* liveness analysis: end of function: all temps are dead, and globals
1226 should be in memory. */
1227 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps,
1228 uint8_t *mem_temps)
1229 {
1230 memset(dead_temps, 1, s->nb_temps);
1231 memset(mem_temps, 1, s->nb_globals);
1232 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals);
1233 }
1234
1235 /* liveness analysis: end of basic block: all temps are dead, globals
1236 and local temps should be in memory. */
1237 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps,
1238 uint8_t *mem_temps)
1239 {
1240 int i;
1241
1242 memset(dead_temps, 1, s->nb_temps);
1243 memset(mem_temps, 1, s->nb_globals);
1244 for(i = s->nb_globals; i < s->nb_temps; i++) {
1245 mem_temps[i] = s->temps[i].temp_local;
1246 }
1247 }
1248
1249 /* Liveness analysis : update the opc_dead_args array to tell if a
1250 given input arguments is dead. Instructions updating dead
1251 temporaries are removed. */
1252 static void tcg_liveness_analysis(TCGContext *s)
1253 {
1254 int i, op_index, nb_args, nb_iargs, nb_oargs, arg, nb_ops;
1255 TCGOpcode op, op_new, op_new2;
1256 TCGArg *args;
1257 const TCGOpDef *def;
1258 uint8_t *dead_temps, *mem_temps;
1259 uint16_t dead_args;
1260 uint8_t sync_args;
1261 bool have_op_new2;
1262
1263 s->gen_opc_ptr++; /* skip end */
1264
1265 nb_ops = s->gen_opc_ptr - s->gen_opc_buf;
1266
1267 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
1268 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
1269
1270 dead_temps = tcg_malloc(s->nb_temps);
1271 mem_temps = tcg_malloc(s->nb_temps);
1272 tcg_la_func_end(s, dead_temps, mem_temps);
1273
1274 args = s->gen_opparam_ptr;
1275 op_index = nb_ops - 1;
1276 while (op_index >= 0) {
1277 op = s->gen_opc_buf[op_index];
1278 def = &tcg_op_defs[op];
1279 switch(op) {
1280 case INDEX_op_call:
1281 {
1282 int call_flags;
1283
1284 nb_args = args[-1];
1285 args -= nb_args;
1286 nb_iargs = args[0] & 0xffff;
1287 nb_oargs = args[0] >> 16;
1288 args++;
1289 call_flags = args[nb_oargs + nb_iargs];
1290
1291 /* pure functions can be removed if their result is not
1292 used */
1293 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) {
1294 for(i = 0; i < nb_oargs; i++) {
1295 arg = args[i];
1296 if (!dead_temps[arg] || mem_temps[arg]) {
1297 goto do_not_remove_call;
1298 }
1299 }
1300 tcg_set_nop(s, s->gen_opc_buf + op_index,
1301 args - 1, nb_args);
1302 } else {
1303 do_not_remove_call:
1304
1305 /* output args are dead */
1306 dead_args = 0;
1307 sync_args = 0;
1308 for(i = 0; i < nb_oargs; i++) {
1309 arg = args[i];
1310 if (dead_temps[arg]) {
1311 dead_args |= (1 << i);
1312 }
1313 if (mem_temps[arg]) {
1314 sync_args |= (1 << i);
1315 }
1316 dead_temps[arg] = 1;
1317 mem_temps[arg] = 0;
1318 }
1319
1320 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) {
1321 /* globals should be synced to memory */
1322 memset(mem_temps, 1, s->nb_globals);
1323 }
1324 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS |
1325 TCG_CALL_NO_READ_GLOBALS))) {
1326 /* globals should go back to memory */
1327 memset(dead_temps, 1, s->nb_globals);
1328 }
1329
1330 /* input args are live */
1331 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
1332 arg = args[i];
1333 if (arg != TCG_CALL_DUMMY_ARG) {
1334 if (dead_temps[arg]) {
1335 dead_args |= (1 << i);
1336 }
1337 dead_temps[arg] = 0;
1338 }
1339 }
1340 s->op_dead_args[op_index] = dead_args;
1341 s->op_sync_args[op_index] = sync_args;
1342 }
1343 args--;
1344 }
1345 break;
1346 case INDEX_op_debug_insn_start:
1347 args -= def->nb_args;
1348 break;
1349 case INDEX_op_nopn:
1350 nb_args = args[-1];
1351 args -= nb_args;
1352 break;
1353 case INDEX_op_discard:
1354 args--;
1355 /* mark the temporary as dead */
1356 dead_temps[args[0]] = 1;
1357 mem_temps[args[0]] = 0;
1358 break;
1359 case INDEX_op_end:
1360 break;
1361
1362 case INDEX_op_add2_i32:
1363 op_new = INDEX_op_add_i32;
1364 goto do_addsub2;
1365 case INDEX_op_sub2_i32:
1366 op_new = INDEX_op_sub_i32;
1367 goto do_addsub2;
1368 case INDEX_op_add2_i64:
1369 op_new = INDEX_op_add_i64;
1370 goto do_addsub2;
1371 case INDEX_op_sub2_i64:
1372 op_new = INDEX_op_sub_i64;
1373 do_addsub2:
1374 args -= 6;
1375 nb_iargs = 4;
1376 nb_oargs = 2;
1377 /* Test if the high part of the operation is dead, but not
1378 the low part. The result can be optimized to a simple
1379 add or sub. This happens often for x86_64 guest when the
1380 cpu mode is set to 32 bit. */
1381 if (dead_temps[args[1]] && !mem_temps[args[1]]) {
1382 if (dead_temps[args[0]] && !mem_temps[args[0]]) {
1383 goto do_remove;
1384 }
1385 /* Create the single operation plus nop. */
1386 s->gen_opc_buf[op_index] = op = op_new;
1387 args[1] = args[2];
1388 args[2] = args[4];
1389 assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop);
1390 tcg_set_nop(s, s->gen_opc_buf + op_index + 1, args + 3, 3);
1391 /* Fall through and mark the single-word operation live. */
1392 nb_iargs = 2;
1393 nb_oargs = 1;
1394 }
1395 goto do_not_remove;
1396
1397 case INDEX_op_mulu2_i32:
1398 op_new = INDEX_op_mul_i32;
1399 op_new2 = INDEX_op_muluh_i32;
1400 have_op_new2 = TCG_TARGET_HAS_muluh_i32;
1401 goto do_mul2;
1402 case INDEX_op_muls2_i32:
1403 op_new = INDEX_op_mul_i32;
1404 op_new2 = INDEX_op_mulsh_i32;
1405 have_op_new2 = TCG_TARGET_HAS_mulsh_i32;
1406 goto do_mul2;
1407 case INDEX_op_mulu2_i64:
1408 op_new = INDEX_op_mul_i64;
1409 op_new2 = INDEX_op_muluh_i64;
1410 have_op_new2 = TCG_TARGET_HAS_muluh_i64;
1411 goto do_mul2;
1412 case INDEX_op_muls2_i64:
1413 op_new = INDEX_op_mul_i64;
1414 op_new2 = INDEX_op_mulsh_i64;
1415 have_op_new2 = TCG_TARGET_HAS_mulsh_i64;
1416 goto do_mul2;
1417 do_mul2:
1418 args -= 4;
1419 nb_iargs = 2;
1420 nb_oargs = 2;
1421 if (dead_temps[args[1]] && !mem_temps[args[1]]) {
1422 if (dead_temps[args[0]] && !mem_temps[args[0]]) {
1423 /* Both parts of the operation are dead. */
1424 goto do_remove;
1425 }
1426 /* The high part of the operation is dead; generate the low. */
1427 s->gen_opc_buf[op_index] = op = op_new;
1428 args[1] = args[2];
1429 args[2] = args[3];
1430 } else if (have_op_new2 && dead_temps[args[0]]
1431 && !mem_temps[args[0]]) {
1432 /* The low part of the operation is dead; generate the high. */
1433 s->gen_opc_buf[op_index] = op = op_new2;
1434 args[0] = args[1];
1435 args[1] = args[2];
1436 args[2] = args[3];
1437 } else {
1438 goto do_not_remove;
1439 }
1440 assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop);
1441 tcg_set_nop(s, s->gen_opc_buf + op_index + 1, args + 3, 1);
1442 /* Mark the single-word operation live. */
1443 nb_oargs = 1;
1444 goto do_not_remove;
1445
1446 default:
1447 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1448 args -= def->nb_args;
1449 nb_iargs = def->nb_iargs;
1450 nb_oargs = def->nb_oargs;
1451
1452 /* Test if the operation can be removed because all
1453 its outputs are dead. We assume that nb_oargs == 0
1454 implies side effects */
1455 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1456 for(i = 0; i < nb_oargs; i++) {
1457 arg = args[i];
1458 if (!dead_temps[arg] || mem_temps[arg]) {
1459 goto do_not_remove;
1460 }
1461 }
1462 do_remove:
1463 tcg_set_nop(s, s->gen_opc_buf + op_index, args, def->nb_args);
1464 #ifdef CONFIG_PROFILER
1465 s->del_op_count++;
1466 #endif
1467 } else {
1468 do_not_remove:
1469
1470 /* output args are dead */
1471 dead_args = 0;
1472 sync_args = 0;
1473 for(i = 0; i < nb_oargs; i++) {
1474 arg = args[i];
1475 if (dead_temps[arg]) {
1476 dead_args |= (1 << i);
1477 }
1478 if (mem_temps[arg]) {
1479 sync_args |= (1 << i);
1480 }
1481 dead_temps[arg] = 1;
1482 mem_temps[arg] = 0;
1483 }
1484
1485 /* if end of basic block, update */
1486 if (def->flags & TCG_OPF_BB_END) {
1487 tcg_la_bb_end(s, dead_temps, mem_temps);
1488 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) {
1489 /* globals should be synced to memory */
1490 memset(mem_temps, 1, s->nb_globals);
1491 }
1492
1493 /* input args are live */
1494 for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1495 arg = args[i];
1496 if (dead_temps[arg]) {
1497 dead_args |= (1 << i);
1498 }
1499 dead_temps[arg] = 0;
1500 }
1501 s->op_dead_args[op_index] = dead_args;
1502 s->op_sync_args[op_index] = sync_args;
1503 }
1504 break;
1505 }
1506 op_index--;
1507 }
1508
1509 if (args != s->gen_opparam_buf) {
1510 tcg_abort();
1511 }
1512 }
1513 #else
1514 /* dummy liveness analysis */
1515 static void tcg_liveness_analysis(TCGContext *s)
1516 {
1517 int nb_ops;
1518 nb_ops = s->gen_opc_ptr - s->gen_opc_buf;
1519
1520 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
1521 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t));
1522 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
1523 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t));
1524 }
1525 #endif
1526
1527 #ifndef NDEBUG
1528 static void dump_regs(TCGContext *s)
1529 {
1530 TCGTemp *ts;
1531 int i;
1532 char buf[64];
1533
1534 for(i = 0; i < s->nb_temps; i++) {
1535 ts = &s->temps[i];
1536 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
1537 switch(ts->val_type) {
1538 case TEMP_VAL_REG:
1539 printf("%s", tcg_target_reg_names[ts->reg]);
1540 break;
1541 case TEMP_VAL_MEM:
1542 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1543 break;
1544 case TEMP_VAL_CONST:
1545 printf("$0x%" TCG_PRIlx, ts->val);
1546 break;
1547 case TEMP_VAL_DEAD:
1548 printf("D");
1549 break;
1550 default:
1551 printf("???");
1552 break;
1553 }
1554 printf("\n");
1555 }
1556
1557 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1558 if (s->reg_to_temp[i] >= 0) {
1559 printf("%s: %s\n",
1560 tcg_target_reg_names[i],
1561 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
1562 }
1563 }
1564 }
1565
1566 static void check_regs(TCGContext *s)
1567 {
1568 int reg, k;
1569 TCGTemp *ts;
1570 char buf[64];
1571
1572 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1573 k = s->reg_to_temp[reg];
1574 if (k >= 0) {
1575 ts = &s->temps[k];
1576 if (ts->val_type != TEMP_VAL_REG ||
1577 ts->reg != reg) {
1578 printf("Inconsistency for register %s:\n",
1579 tcg_target_reg_names[reg]);
1580 goto fail;
1581 }
1582 }
1583 }
1584 for(k = 0; k < s->nb_temps; k++) {
1585 ts = &s->temps[k];
1586 if (ts->val_type == TEMP_VAL_REG &&
1587 !ts->fixed_reg &&
1588 s->reg_to_temp[ts->reg] != k) {
1589 printf("Inconsistency for temp %s:\n",
1590 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
1591 fail:
1592 printf("reg state:\n");
1593 dump_regs(s);
1594 tcg_abort();
1595 }
1596 }
1597 }
1598 #endif
1599
1600 static void temp_allocate_frame(TCGContext *s, int temp)
1601 {
1602 TCGTemp *ts;
1603 ts = &s->temps[temp];
1604 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1605 /* Sparc64 stack is accessed with offset of 2047 */
1606 s->current_frame_offset = (s->current_frame_offset +
1607 (tcg_target_long)sizeof(tcg_target_long) - 1) &
1608 ~(sizeof(tcg_target_long) - 1);
1609 #endif
1610 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) >
1611 s->frame_end) {
1612 tcg_abort();
1613 }
1614 ts->mem_offset = s->current_frame_offset;
1615 ts->mem_reg = s->frame_reg;
1616 ts->mem_allocated = 1;
1617 s->current_frame_offset += (tcg_target_long)sizeof(tcg_target_long);
1618 }
1619
1620 /* sync register 'reg' by saving it to the corresponding temporary */
1621 static inline void tcg_reg_sync(TCGContext *s, int reg)
1622 {
1623 TCGTemp *ts;
1624 int temp;
1625
1626 temp = s->reg_to_temp[reg];
1627 ts = &s->temps[temp];
1628 assert(ts->val_type == TEMP_VAL_REG);
1629 if (!ts->mem_coherent && !ts->fixed_reg) {
1630 if (!ts->mem_allocated) {
1631 temp_allocate_frame(s, temp);
1632 }
1633 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1634 }
1635 ts->mem_coherent = 1;
1636 }
1637
1638 /* free register 'reg' by spilling the corresponding temporary if necessary */
1639 static void tcg_reg_free(TCGContext *s, int reg)
1640 {
1641 int temp;
1642
1643 temp = s->reg_to_temp[reg];
1644 if (temp != -1) {
1645 tcg_reg_sync(s, reg);
1646 s->temps[temp].val_type = TEMP_VAL_MEM;
1647 s->reg_to_temp[reg] = -1;
1648 }
1649 }
1650
1651 /* Allocate a register belonging to reg1 & ~reg2 */
1652 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1653 {
1654 int i, reg;
1655 TCGRegSet reg_ct;
1656
1657 tcg_regset_andnot(reg_ct, reg1, reg2);
1658
1659 /* first try free registers */
1660 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1661 reg = tcg_target_reg_alloc_order[i];
1662 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1663 return reg;
1664 }
1665
1666 /* XXX: do better spill choice */
1667 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1668 reg = tcg_target_reg_alloc_order[i];
1669 if (tcg_regset_test_reg(reg_ct, reg)) {
1670 tcg_reg_free(s, reg);
1671 return reg;
1672 }
1673 }
1674
1675 tcg_abort();
1676 }
1677
1678 /* mark a temporary as dead. */
1679 static inline void temp_dead(TCGContext *s, int temp)
1680 {
1681 TCGTemp *ts;
1682
1683 ts = &s->temps[temp];
1684 if (!ts->fixed_reg) {
1685 if (ts->val_type == TEMP_VAL_REG) {
1686 s->reg_to_temp[ts->reg] = -1;
1687 }
1688 if (temp < s->nb_globals || ts->temp_local) {
1689 ts->val_type = TEMP_VAL_MEM;
1690 } else {
1691 ts->val_type = TEMP_VAL_DEAD;
1692 }
1693 }
1694 }
1695
1696 /* sync a temporary to memory. 'allocated_regs' is used in case a
1697 temporary registers needs to be allocated to store a constant. */
1698 static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs)
1699 {
1700 TCGTemp *ts;
1701
1702 ts = &s->temps[temp];
1703 if (!ts->fixed_reg) {
1704 switch(ts->val_type) {
1705 case TEMP_VAL_CONST:
1706 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1707 allocated_regs);
1708 ts->val_type = TEMP_VAL_REG;
1709 s->reg_to_temp[ts->reg] = temp;
1710 ts->mem_coherent = 0;
1711 tcg_out_movi(s, ts->type, ts->reg, ts->val);
1712 /* fallthrough*/
1713 case TEMP_VAL_REG:
1714 tcg_reg_sync(s, ts->reg);
1715 break;
1716 case TEMP_VAL_DEAD:
1717 case TEMP_VAL_MEM:
1718 break;
1719 default:
1720 tcg_abort();
1721 }
1722 }
1723 }
1724
1725 /* save a temporary to memory. 'allocated_regs' is used in case a
1726 temporary registers needs to be allocated to store a constant. */
1727 static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs)
1728 {
1729 #ifdef USE_LIVENESS_ANALYSIS
1730 /* The liveness analysis already ensures that globals are back
1731 in memory. Keep an assert for safety. */
1732 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg);
1733 #else
1734 temp_sync(s, temp, allocated_regs);
1735 temp_dead(s, temp);
1736 #endif
1737 }
1738
1739 /* save globals to their canonical location and assume they can be
1740 modified be the following code. 'allocated_regs' is used in case a
1741 temporary registers needs to be allocated to store a constant. */
1742 static void save_globals(TCGContext *s, TCGRegSet allocated_regs)
1743 {
1744 int i;
1745
1746 for(i = 0; i < s->nb_globals; i++) {
1747 temp_save(s, i, allocated_regs);
1748 }
1749 }
1750
1751 /* sync globals to their canonical location and assume they can be
1752 read by the following code. 'allocated_regs' is used in case a
1753 temporary registers needs to be allocated to store a constant. */
1754 static void sync_globals(TCGContext *s, TCGRegSet allocated_regs)
1755 {
1756 int i;
1757
1758 for (i = 0; i < s->nb_globals; i++) {
1759 #ifdef USE_LIVENESS_ANALYSIS
1760 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg ||
1761 s->temps[i].mem_coherent);
1762 #else
1763 temp_sync(s, i, allocated_regs);
1764 #endif
1765 }
1766 }
1767
1768 /* at the end of a basic block, we assume all temporaries are dead and
1769 all globals are stored at their canonical location. */
1770 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
1771 {
1772 TCGTemp *ts;
1773 int i;
1774
1775 for(i = s->nb_globals; i < s->nb_temps; i++) {
1776 ts = &s->temps[i];
1777 if (ts->temp_local) {
1778 temp_save(s, i, allocated_regs);
1779 } else {
1780 #ifdef USE_LIVENESS_ANALYSIS
1781 /* The liveness analysis already ensures that temps are dead.
1782 Keep an assert for safety. */
1783 assert(ts->val_type == TEMP_VAL_DEAD);
1784 #else
1785 temp_dead(s, i);
1786 #endif
1787 }
1788 }
1789
1790 save_globals(s, allocated_regs);
1791 }
1792
1793 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1794 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1795
1796 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args,
1797 uint16_t dead_args, uint8_t sync_args)
1798 {
1799 TCGTemp *ots;
1800 tcg_target_ulong val;
1801
1802 ots = &s->temps[args[0]];
1803 val = args[1];
1804
1805 if (ots->fixed_reg) {
1806 /* for fixed registers, we do not do any constant
1807 propagation */
1808 tcg_out_movi(s, ots->type, ots->reg, val);
1809 } else {
1810 /* The movi is not explicitly generated here */
1811 if (ots->val_type == TEMP_VAL_REG)
1812 s->reg_to_temp[ots->reg] = -1;
1813 ots->val_type = TEMP_VAL_CONST;
1814 ots->val = val;
1815 }
1816 if (NEED_SYNC_ARG(0)) {
1817 temp_sync(s, args[0], s->reserved_regs);
1818 }
1819 if (IS_DEAD_ARG(0)) {
1820 temp_dead(s, args[0]);
1821 }
1822 }
1823
1824 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
1825 const TCGArg *args, uint16_t dead_args,
1826 uint8_t sync_args)
1827 {
1828 TCGRegSet allocated_regs;
1829 TCGTemp *ts, *ots;
1830 const TCGArgConstraint *arg_ct, *oarg_ct;
1831
1832 tcg_regset_set(allocated_regs, s->reserved_regs);
1833 ots = &s->temps[args[0]];
1834 ts = &s->temps[args[1]];
1835 oarg_ct = &def->args_ct[0];
1836 arg_ct = &def->args_ct[1];
1837
1838 /* If the source value is not in a register, and we're going to be
1839 forced to have it in a register in order to perform the copy,
1840 then copy the SOURCE value into its own register first. That way
1841 we don't have to reload SOURCE the next time it is used. */
1842 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG)
1843 || ts->val_type == TEMP_VAL_MEM) {
1844 ts->reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1845 if (ts->val_type == TEMP_VAL_MEM) {
1846 tcg_out_ld(s, ts->type, ts->reg, ts->mem_reg, ts->mem_offset);
1847 ts->mem_coherent = 1;
1848 } else if (ts->val_type == TEMP_VAL_CONST) {
1849 tcg_out_movi(s, ts->type, ts->reg, ts->val);
1850 }
1851 s->reg_to_temp[ts->reg] = args[1];
1852 ts->val_type = TEMP_VAL_REG;
1853 }
1854
1855 if (IS_DEAD_ARG(0) && !ots->fixed_reg) {
1856 /* mov to a non-saved dead register makes no sense (even with
1857 liveness analysis disabled). */
1858 assert(NEED_SYNC_ARG(0));
1859 /* The code above should have moved the temp to a register. */
1860 assert(ts->val_type == TEMP_VAL_REG);
1861 if (!ots->mem_allocated) {
1862 temp_allocate_frame(s, args[0]);
1863 }
1864 tcg_out_st(s, ots->type, ts->reg, ots->mem_reg, ots->mem_offset);
1865 if (IS_DEAD_ARG(1)) {
1866 temp_dead(s, args[1]);
1867 }
1868 temp_dead(s, args[0]);
1869 } else if (ts->val_type == TEMP_VAL_CONST) {
1870 /* propagate constant */
1871 if (ots->val_type == TEMP_VAL_REG) {
1872 s->reg_to_temp[ots->reg] = -1;
1873 }
1874 ots->val_type = TEMP_VAL_CONST;
1875 ots->val = ts->val;
1876 } else {
1877 /* The code in the first if block should have moved the
1878 temp to a register. */
1879 assert(ts->val_type == TEMP_VAL_REG);
1880 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) {
1881 /* the mov can be suppressed */
1882 if (ots->val_type == TEMP_VAL_REG) {
1883 s->reg_to_temp[ots->reg] = -1;
1884 }
1885 ots->reg = ts->reg;
1886 temp_dead(s, args[1]);
1887 } else {
1888 if (ots->val_type != TEMP_VAL_REG) {
1889 /* When allocating a new register, make sure to not spill the
1890 input one. */
1891 tcg_regset_set_reg(allocated_regs, ts->reg);
1892 ots->reg = tcg_reg_alloc(s, oarg_ct->u.regs, allocated_regs);
1893 }
1894 tcg_out_mov(s, ots->type, ots->reg, ts->reg);
1895 }
1896 ots->val_type = TEMP_VAL_REG;
1897 ots->mem_coherent = 0;
1898 s->reg_to_temp[ots->reg] = args[0];
1899 if (NEED_SYNC_ARG(0)) {
1900 tcg_reg_sync(s, ots->reg);
1901 }
1902 }
1903 }
1904
1905 static void tcg_reg_alloc_op(TCGContext *s,
1906 const TCGOpDef *def, TCGOpcode opc,
1907 const TCGArg *args, uint16_t dead_args,
1908 uint8_t sync_args)
1909 {
1910 TCGRegSet allocated_regs;
1911 int i, k, nb_iargs, nb_oargs, reg;
1912 TCGArg arg;
1913 const TCGArgConstraint *arg_ct;
1914 TCGTemp *ts;
1915 TCGArg new_args[TCG_MAX_OP_ARGS];
1916 int const_args[TCG_MAX_OP_ARGS];
1917
1918 nb_oargs = def->nb_oargs;
1919 nb_iargs = def->nb_iargs;
1920
1921 /* copy constants */
1922 memcpy(new_args + nb_oargs + nb_iargs,
1923 args + nb_oargs + nb_iargs,
1924 sizeof(TCGArg) * def->nb_cargs);
1925
1926 /* satisfy input constraints */
1927 tcg_regset_set(allocated_regs, s->reserved_regs);
1928 for(k = 0; k < nb_iargs; k++) {
1929 i = def->sorted_args[nb_oargs + k];
1930 arg = args[i];
1931 arg_ct = &def->args_ct[i];
1932 ts = &s->temps[arg];
1933 if (ts->val_type == TEMP_VAL_MEM) {
1934 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1935 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1936 ts->val_type = TEMP_VAL_REG;
1937 ts->reg = reg;
1938 ts->mem_coherent = 1;
1939 s->reg_to_temp[reg] = arg;
1940 } else if (ts->val_type == TEMP_VAL_CONST) {
1941 if (tcg_target_const_match(ts->val, arg_ct)) {
1942 /* constant is OK for instruction */
1943 const_args[i] = 1;
1944 new_args[i] = ts->val;
1945 goto iarg_end;
1946 } else {
1947 /* need to move to a register */
1948 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1949 tcg_out_movi(s, ts->type, reg, ts->val);
1950 ts->val_type = TEMP_VAL_REG;
1951 ts->reg = reg;
1952 ts->mem_coherent = 0;
1953 s->reg_to_temp[reg] = arg;
1954 }
1955 }
1956 assert(ts->val_type == TEMP_VAL_REG);
1957 if (arg_ct->ct & TCG_CT_IALIAS) {
1958 if (ts->fixed_reg) {
1959 /* if fixed register, we must allocate a new register
1960 if the alias is not the same register */
1961 if (arg != args[arg_ct->alias_index])
1962 goto allocate_in_reg;
1963 } else {
1964 /* if the input is aliased to an output and if it is
1965 not dead after the instruction, we must allocate
1966 a new register and move it */
1967 if (!IS_DEAD_ARG(i)) {
1968 goto allocate_in_reg;
1969 }
1970 }
1971 }
1972 reg = ts->reg;
1973 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1974 /* nothing to do : the constraint is satisfied */
1975 } else {
1976 allocate_in_reg:
1977 /* allocate a new register matching the constraint
1978 and move the temporary register into it */
1979 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1980 tcg_out_mov(s, ts->type, reg, ts->reg);
1981 }
1982 new_args[i] = reg;
1983 const_args[i] = 0;
1984 tcg_regset_set_reg(allocated_regs, reg);
1985 iarg_end: ;
1986 }
1987
1988 /* mark dead temporaries and free the associated registers */
1989 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1990 if (IS_DEAD_ARG(i)) {
1991 temp_dead(s, args[i]);
1992 }
1993 }
1994
1995 if (def->flags & TCG_OPF_BB_END) {
1996 tcg_reg_alloc_bb_end(s, allocated_regs);
1997 } else {
1998 if (def->flags & TCG_OPF_CALL_CLOBBER) {
1999 /* XXX: permit generic clobber register list ? */
2000 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
2001 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
2002 tcg_reg_free(s, reg);
2003 }
2004 }
2005 }
2006 if (def->flags & TCG_OPF_SIDE_EFFECTS) {
2007 /* sync globals if the op has side effects and might trigger
2008 an exception. */
2009 sync_globals(s, allocated_regs);
2010 }
2011
2012 /* satisfy the output constraints */
2013 tcg_regset_set(allocated_regs, s->reserved_regs);
2014 for(k = 0; k < nb_oargs; k++) {
2015 i = def->sorted_args[k];
2016 arg = args[i];
2017 arg_ct = &def->args_ct[i];
2018 ts = &s->temps[arg];
2019 if (arg_ct->ct & TCG_CT_ALIAS) {
2020 reg = new_args[arg_ct->alias_index];
2021 } else {
2022 /* if fixed register, we try to use it */
2023 reg = ts->reg;
2024 if (ts->fixed_reg &&
2025 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
2026 goto oarg_end;
2027 }
2028 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
2029 }
2030 tcg_regset_set_reg(allocated_regs, reg);
2031 /* if a fixed register is used, then a move will be done afterwards */
2032 if (!ts->fixed_reg) {
2033 if (ts->val_type == TEMP_VAL_REG) {
2034 s->reg_to_temp[ts->reg] = -1;
2035 }
2036 ts->val_type = TEMP_VAL_REG;
2037 ts->reg = reg;
2038 /* temp value is modified, so the value kept in memory is
2039 potentially not the same */
2040 ts->mem_coherent = 0;
2041 s->reg_to_temp[reg] = arg;
2042 }
2043 oarg_end:
2044 new_args[i] = reg;
2045 }
2046 }
2047
2048 /* emit instruction */
2049 tcg_out_op(s, opc, new_args, const_args);
2050
2051 /* move the outputs in the correct register if needed */
2052 for(i = 0; i < nb_oargs; i++) {
2053 ts = &s->temps[args[i]];
2054 reg = new_args[i];
2055 if (ts->fixed_reg && ts->reg != reg) {
2056 tcg_out_mov(s, ts->type, ts->reg, reg);
2057 }
2058 if (NEED_SYNC_ARG(i)) {
2059 tcg_reg_sync(s, reg);
2060 }
2061 if (IS_DEAD_ARG(i)) {
2062 temp_dead(s, args[i]);
2063 }
2064 }
2065 }
2066
2067 #ifdef TCG_TARGET_STACK_GROWSUP
2068 #define STACK_DIR(x) (-(x))
2069 #else
2070 #define STACK_DIR(x) (x)
2071 #endif
2072
2073 static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
2074 TCGOpcode opc, const TCGArg *args,
2075 uint16_t dead_args, uint8_t sync_args)
2076 {
2077 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params;
2078 TCGArg arg, func_arg;
2079 TCGTemp *ts;
2080 tcg_target_long stack_offset, call_stack_size, func_addr;
2081 int const_func_arg, allocate_args;
2082 TCGRegSet allocated_regs;
2083 const TCGArgConstraint *arg_ct;
2084
2085 arg = *args++;
2086
2087 nb_oargs = arg >> 16;
2088 nb_iargs = arg & 0xffff;
2089 nb_params = nb_iargs - 1;
2090
2091 flags = args[nb_oargs + nb_iargs];
2092
2093 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs);
2094 if (nb_regs > nb_params)
2095 nb_regs = nb_params;
2096
2097 /* assign stack slots first */
2098 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long);
2099 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
2100 ~(TCG_TARGET_STACK_ALIGN - 1);
2101 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
2102 if (allocate_args) {
2103 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2104 preallocate call stack */
2105 tcg_abort();
2106 }
2107
2108 stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
2109 for(i = nb_regs; i < nb_params; i++) {
2110 arg = args[nb_oargs + i];
2111 #ifdef TCG_TARGET_STACK_GROWSUP
2112 stack_offset -= sizeof(tcg_target_long);
2113 #endif
2114 if (arg != TCG_CALL_DUMMY_ARG) {
2115 ts = &s->temps[arg];
2116 if (ts->val_type == TEMP_VAL_REG) {
2117 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
2118 } else if (ts->val_type == TEMP_VAL_MEM) {
2119 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
2120 s->reserved_regs);
2121 /* XXX: not correct if reading values from the stack */
2122 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2123 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
2124 } else if (ts->val_type == TEMP_VAL_CONST) {
2125 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
2126 s->reserved_regs);
2127 /* XXX: sign extend may be needed on some targets */
2128 tcg_out_movi(s, ts->type, reg, ts->val);
2129 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
2130 } else {
2131 tcg_abort();
2132 }
2133 }
2134 #ifndef TCG_TARGET_STACK_GROWSUP
2135 stack_offset += sizeof(tcg_target_long);
2136 #endif
2137 }
2138
2139 /* assign input registers */
2140 tcg_regset_set(allocated_regs, s->reserved_regs);
2141 for(i = 0; i < nb_regs; i++) {
2142 arg = args[nb_oargs + i];
2143 if (arg != TCG_CALL_DUMMY_ARG) {
2144 ts = &s->temps[arg];
2145 reg = tcg_target_call_iarg_regs[i];
2146 tcg_reg_free(s, reg);
2147 if (ts->val_type == TEMP_VAL_REG) {
2148 if (ts->reg != reg) {
2149 tcg_out_mov(s, ts->type, reg, ts->reg);
2150 }
2151 } else if (ts->val_type == TEMP_VAL_MEM) {
2152 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2153 } else if (ts->val_type == TEMP_VAL_CONST) {
2154 /* XXX: sign extend ? */
2155 tcg_out_movi(s, ts->type, reg, ts->val);
2156 } else {
2157 tcg_abort();
2158 }
2159 tcg_regset_set_reg(allocated_regs, reg);
2160 }
2161 }
2162
2163 /* assign function address */
2164 func_arg = args[nb_oargs + nb_iargs - 1];
2165 arg_ct = &def->args_ct[0];
2166 ts = &s->temps[func_arg];
2167 func_addr = ts->val;
2168 const_func_arg = 0;
2169 if (ts->val_type == TEMP_VAL_MEM) {
2170 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
2171 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2172 func_arg = reg;
2173 tcg_regset_set_reg(allocated_regs, reg);
2174 } else if (ts->val_type == TEMP_VAL_REG) {
2175 reg = ts->reg;
2176 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
2177 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
2178 tcg_out_mov(s, ts->type, reg, ts->reg);
2179 }
2180 func_arg = reg;
2181 tcg_regset_set_reg(allocated_regs, reg);
2182 } else if (ts->val_type == TEMP_VAL_CONST) {
2183 if (tcg_target_const_match(func_addr, arg_ct)) {
2184 const_func_arg = 1;
2185 func_arg = func_addr;
2186 } else {
2187 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
2188 tcg_out_movi(s, ts->type, reg, func_addr);
2189 func_arg = reg;
2190 tcg_regset_set_reg(allocated_regs, reg);
2191 }
2192 } else {
2193 tcg_abort();
2194 }
2195
2196
2197 /* mark dead temporaries and free the associated registers */
2198 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
2199 if (IS_DEAD_ARG(i)) {
2200 temp_dead(s, args[i]);
2201 }
2202 }
2203
2204 /* clobber call registers */
2205 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
2206 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
2207 tcg_reg_free(s, reg);
2208 }
2209 }
2210
2211 /* Save globals if they might be written by the helper, sync them if
2212 they might be read. */
2213 if (flags & TCG_CALL_NO_READ_GLOBALS) {
2214 /* Nothing to do */
2215 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) {
2216 sync_globals(s, allocated_regs);
2217 } else {
2218 save_globals(s, allocated_regs);
2219 }
2220
2221 tcg_out_op(s, opc, &func_arg, &const_func_arg);
2222
2223 /* assign output registers and emit moves if needed */
2224 for(i = 0; i < nb_oargs; i++) {
2225 arg = args[i];
2226 ts = &s->temps[arg];
2227 reg = tcg_target_call_oarg_regs[i];
2228 assert(s->reg_to_temp[reg] == -1);
2229 if (ts->fixed_reg) {
2230 if (ts->reg != reg) {
2231 tcg_out_mov(s, ts->type, ts->reg, reg);
2232 }
2233 } else {
2234 if (ts->val_type == TEMP_VAL_REG) {
2235 s->reg_to_temp[ts->reg] = -1;
2236 }
2237 ts->val_type = TEMP_VAL_REG;
2238 ts->reg = reg;
2239 ts->mem_coherent = 0;
2240 s->reg_to_temp[reg] = arg;
2241 if (NEED_SYNC_ARG(i)) {
2242 tcg_reg_sync(s, reg);
2243 }
2244 if (IS_DEAD_ARG(i)) {
2245 temp_dead(s, args[i]);
2246 }
2247 }
2248 }
2249
2250 return nb_iargs + nb_oargs + def->nb_cargs + 1;
2251 }
2252
2253 #ifdef CONFIG_PROFILER
2254
2255 static int64_t tcg_table_op_count[NB_OPS];
2256
2257 static void dump_op_count(void)
2258 {
2259 int i;
2260 FILE *f;
2261 f = fopen("/tmp/op.log", "w");
2262 for(i = INDEX_op_end; i < NB_OPS; i++) {
2263 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]);
2264 }
2265 fclose(f);
2266 }
2267 #endif
2268
2269
2270 static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
2271 long search_pc)
2272 {
2273 TCGOpcode opc;
2274 int op_index;
2275 const TCGOpDef *def;
2276 const TCGArg *args;
2277
2278 #ifdef DEBUG_DISAS
2279 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
2280 qemu_log("OP:\n");
2281 tcg_dump_ops(s);
2282 qemu_log("\n");
2283 }
2284 #endif
2285
2286 #ifdef CONFIG_PROFILER
2287 s->opt_time -= profile_getclock();
2288 #endif
2289
2290 #ifdef USE_TCG_OPTIMIZATIONS
2291 s->gen_opparam_ptr =
2292 tcg_optimize(s, s->gen_opc_ptr, s->gen_opparam_buf, tcg_op_defs);
2293 #endif
2294
2295 #ifdef CONFIG_PROFILER
2296 s->opt_time += profile_getclock();
2297 s->la_time -= profile_getclock();
2298 #endif
2299
2300 tcg_liveness_analysis(s);
2301
2302 #ifdef CONFIG_PROFILER
2303 s->la_time += profile_getclock();
2304 #endif
2305
2306 #ifdef DEBUG_DISAS
2307 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
2308 qemu_log("OP after optimization and liveness analysis:\n");
2309 tcg_dump_ops(s);
2310 qemu_log("\n");
2311 }
2312 #endif
2313
2314 tcg_reg_alloc_start(s);
2315
2316 s->code_buf = gen_code_buf;
2317 s->code_ptr = gen_code_buf;
2318
2319 args = s->gen_opparam_buf;
2320 op_index = 0;
2321
2322 for(;;) {
2323 opc = s->gen_opc_buf[op_index];
2324 #ifdef CONFIG_PROFILER
2325 tcg_table_op_count[opc]++;
2326 #endif
2327 def = &tcg_op_defs[opc];
2328 #if 0
2329 printf("%s: %d %d %d\n", def->name,
2330 def->nb_oargs, def->nb_iargs, def->nb_cargs);
2331 // dump_regs(s);
2332 #endif
2333 switch(opc) {
2334 case INDEX_op_mov_i32:
2335 case INDEX_op_mov_i64:
2336 tcg_reg_alloc_mov(s, def, args, s->op_dead_args[op_index],
2337 s->op_sync_args[op_index]);
2338 break;
2339 case INDEX_op_movi_i32:
2340 case INDEX_op_movi_i64:
2341 tcg_reg_alloc_movi(s, args, s->op_dead_args[op_index],
2342 s->op_sync_args[op_index]);
2343 break;
2344 case INDEX_op_debug_insn_start:
2345 /* debug instruction */
2346 break;
2347 case INDEX_op_nop:
2348 case INDEX_op_nop1:
2349 case INDEX_op_nop2:
2350 case INDEX_op_nop3:
2351 break;
2352 case INDEX_op_nopn:
2353 args += args[0];
2354 goto next;
2355 case INDEX_op_discard:
2356 temp_dead(s, args[0]);
2357 break;
2358 case INDEX_op_set_label:
2359 tcg_reg_alloc_bb_end(s, s->reserved_regs);
2360 tcg_out_label(s, args[0], s->code_ptr);
2361 break;
2362 case INDEX_op_call:
2363 args += tcg_reg_alloc_call(s, def, opc, args,
2364 s->op_dead_args[op_index],
2365 s->op_sync_args[op_index]);
2366 goto next;
2367 case INDEX_op_end:
2368 goto the_end;
2369 default:
2370 /* Sanity check that we've not introduced any unhandled opcodes. */
2371 if (def->flags & TCG_OPF_NOT_PRESENT) {
2372 tcg_abort();
2373 }
2374 /* Note: in order to speed up the code, it would be much
2375 faster to have specialized register allocator functions for
2376 some common argument patterns */
2377 tcg_reg_alloc_op(s, def, opc, args, s->op_dead_args[op_index],
2378 s->op_sync_args[op_index]);
2379 break;
2380 }
2381 args += def->nb_args;
2382 next:
2383 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
2384 return op_index;
2385 }
2386 op_index++;
2387 #ifndef NDEBUG
2388 check_regs(s);
2389 #endif
2390 }
2391 the_end:
2392 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
2393 /* Generate TB finalization at the end of block */
2394 tcg_out_tb_finalize(s);
2395 #endif
2396 return -1;
2397 }
2398
2399 int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
2400 {
2401 #ifdef CONFIG_PROFILER
2402 {
2403 int n;
2404 n = (s->gen_opc_ptr - s->gen_opc_buf);
2405 s->op_count += n;
2406 if (n > s->op_count_max)
2407 s->op_count_max = n;
2408
2409 s->temp_count += s->nb_temps;
2410 if (s->nb_temps > s->temp_count_max)
2411 s->temp_count_max = s->nb_temps;
2412 }
2413 #endif
2414
2415 tcg_gen_code_common(s, gen_code_buf, -1);
2416
2417 /* flush instruction cache */
2418 flush_icache_range((tcg_target_ulong)gen_code_buf,
2419 (tcg_target_ulong)s->code_ptr);
2420
2421 return s->code_ptr - gen_code_buf;
2422 }
2423
2424 /* Return the index of the micro operation such as the pc after is <
2425 offset bytes from the start of the TB. The contents of gen_code_buf must
2426 not be changed, though writing the same values is ok.
2427 Return -1 if not found. */
2428 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
2429 {
2430 return tcg_gen_code_common(s, gen_code_buf, offset);
2431 }
2432
2433 #ifdef CONFIG_PROFILER
2434 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
2435 {
2436 TCGContext *s = &tcg_ctx;
2437 int64_t tot;
2438
2439 tot = s->interm_time + s->code_time;
2440 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n",
2441 tot, tot / 2.4e9);
2442 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n",
2443 s->tb_count,
2444 s->tb_count1 - s->tb_count,
2445 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0);
2446 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n",
2447 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max);
2448 cpu_fprintf(f, "deleted ops/TB %0.2f\n",
2449 s->tb_count ?
2450 (double)s->del_op_count / s->tb_count : 0);
2451 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n",
2452 s->tb_count ?
2453 (double)s->temp_count / s->tb_count : 0,
2454 s->temp_count_max);
2455
2456 cpu_fprintf(f, "cycles/op %0.1f\n",
2457 s->op_count ? (double)tot / s->op_count : 0);
2458 cpu_fprintf(f, "cycles/in byte %0.1f\n",
2459 s->code_in_len ? (double)tot / s->code_in_len : 0);
2460 cpu_fprintf(f, "cycles/out byte %0.1f\n",
2461 s->code_out_len ? (double)tot / s->code_out_len : 0);
2462 if (tot == 0)
2463 tot = 1;
2464 cpu_fprintf(f, " gen_interm time %0.1f%%\n",
2465 (double)s->interm_time / tot * 100.0);
2466 cpu_fprintf(f, " gen_code time %0.1f%%\n",
2467 (double)s->code_time / tot * 100.0);
2468 cpu_fprintf(f, "optim./code time %0.1f%%\n",
2469 (double)s->opt_time / (s->code_time ? s->code_time : 1)
2470 * 100.0);
2471 cpu_fprintf(f, "liveness/code time %0.1f%%\n",
2472 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0);
2473 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n",
2474 s->restore_count);
2475 cpu_fprintf(f, " avg cycles %0.1f\n",
2476 s->restore_count ? (double)s->restore_time / s->restore_count : 0);
2477
2478 dump_op_count();
2479 }
2480 #else
2481 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
2482 {
2483 cpu_fprintf(f, "[TCG profiler not compiled]\n");
2484 }
2485 #endif
2486
2487 #ifdef ELF_HOST_MACHINE
2488 /* In order to use this feature, the backend needs to do three things:
2489
2490 (1) Define ELF_HOST_MACHINE to indicate both what value to
2491 put into the ELF image and to indicate support for the feature.
2492
2493 (2) Define tcg_register_jit. This should create a buffer containing
2494 the contents of a .debug_frame section that describes the post-
2495 prologue unwind info for the tcg machine.
2496
2497 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2498 */
2499
2500 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2501 typedef enum {
2502 JIT_NOACTION = 0,
2503 JIT_REGISTER_FN,
2504 JIT_UNREGISTER_FN
2505 } jit_actions_t;
2506
2507 struct jit_code_entry {
2508 struct jit_code_entry *next_entry;
2509 struct jit_code_entry *prev_entry;
2510 const void *symfile_addr;
2511 uint64_t symfile_size;
2512 };
2513
2514 struct jit_descriptor {
2515 uint32_t version;
2516 uint32_t action_flag;
2517 struct jit_code_entry *relevant_entry;
2518 struct jit_code_entry *first_entry;
2519 };
2520
2521 void __jit_debug_register_code(void) __attribute__((noinline));
2522 void __jit_debug_register_code(void)
2523 {
2524 asm("");
2525 }
2526
2527 /* Must statically initialize the version, because GDB may check
2528 the version before we can set it. */
2529 struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 };
2530
2531 /* End GDB interface. */
2532
2533 static int find_string(const char *strtab, const char *str)
2534 {
2535 const char *p = strtab + 1;
2536
2537 while (1) {
2538 if (strcmp(p, str) == 0) {
2539 return p - strtab;
2540 }
2541 p += strlen(p) + 1;
2542 }
2543 }
2544
2545 static void tcg_register_jit_int(void *buf_ptr, size_t buf_size,
2546 void *debug_frame, size_t debug_frame_size)
2547 {
2548 struct __attribute__((packed)) DebugInfo {
2549 uint32_t len;
2550 uint16_t version;
2551 uint32_t abbrev;
2552 uint8_t ptr_size;
2553 uint8_t cu_die;
2554 uint16_t cu_lang;
2555 uintptr_t cu_low_pc;
2556 uintptr_t cu_high_pc;
2557 uint8_t fn_die;
2558 char fn_name[16];
2559 uintptr_t fn_low_pc;
2560 uintptr_t fn_high_pc;
2561 uint8_t cu_eoc;
2562 };
2563
2564 struct ElfImage {
2565 ElfW(Ehdr) ehdr;
2566 ElfW(Phdr) phdr;
2567 ElfW(Shdr) shdr[7];
2568 ElfW(Sym) sym[2];
2569 struct DebugInfo di;
2570 uint8_t da[24];
2571 char str[80];
2572 };
2573
2574 struct ElfImage *img;
2575
2576 static const struct ElfImage img_template = {
2577 .ehdr = {
2578 .e_ident[EI_MAG0] = ELFMAG0,
2579 .e_ident[EI_MAG1] = ELFMAG1,
2580 .e_ident[EI_MAG2] = ELFMAG2,
2581 .e_ident[EI_MAG3] = ELFMAG3,
2582 .e_ident[EI_CLASS] = ELF_CLASS,
2583 .e_ident[EI_DATA] = ELF_DATA,
2584 .e_ident[EI_VERSION] = EV_CURRENT,
2585 .e_type = ET_EXEC,
2586 .e_machine = ELF_HOST_MACHINE,
2587 .e_version = EV_CURRENT,
2588 .e_phoff = offsetof(struct ElfImage, phdr),
2589 .e_shoff = offsetof(struct ElfImage, shdr),
2590 .e_ehsize = sizeof(ElfW(Shdr)),
2591 .e_phentsize = sizeof(ElfW(Phdr)),
2592 .e_phnum = 1,
2593 .e_shentsize = sizeof(ElfW(Shdr)),
2594 .e_shnum = ARRAY_SIZE(img->shdr),
2595 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1,
2596 #ifdef ELF_HOST_FLAGS
2597 .e_flags = ELF_HOST_FLAGS,
2598 #endif
2599 #ifdef ELF_OSABI
2600 .e_ident[EI_OSABI] = ELF_OSABI,
2601 #endif
2602 },
2603 .phdr = {
2604 .p_type = PT_LOAD,
2605 .p_flags = PF_X,
2606 },
2607 .shdr = {
2608 [0] = { .sh_type = SHT_NULL },
2609 /* Trick: The contents of code_gen_buffer are not present in
2610 this fake ELF file; that got allocated elsewhere. Therefore
2611 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2612 will not look for contents. We can record any address. */
2613 [1] = { /* .text */
2614 .sh_type = SHT_NOBITS,
2615 .sh_flags = SHF_EXECINSTR | SHF_ALLOC,
2616 },
2617 [2] = { /* .debug_info */
2618 .sh_type = SHT_PROGBITS,
2619 .sh_offset = offsetof(struct ElfImage, di),
2620 .sh_size = sizeof(struct DebugInfo),
2621 },
2622 [3] = { /* .debug_abbrev */
2623 .sh_type = SHT_PROGBITS,
2624 .sh_offset = offsetof(struct ElfImage, da),
2625 .sh_size = sizeof(img->da),
2626 },
2627 [4] = { /* .debug_frame */
2628 .sh_type = SHT_PROGBITS,
2629 .sh_offset = sizeof(struct ElfImage),
2630 },
2631 [5] = { /* .symtab */
2632 .sh_type = SHT_SYMTAB,
2633 .sh_offset = offsetof(struct ElfImage, sym),
2634 .sh_size = sizeof(img->sym),
2635 .sh_info = 1,
2636 .sh_link = ARRAY_SIZE(img->shdr) - 1,
2637 .sh_entsize = sizeof(ElfW(Sym)),
2638 },
2639 [6] = { /* .strtab */
2640 .sh_type = SHT_STRTAB,
2641 .sh_offset = offsetof(struct ElfImage, str),
2642 .sh_size = sizeof(img->str),
2643 }
2644 },
2645 .sym = {
2646 [1] = { /* code_gen_buffer */
2647 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC),
2648 .st_shndx = 1,
2649 }
2650 },
2651 .di = {
2652 .len = sizeof(struct DebugInfo) - 4,
2653 .version = 2,
2654 .ptr_size = sizeof(void *),
2655 .cu_die = 1,
2656 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */
2657 .fn_die = 2,
2658 .fn_name = "code_gen_buffer"
2659 },
2660 .da = {
2661 1, /* abbrev number (the cu) */
2662 0x11, 1, /* DW_TAG_compile_unit, has children */
2663 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2664 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2665 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2666 0, 0, /* end of abbrev */
2667 2, /* abbrev number (the fn) */
2668 0x2e, 0, /* DW_TAG_subprogram, no children */
2669 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2670 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2671 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2672 0, 0, /* end of abbrev */
2673 0 /* no more abbrev */
2674 },
2675 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2676 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2677 };
2678
2679 /* We only need a single jit entry; statically allocate it. */
2680 static struct jit_code_entry one_entry;
2681
2682 uintptr_t buf = (uintptr_t)buf_ptr;
2683 size_t img_size = sizeof(struct ElfImage) + debug_frame_size;
2684
2685 img = g_malloc(img_size);
2686 *img = img_template;
2687 memcpy(img + 1, debug_frame, debug_frame_size);
2688
2689 img->phdr.p_vaddr = buf;
2690 img->phdr.p_paddr = buf;
2691 img->phdr.p_memsz = buf_size;
2692
2693 img->shdr[1].sh_name = find_string(img->str, ".text");
2694 img->shdr[1].sh_addr = buf;
2695 img->shdr[1].sh_size = buf_size;
2696
2697 img->shdr[2].sh_name = find_string(img->str, ".debug_info");
2698 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev");
2699
2700 img->shdr[4].sh_name = find_string(img->str, ".debug_frame");
2701 img->shdr[4].sh_size = debug_frame_size;
2702
2703 img->shdr[5].sh_name = find_string(img->str, ".symtab");
2704 img->shdr[6].sh_name = find_string(img->str, ".strtab");
2705
2706 img->sym[1].st_name = find_string(img->str, "code_gen_buffer");
2707 img->sym[1].st_value = buf;
2708 img->sym[1].st_size = buf_size;
2709
2710 img->di.cu_low_pc = buf;
2711 img->di.cu_high_pc = buf + buf_size;
2712 img->di.fn_low_pc = buf;
2713 img->di.fn_high_pc = buf + buf_size;
2714
2715 #ifdef DEBUG_JIT
2716 /* Enable this block to be able to debug the ELF image file creation.
2717 One can use readelf, objdump, or other inspection utilities. */
2718 {
2719 FILE *f = fopen("/tmp/qemu.jit", "w+b");
2720 if (f) {
2721 if (fwrite(img, img_size, 1, f) != img_size) {
2722 /* Avoid stupid unused return value warning for fwrite. */
2723 }
2724 fclose(f);
2725 }
2726 }
2727 #endif
2728
2729 one_entry.symfile_addr = img;
2730 one_entry.symfile_size = img_size;
2731
2732 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN;
2733 __jit_debug_descriptor.relevant_entry = &one_entry;
2734 __jit_debug_descriptor.first_entry = &one_entry;
2735 __jit_debug_register_code();
2736 }
2737 #else
2738 /* No support for the feature. Provide the entry point expected by exec.c,
2739 and implement the internal function we declared earlier. */
2740
2741 static void tcg_register_jit_int(void *buf, size_t size,
2742 void *debug_frame, size_t debug_frame_size)
2743 {
2744 }
2745
2746 void tcg_register_jit(void *buf, size_t buf_size)
2747 {
2748 }
2749 #endif /* ELF_HOST_MACHINE */