2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "cache-utils.h"
41 #include "host-utils.h"
42 #include "qemu-timer.h"
44 /* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
47 #define NO_CPU_IO_DEFS
52 #if TCG_TARGET_REG_BITS == 64
53 # define ELF_CLASS ELFCLASS64
55 # define ELF_CLASS ELFCLASS32
57 #ifdef HOST_WORDS_BIGENDIAN
58 # define ELF_DATA ELFDATA2MSB
60 # define ELF_DATA ELFDATA2LSB
65 /* Forward declarations for functions declared in tcg-target.c and used here. */
66 static void tcg_target_init(TCGContext
*s
);
67 static void tcg_target_qemu_prologue(TCGContext
*s
);
68 static void patch_reloc(uint8_t *code_ptr
, int type
,
69 tcg_target_long value
, tcg_target_long addend
);
71 static void tcg_register_jit_int(void *buf
, size_t size
,
72 void *debug_frame
, size_t debug_frame_size
)
73 __attribute__((unused
));
75 /* Forward declarations for functions declared and used in tcg-target.c. */
76 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
77 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
78 tcg_target_long arg2
);
79 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
80 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
81 TCGReg ret
, tcg_target_long arg
);
82 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
83 const int *const_args
);
84 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
85 tcg_target_long arg2
);
86 static int tcg_target_const_match(tcg_target_long val
,
87 const TCGArgConstraint
*arg_ct
);
89 TCGOpDef tcg_op_defs
[] = {
90 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
94 const size_t tcg_op_defs_max
= ARRAY_SIZE(tcg_op_defs
);
96 static TCGRegSet tcg_target_available_regs
[2];
97 static TCGRegSet tcg_target_call_clobber_regs
;
99 /* XXX: move that inside the context */
100 uint16_t *gen_opc_ptr
;
101 TCGArg
*gen_opparam_ptr
;
103 static inline void tcg_out8(TCGContext
*s
, uint8_t v
)
108 static inline void tcg_out16(TCGContext
*s
, uint16_t v
)
110 *(uint16_t *)s
->code_ptr
= v
;
114 static inline void tcg_out32(TCGContext
*s
, uint32_t v
)
116 *(uint32_t *)s
->code_ptr
= v
;
120 /* label relocation processing */
122 static void tcg_out_reloc(TCGContext
*s
, uint8_t *code_ptr
, int type
,
123 int label_index
, long addend
)
128 l
= &s
->labels
[label_index
];
130 /* FIXME: This may break relocations on RISC targets that
131 modify instruction fields in place. The caller may not have
132 written the initial value. */
133 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
135 /* add a new relocation entry */
136 r
= tcg_malloc(sizeof(TCGRelocation
));
140 r
->next
= l
->u
.first_reloc
;
141 l
->u
.first_reloc
= r
;
145 static void tcg_out_label(TCGContext
*s
, int label_index
, void *ptr
)
149 tcg_target_long value
= (tcg_target_long
)ptr
;
151 l
= &s
->labels
[label_index
];
154 r
= l
->u
.first_reloc
;
156 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
163 int gen_new_label(void)
165 TCGContext
*s
= &tcg_ctx
;
169 if (s
->nb_labels
>= TCG_MAX_LABELS
)
171 idx
= s
->nb_labels
++;
174 l
->u
.first_reloc
= NULL
;
178 #include "tcg-target.c"
180 /* pool based memory allocation */
181 void *tcg_malloc_internal(TCGContext
*s
, int size
)
186 if (size
> TCG_POOL_CHUNK_SIZE
) {
187 /* big malloc: insert a new pool (XXX: could optimize) */
188 p
= g_malloc(sizeof(TCGPool
) + size
);
190 p
->next
= s
->pool_first_large
;
191 s
->pool_first_large
= p
;
202 pool_size
= TCG_POOL_CHUNK_SIZE
;
203 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
207 s
->pool_current
->next
= p
;
216 s
->pool_cur
= p
->data
+ size
;
217 s
->pool_end
= p
->data
+ p
->size
;
221 void tcg_pool_reset(TCGContext
*s
)
224 for (p
= s
->pool_first_large
; p
; p
= t
) {
228 s
->pool_first_large
= NULL
;
229 s
->pool_cur
= s
->pool_end
= NULL
;
230 s
->pool_current
= NULL
;
233 void tcg_context_init(TCGContext
*s
)
235 int op
, total_args
, n
;
237 TCGArgConstraint
*args_ct
;
240 memset(s
, 0, sizeof(*s
));
243 /* Count total number of arguments and allocate the corresponding
246 for(op
= 0; op
< NB_OPS
; op
++) {
247 def
= &tcg_op_defs
[op
];
248 n
= def
->nb_iargs
+ def
->nb_oargs
;
252 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
253 sorted_args
= g_malloc(sizeof(int) * total_args
);
255 for(op
= 0; op
< NB_OPS
; op
++) {
256 def
= &tcg_op_defs
[op
];
257 def
->args_ct
= args_ct
;
258 def
->sorted_args
= sorted_args
;
259 n
= def
->nb_iargs
+ def
->nb_oargs
;
267 void tcg_prologue_init(TCGContext
*s
)
269 /* init global prologue and epilogue */
270 s
->code_buf
= code_gen_prologue
;
271 s
->code_ptr
= s
->code_buf
;
272 tcg_target_qemu_prologue(s
);
273 flush_icache_range((tcg_target_ulong
)s
->code_buf
,
274 (tcg_target_ulong
)s
->code_ptr
);
277 void tcg_set_frame(TCGContext
*s
, int reg
,
278 tcg_target_long start
, tcg_target_long size
)
280 s
->frame_start
= start
;
281 s
->frame_end
= start
+ size
;
285 void tcg_func_start(TCGContext
*s
)
289 s
->nb_temps
= s
->nb_globals
;
290 for(i
= 0; i
< (TCG_TYPE_COUNT
* 2); i
++)
291 s
->first_free_temp
[i
] = -1;
292 s
->labels
= tcg_malloc(sizeof(TCGLabel
) * TCG_MAX_LABELS
);
294 s
->current_frame_offset
= s
->frame_start
;
296 #ifdef CONFIG_DEBUG_TCG
297 s
->goto_tb_issue_mask
= 0;
300 gen_opc_ptr
= gen_opc_buf
;
301 gen_opparam_ptr
= gen_opparam_buf
;
304 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
306 if (n
> TCG_MAX_TEMPS
)
310 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
313 TCGContext
*s
= &tcg_ctx
;
317 #if TCG_TARGET_REG_BITS == 32
318 if (type
!= TCG_TYPE_I32
)
321 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
324 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
325 ts
= &s
->temps
[s
->nb_globals
];
326 ts
->base_type
= type
;
332 tcg_regset_set_reg(s
->reserved_regs
, reg
);
336 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
340 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
341 return MAKE_TCGV_I32(idx
);
344 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
348 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
349 return MAKE_TCGV_I64(idx
);
352 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
353 tcg_target_long offset
,
356 TCGContext
*s
= &tcg_ctx
;
361 #if TCG_TARGET_REG_BITS == 32
362 if (type
== TCG_TYPE_I64
) {
364 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
365 ts
= &s
->temps
[s
->nb_globals
];
366 ts
->base_type
= type
;
367 ts
->type
= TCG_TYPE_I32
;
369 ts
->mem_allocated
= 1;
371 #ifdef TCG_TARGET_WORDS_BIGENDIAN
372 ts
->mem_offset
= offset
+ 4;
374 ts
->mem_offset
= offset
;
376 pstrcpy(buf
, sizeof(buf
), name
);
377 pstrcat(buf
, sizeof(buf
), "_0");
378 ts
->name
= strdup(buf
);
381 ts
->base_type
= type
;
382 ts
->type
= TCG_TYPE_I32
;
384 ts
->mem_allocated
= 1;
386 #ifdef TCG_TARGET_WORDS_BIGENDIAN
387 ts
->mem_offset
= offset
;
389 ts
->mem_offset
= offset
+ 4;
391 pstrcpy(buf
, sizeof(buf
), name
);
392 pstrcat(buf
, sizeof(buf
), "_1");
393 ts
->name
= strdup(buf
);
399 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
400 ts
= &s
->temps
[s
->nb_globals
];
401 ts
->base_type
= type
;
404 ts
->mem_allocated
= 1;
406 ts
->mem_offset
= offset
;
413 TCGv_i32
tcg_global_mem_new_i32(int reg
, tcg_target_long offset
,
418 idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
419 return MAKE_TCGV_I32(idx
);
422 TCGv_i64
tcg_global_mem_new_i64(int reg
, tcg_target_long offset
,
427 idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
428 return MAKE_TCGV_I64(idx
);
431 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
433 TCGContext
*s
= &tcg_ctx
;
440 idx
= s
->first_free_temp
[k
];
442 /* There is already an available temp with the
445 s
->first_free_temp
[k
] = ts
->next_free_temp
;
446 ts
->temp_allocated
= 1;
447 assert(ts
->temp_local
== temp_local
);
450 #if TCG_TARGET_REG_BITS == 32
451 if (type
== TCG_TYPE_I64
) {
452 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
453 ts
= &s
->temps
[s
->nb_temps
];
454 ts
->base_type
= type
;
455 ts
->type
= TCG_TYPE_I32
;
456 ts
->temp_allocated
= 1;
457 ts
->temp_local
= temp_local
;
460 ts
->base_type
= TCG_TYPE_I32
;
461 ts
->type
= TCG_TYPE_I32
;
462 ts
->temp_allocated
= 1;
463 ts
->temp_local
= temp_local
;
469 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
470 ts
= &s
->temps
[s
->nb_temps
];
471 ts
->base_type
= type
;
473 ts
->temp_allocated
= 1;
474 ts
->temp_local
= temp_local
;
480 #if defined(CONFIG_DEBUG_TCG)
486 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
490 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
491 return MAKE_TCGV_I32(idx
);
494 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
498 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
499 return MAKE_TCGV_I64(idx
);
502 static inline void tcg_temp_free_internal(int idx
)
504 TCGContext
*s
= &tcg_ctx
;
508 #if defined(CONFIG_DEBUG_TCG)
510 if (s
->temps_in_use
< 0) {
511 fprintf(stderr
, "More temporaries freed than allocated!\n");
515 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
517 assert(ts
->temp_allocated
!= 0);
518 ts
->temp_allocated
= 0;
522 ts
->next_free_temp
= s
->first_free_temp
[k
];
523 s
->first_free_temp
[k
] = idx
;
526 void tcg_temp_free_i32(TCGv_i32 arg
)
528 tcg_temp_free_internal(GET_TCGV_I32(arg
));
531 void tcg_temp_free_i64(TCGv_i64 arg
)
533 tcg_temp_free_internal(GET_TCGV_I64(arg
));
536 TCGv_i32
tcg_const_i32(int32_t val
)
539 t0
= tcg_temp_new_i32();
540 tcg_gen_movi_i32(t0
, val
);
544 TCGv_i64
tcg_const_i64(int64_t val
)
547 t0
= tcg_temp_new_i64();
548 tcg_gen_movi_i64(t0
, val
);
552 TCGv_i32
tcg_const_local_i32(int32_t val
)
555 t0
= tcg_temp_local_new_i32();
556 tcg_gen_movi_i32(t0
, val
);
560 TCGv_i64
tcg_const_local_i64(int64_t val
)
563 t0
= tcg_temp_local_new_i64();
564 tcg_gen_movi_i64(t0
, val
);
568 #if defined(CONFIG_DEBUG_TCG)
569 void tcg_clear_temp_count(void)
571 TCGContext
*s
= &tcg_ctx
;
575 int tcg_check_temp_count(void)
577 TCGContext
*s
= &tcg_ctx
;
578 if (s
->temps_in_use
) {
579 /* Clear the count so that we don't give another
580 * warning immediately next time around.
589 void tcg_register_helper(void *func
, const char *name
)
591 TCGContext
*s
= &tcg_ctx
;
593 if ((s
->nb_helpers
+ 1) > s
->allocated_helpers
) {
594 n
= s
->allocated_helpers
;
600 s
->helpers
= realloc(s
->helpers
, n
* sizeof(TCGHelperInfo
));
601 s
->allocated_helpers
= n
;
603 s
->helpers
[s
->nb_helpers
].func
= (tcg_target_ulong
)func
;
604 s
->helpers
[s
->nb_helpers
].name
= name
;
608 /* Note: we convert the 64 bit args to 32 bit and do some alignment
609 and endian swap. Maybe it would be better to do the alignment
610 and endian swap in tcg_reg_alloc_call(). */
611 void tcg_gen_callN(TCGContext
*s
, TCGv_ptr func
, unsigned int flags
,
612 int sizemask
, TCGArg ret
, int nargs
, TCGArg
*args
)
619 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
620 for (i
= 0; i
< nargs
; ++i
) {
621 int is_64bit
= sizemask
& (1 << (i
+1)*2);
622 int is_signed
= sizemask
& (2 << (i
+1)*2);
624 TCGv_i64 temp
= tcg_temp_new_i64();
625 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
627 tcg_gen_ext32s_i64(temp
, orig
);
629 tcg_gen_ext32u_i64(temp
, orig
);
631 args
[i
] = GET_TCGV_I64(temp
);
634 #endif /* TCG_TARGET_EXTEND_ARGS */
636 *gen_opc_ptr
++ = INDEX_op_call
;
637 nparam
= gen_opparam_ptr
++;
638 if (ret
!= TCG_CALL_DUMMY_ARG
) {
639 #if TCG_TARGET_REG_BITS < 64
641 #ifdef TCG_TARGET_WORDS_BIGENDIAN
642 *gen_opparam_ptr
++ = ret
+ 1;
643 *gen_opparam_ptr
++ = ret
;
645 *gen_opparam_ptr
++ = ret
;
646 *gen_opparam_ptr
++ = ret
+ 1;
652 *gen_opparam_ptr
++ = ret
;
659 for (i
= 0; i
< nargs
; i
++) {
660 #if TCG_TARGET_REG_BITS < 64
661 int is_64bit
= sizemask
& (1 << (i
+1)*2);
663 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
664 /* some targets want aligned 64 bit args */
666 *gen_opparam_ptr
++ = TCG_CALL_DUMMY_ARG
;
670 /* If stack grows up, then we will be placing successive
671 arguments at lower addresses, which means we need to
672 reverse the order compared to how we would normally
673 treat either big or little-endian. For those arguments
674 that will wind up in registers, this still works for
675 HPPA (the only current STACK_GROWSUP target) since the
676 argument registers are *also* allocated in decreasing
677 order. If another such target is added, this logic may
678 have to get more complicated to differentiate between
679 stack arguments and register arguments. */
680 #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
681 *gen_opparam_ptr
++ = args
[i
] + 1;
682 *gen_opparam_ptr
++ = args
[i
];
684 *gen_opparam_ptr
++ = args
[i
];
685 *gen_opparam_ptr
++ = args
[i
] + 1;
690 #endif /* TCG_TARGET_REG_BITS < 64 */
692 *gen_opparam_ptr
++ = args
[i
];
695 *gen_opparam_ptr
++ = GET_TCGV_PTR(func
);
697 *gen_opparam_ptr
++ = flags
;
699 *nparam
= (nb_rets
<< 16) | (real_args
+ 1);
701 /* total parameters, needed to go backward in the instruction stream */
702 *gen_opparam_ptr
++ = 1 + nb_rets
+ real_args
+ 3;
704 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
705 for (i
= 0; i
< nargs
; ++i
) {
706 int is_64bit
= sizemask
& (1 << (i
+1)*2);
708 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
709 tcg_temp_free_i64(temp
);
712 #endif /* TCG_TARGET_EXTEND_ARGS */
715 #if TCG_TARGET_REG_BITS == 32
716 void tcg_gen_shifti_i64(TCGv_i64 ret
, TCGv_i64 arg1
,
717 int c
, int right
, int arith
)
720 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
));
721 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
));
722 } else if (c
>= 32) {
726 tcg_gen_sari_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
727 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), 31);
729 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
730 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
733 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_LOW(arg1
), c
);
734 tcg_gen_movi_i32(TCGV_LOW(ret
), 0);
739 t0
= tcg_temp_new_i32();
740 t1
= tcg_temp_new_i32();
742 tcg_gen_shli_i32(t0
, TCGV_HIGH(arg1
), 32 - c
);
744 tcg_gen_sari_i32(t1
, TCGV_HIGH(arg1
), c
);
746 tcg_gen_shri_i32(t1
, TCGV_HIGH(arg1
), c
);
747 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), c
);
748 tcg_gen_or_i32(TCGV_LOW(ret
), TCGV_LOW(ret
), t0
);
749 tcg_gen_mov_i32(TCGV_HIGH(ret
), t1
);
751 tcg_gen_shri_i32(t0
, TCGV_LOW(arg1
), 32 - c
);
752 /* Note: ret can be the same as arg1, so we use t1 */
753 tcg_gen_shli_i32(t1
, TCGV_LOW(arg1
), c
);
754 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), c
);
755 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), t0
);
756 tcg_gen_mov_i32(TCGV_LOW(ret
), t1
);
758 tcg_temp_free_i32(t0
);
759 tcg_temp_free_i32(t1
);
765 static void tcg_reg_alloc_start(TCGContext
*s
)
769 for(i
= 0; i
< s
->nb_globals
; i
++) {
772 ts
->val_type
= TEMP_VAL_REG
;
774 ts
->val_type
= TEMP_VAL_MEM
;
777 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
779 ts
->val_type
= TEMP_VAL_DEAD
;
780 ts
->mem_allocated
= 0;
783 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
784 s
->reg_to_temp
[i
] = -1;
788 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
793 assert(idx
>= 0 && idx
< s
->nb_temps
);
796 if (idx
< s
->nb_globals
) {
797 pstrcpy(buf
, buf_size
, ts
->name
);
800 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
802 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
807 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
809 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
812 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
814 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
817 static int helper_cmp(const void *p1
, const void *p2
)
819 const TCGHelperInfo
*th1
= p1
;
820 const TCGHelperInfo
*th2
= p2
;
821 if (th1
->func
< th2
->func
)
823 else if (th1
->func
== th2
->func
)
829 /* find helper definition (Note: A hash table would be better) */
830 static TCGHelperInfo
*tcg_find_helper(TCGContext
*s
, tcg_target_ulong val
)
836 if (unlikely(!s
->helpers_sorted
)) {
837 qsort(s
->helpers
, s
->nb_helpers
, sizeof(TCGHelperInfo
),
839 s
->helpers_sorted
= 1;
844 m_max
= s
->nb_helpers
- 1;
845 while (m_min
<= m_max
) {
846 m
= (m_min
+ m_max
) >> 1;
860 static const char * const cond_name
[] =
862 [TCG_COND_NEVER
] = "never",
863 [TCG_COND_ALWAYS
] = "always",
864 [TCG_COND_EQ
] = "eq",
865 [TCG_COND_NE
] = "ne",
866 [TCG_COND_LT
] = "lt",
867 [TCG_COND_GE
] = "ge",
868 [TCG_COND_LE
] = "le",
869 [TCG_COND_GT
] = "gt",
870 [TCG_COND_LTU
] = "ltu",
871 [TCG_COND_GEU
] = "geu",
872 [TCG_COND_LEU
] = "leu",
873 [TCG_COND_GTU
] = "gtu"
876 void tcg_dump_ops(TCGContext
*s
)
878 const uint16_t *opc_ptr
;
882 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
, first_insn
;
887 opc_ptr
= gen_opc_buf
;
888 args
= gen_opparam_buf
;
889 while (opc_ptr
< gen_opc_ptr
) {
891 def
= &tcg_op_defs
[c
];
892 if (c
== INDEX_op_debug_insn_start
) {
894 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
895 pc
= ((uint64_t)args
[1] << 32) | args
[0];
902 qemu_log(" ---- 0x%" PRIx64
, pc
);
904 nb_oargs
= def
->nb_oargs
;
905 nb_iargs
= def
->nb_iargs
;
906 nb_cargs
= def
->nb_cargs
;
907 } else if (c
== INDEX_op_call
) {
910 /* variable number of arguments */
912 nb_oargs
= arg
>> 16;
913 nb_iargs
= arg
& 0xffff;
914 nb_cargs
= def
->nb_cargs
;
916 qemu_log(" %s ", def
->name
);
920 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
921 args
[nb_oargs
+ nb_iargs
- 1]));
923 qemu_log(",$0x%" TCG_PRIlx
, args
[nb_oargs
+ nb_iargs
]);
925 qemu_log(",$%d", nb_oargs
);
926 for(i
= 0; i
< nb_oargs
; i
++) {
928 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
931 for(i
= 0; i
< (nb_iargs
- 1); i
++) {
933 if (args
[nb_oargs
+ i
] == TCG_CALL_DUMMY_ARG
) {
936 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
937 args
[nb_oargs
+ i
]));
940 } else if (c
== INDEX_op_movi_i32
|| c
== INDEX_op_movi_i64
) {
941 tcg_target_ulong val
;
944 nb_oargs
= def
->nb_oargs
;
945 nb_iargs
= def
->nb_iargs
;
946 nb_cargs
= def
->nb_cargs
;
947 qemu_log(" %s %s,$", def
->name
,
948 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[0]));
950 th
= tcg_find_helper(s
, val
);
952 qemu_log("%s", th
->name
);
954 if (c
== INDEX_op_movi_i32
) {
955 qemu_log("0x%x", (uint32_t)val
);
957 qemu_log("0x%" PRIx64
, (uint64_t)val
);
961 qemu_log(" %s ", def
->name
);
962 if (c
== INDEX_op_nopn
) {
963 /* variable number of arguments */
968 nb_oargs
= def
->nb_oargs
;
969 nb_iargs
= def
->nb_iargs
;
970 nb_cargs
= def
->nb_cargs
;
974 for(i
= 0; i
< nb_oargs
; i
++) {
978 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
981 for(i
= 0; i
< nb_iargs
; i
++) {
985 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
989 case INDEX_op_brcond_i32
:
990 case INDEX_op_setcond_i32
:
991 case INDEX_op_movcond_i32
:
992 case INDEX_op_brcond2_i32
:
993 case INDEX_op_setcond2_i32
:
994 case INDEX_op_brcond_i64
:
995 case INDEX_op_setcond_i64
:
996 case INDEX_op_movcond_i64
:
997 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
998 qemu_log(",%s", cond_name
[args
[k
++]]);
1000 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1008 for(; i
< nb_cargs
; i
++) {
1013 qemu_log("$0x%" TCG_PRIlx
, arg
);
1017 args
+= nb_iargs
+ nb_oargs
+ nb_cargs
;
1021 /* we give more priority to constraints with less registers */
1022 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1024 const TCGArgConstraint
*arg_ct
;
1027 arg_ct
= &def
->args_ct
[k
];
1028 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1029 /* an alias is equivalent to a single register */
1032 if (!(arg_ct
->ct
& TCG_CT_REG
))
1035 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1036 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1040 return TCG_TARGET_NB_REGS
- n
+ 1;
1043 /* sort from highest priority to lowest */
1044 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1046 int i
, j
, p1
, p2
, tmp
;
1048 for(i
= 0; i
< n
; i
++)
1049 def
->sorted_args
[start
+ i
] = start
+ i
;
1052 for(i
= 0; i
< n
- 1; i
++) {
1053 for(j
= i
+ 1; j
< n
; j
++) {
1054 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1055 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1057 tmp
= def
->sorted_args
[start
+ i
];
1058 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1059 def
->sorted_args
[start
+ j
] = tmp
;
1065 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1073 if (tdefs
->op
== (TCGOpcode
)-1)
1076 assert((unsigned)op
< NB_OPS
);
1077 def
= &tcg_op_defs
[op
];
1078 #if defined(CONFIG_DEBUG_TCG)
1079 /* Duplicate entry in op definitions? */
1083 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1084 for(i
= 0; i
< nb_args
; i
++) {
1085 ct_str
= tdefs
->args_ct_str
[i
];
1086 /* Incomplete TCGTargetOpDef entry? */
1087 assert(ct_str
!= NULL
);
1088 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1089 def
->args_ct
[i
].ct
= 0;
1090 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1092 oarg
= ct_str
[0] - '0';
1093 assert(oarg
< def
->nb_oargs
);
1094 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1095 /* TCG_CT_ALIAS is for the output arguments. The input
1096 argument is tagged with TCG_CT_IALIAS. */
1097 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1098 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1099 def
->args_ct
[oarg
].alias_index
= i
;
1100 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1101 def
->args_ct
[i
].alias_index
= oarg
;
1104 if (*ct_str
== '\0')
1108 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1112 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1113 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1114 ct_str
, i
, def
->name
);
1122 /* TCGTargetOpDef entry with too much information? */
1123 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1125 /* sort the constraints (XXX: this is just an heuristic) */
1126 sort_constraints(def
, 0, def
->nb_oargs
);
1127 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1133 printf("%s: sorted=", def
->name
);
1134 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1135 printf(" %d", def
->sorted_args
[i
]);
1142 #if defined(CONFIG_DEBUG_TCG)
1144 for (op
= 0; op
< ARRAY_SIZE(tcg_op_defs
); op
++) {
1145 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1146 if (op
< INDEX_op_call
1147 || op
== INDEX_op_debug_insn_start
1148 || (def
->flags
& TCG_OPF_NOT_PRESENT
)) {
1149 /* Wrong entry in op definitions? */
1151 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1155 /* Missing entry in op definitions? */
1157 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1168 #ifdef USE_LIVENESS_ANALYSIS
1170 /* set a nop for an operation using 'nb_args' */
1171 static inline void tcg_set_nop(TCGContext
*s
, uint16_t *opc_ptr
,
1172 TCGArg
*args
, int nb_args
)
1175 *opc_ptr
= INDEX_op_nop
;
1177 *opc_ptr
= INDEX_op_nopn
;
1179 args
[nb_args
- 1] = nb_args
;
1183 /* liveness analysis: end of function: globals are live, temps are
1185 /* XXX: at this stage, not used as there would be little gains because
1186 most TBs end with a conditional jump. */
1187 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
)
1189 memset(dead_temps
, 0, s
->nb_globals
);
1190 memset(dead_temps
+ s
->nb_globals
, 1, s
->nb_temps
- s
->nb_globals
);
1193 /* liveness analysis: end of basic block: globals are live, temps are
1194 dead, local temps are live. */
1195 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
)
1200 memset(dead_temps
, 0, s
->nb_globals
);
1201 ts
= &s
->temps
[s
->nb_globals
];
1202 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1211 /* Liveness analysis : update the opc_dead_args array to tell if a
1212 given input arguments is dead. Instructions updating dead
1213 temporaries are removed. */
1214 static void tcg_liveness_analysis(TCGContext
*s
)
1216 int i
, op_index
, nb_args
, nb_iargs
, nb_oargs
, arg
, nb_ops
;
1219 const TCGOpDef
*def
;
1220 uint8_t *dead_temps
;
1221 unsigned int dead_args
;
1223 gen_opc_ptr
++; /* skip end */
1225 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
1227 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1229 dead_temps
= tcg_malloc(s
->nb_temps
);
1230 memset(dead_temps
, 1, s
->nb_temps
);
1232 args
= gen_opparam_ptr
;
1233 op_index
= nb_ops
- 1;
1234 while (op_index
>= 0) {
1235 op
= gen_opc_buf
[op_index
];
1236 def
= &tcg_op_defs
[op
];
1244 nb_iargs
= args
[0] & 0xffff;
1245 nb_oargs
= args
[0] >> 16;
1247 call_flags
= args
[nb_oargs
+ nb_iargs
];
1249 /* pure functions can be removed if their result is not
1251 if (call_flags
& TCG_CALL_PURE
) {
1252 for(i
= 0; i
< nb_oargs
; i
++) {
1254 if (!dead_temps
[arg
])
1255 goto do_not_remove_call
;
1257 tcg_set_nop(s
, gen_opc_buf
+ op_index
,
1262 /* output args are dead */
1264 for(i
= 0; i
< nb_oargs
; i
++) {
1266 if (dead_temps
[arg
]) {
1267 dead_args
|= (1 << i
);
1269 dead_temps
[arg
] = 1;
1272 if (!(call_flags
& TCG_CALL_CONST
)) {
1273 /* globals are live (they may be used by the call) */
1274 memset(dead_temps
, 0, s
->nb_globals
);
1277 /* input args are live */
1278 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1280 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1281 if (dead_temps
[arg
]) {
1282 dead_args
|= (1 << i
);
1284 dead_temps
[arg
] = 0;
1287 s
->op_dead_args
[op_index
] = dead_args
;
1292 case INDEX_op_debug_insn_start
:
1293 args
-= def
->nb_args
;
1299 case INDEX_op_discard
:
1301 /* mark the temporary as dead */
1302 dead_temps
[args
[0]] = 1;
1307 case INDEX_op_add2_i32
:
1308 case INDEX_op_sub2_i32
:
1312 /* Test if the high part of the operation is dead, but not
1313 the low part. The result can be optimized to a simple
1314 add or sub. This happens often for x86_64 guest when the
1315 cpu mode is set to 32 bit. */
1316 if (dead_temps
[args
[1]]) {
1317 if (dead_temps
[args
[0]]) {
1320 /* Create the single operation plus nop. */
1321 if (op
== INDEX_op_add2_i32
) {
1322 op
= INDEX_op_add_i32
;
1324 op
= INDEX_op_sub_i32
;
1326 gen_opc_buf
[op_index
] = op
;
1329 assert(gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1330 tcg_set_nop(s
, gen_opc_buf
+ op_index
+ 1, args
+ 3, 3);
1331 /* Fall through and mark the single-word operation live. */
1337 case INDEX_op_mulu2_i32
:
1341 /* Likewise, test for the high part of the operation dead. */
1342 if (dead_temps
[args
[1]]) {
1343 if (dead_temps
[args
[0]]) {
1346 gen_opc_buf
[op_index
] = op
= INDEX_op_mul_i32
;
1349 assert(gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1350 tcg_set_nop(s
, gen_opc_buf
+ op_index
+ 1, args
+ 3, 1);
1351 /* Fall through and mark the single-word operation live. */
1357 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1358 args
-= def
->nb_args
;
1359 nb_iargs
= def
->nb_iargs
;
1360 nb_oargs
= def
->nb_oargs
;
1362 /* Test if the operation can be removed because all
1363 its outputs are dead. We assume that nb_oargs == 0
1364 implies side effects */
1365 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1366 for(i
= 0; i
< nb_oargs
; i
++) {
1368 if (!dead_temps
[arg
])
1372 tcg_set_nop(s
, gen_opc_buf
+ op_index
, args
, def
->nb_args
);
1373 #ifdef CONFIG_PROFILER
1379 /* output args are dead */
1381 for(i
= 0; i
< nb_oargs
; i
++) {
1383 if (dead_temps
[arg
]) {
1384 dead_args
|= (1 << i
);
1386 dead_temps
[arg
] = 1;
1389 /* if end of basic block, update */
1390 if (def
->flags
& TCG_OPF_BB_END
) {
1391 tcg_la_bb_end(s
, dead_temps
);
1392 } else if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1393 /* globals are live */
1394 memset(dead_temps
, 0, s
->nb_globals
);
1397 /* input args are live */
1398 for(i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1400 if (dead_temps
[arg
]) {
1401 dead_args
|= (1 << i
);
1403 dead_temps
[arg
] = 0;
1405 s
->op_dead_args
[op_index
] = dead_args
;
1412 if (args
!= gen_opparam_buf
)
1416 /* dummy liveness analysis */
1417 static void tcg_liveness_analysis(TCGContext
*s
)
1420 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
1422 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1423 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1428 static void dump_regs(TCGContext
*s
)
1434 for(i
= 0; i
< s
->nb_temps
; i
++) {
1436 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1437 switch(ts
->val_type
) {
1439 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1442 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1444 case TEMP_VAL_CONST
:
1445 printf("$0x%" TCG_PRIlx
, ts
->val
);
1457 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1458 if (s
->reg_to_temp
[i
] >= 0) {
1460 tcg_target_reg_names
[i
],
1461 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1466 static void check_regs(TCGContext
*s
)
1472 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1473 k
= s
->reg_to_temp
[reg
];
1476 if (ts
->val_type
!= TEMP_VAL_REG
||
1478 printf("Inconsistency for register %s:\n",
1479 tcg_target_reg_names
[reg
]);
1484 for(k
= 0; k
< s
->nb_temps
; k
++) {
1486 if (ts
->val_type
== TEMP_VAL_REG
&&
1488 s
->reg_to_temp
[ts
->reg
] != k
) {
1489 printf("Inconsistency for temp %s:\n",
1490 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1492 printf("reg state:\n");
1500 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1503 ts
= &s
->temps
[temp
];
1504 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1505 /* Sparc64 stack is accessed with offset of 2047 */
1506 s
->current_frame_offset
= (s
->current_frame_offset
+
1507 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1508 ~(sizeof(tcg_target_long
) - 1);
1510 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1514 ts
->mem_offset
= s
->current_frame_offset
;
1515 ts
->mem_reg
= s
->frame_reg
;
1516 ts
->mem_allocated
= 1;
1517 s
->current_frame_offset
+= (tcg_target_long
)sizeof(tcg_target_long
);
1520 /* free register 'reg' by spilling the corresponding temporary if necessary */
1521 static void tcg_reg_free(TCGContext
*s
, int reg
)
1526 temp
= s
->reg_to_temp
[reg
];
1528 ts
= &s
->temps
[temp
];
1529 assert(ts
->val_type
== TEMP_VAL_REG
);
1530 if (!ts
->mem_coherent
) {
1531 if (!ts
->mem_allocated
)
1532 temp_allocate_frame(s
, temp
);
1533 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1535 ts
->val_type
= TEMP_VAL_MEM
;
1536 s
->reg_to_temp
[reg
] = -1;
1540 /* Allocate a register belonging to reg1 & ~reg2 */
1541 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1546 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1548 /* first try free registers */
1549 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1550 reg
= tcg_target_reg_alloc_order
[i
];
1551 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1555 /* XXX: do better spill choice */
1556 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1557 reg
= tcg_target_reg_alloc_order
[i
];
1558 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1559 tcg_reg_free(s
, reg
);
1567 /* mark a temporary as dead. */
1568 static inline void temp_dead(TCGContext
*s
, int temp
)
1572 ts
= &s
->temps
[temp
];
1573 if (!ts
->fixed_reg
) {
1574 if (ts
->val_type
== TEMP_VAL_REG
) {
1575 s
->reg_to_temp
[ts
->reg
] = -1;
1577 if (temp
< s
->nb_globals
|| (ts
->temp_local
&& ts
->mem_allocated
)) {
1578 ts
->val_type
= TEMP_VAL_MEM
;
1580 ts
->val_type
= TEMP_VAL_DEAD
;
1585 /* save a temporary to memory. 'allocated_regs' is used in case a
1586 temporary registers needs to be allocated to store a constant. */
1587 static void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1592 ts
= &s
->temps
[temp
];
1593 if (!ts
->fixed_reg
) {
1594 switch(ts
->val_type
) {
1596 tcg_reg_free(s
, ts
->reg
);
1599 ts
->val_type
= TEMP_VAL_MEM
;
1601 case TEMP_VAL_CONST
:
1602 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1604 if (!ts
->mem_allocated
)
1605 temp_allocate_frame(s
, temp
);
1606 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1607 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1608 ts
->val_type
= TEMP_VAL_MEM
;
1618 /* save globals to their canonical location and assume they can be
1619 modified be the following code. 'allocated_regs' is used in case a
1620 temporary registers needs to be allocated to store a constant. */
1621 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1625 for(i
= 0; i
< s
->nb_globals
; i
++) {
1626 temp_save(s
, i
, allocated_regs
);
1630 /* at the end of a basic block, we assume all temporaries are dead and
1631 all globals are stored at their canonical location. */
1632 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1637 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1639 if (ts
->temp_local
) {
1640 temp_save(s
, i
, allocated_regs
);
1646 save_globals(s
, allocated_regs
);
1649 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1651 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
)
1654 tcg_target_ulong val
;
1656 ots
= &s
->temps
[args
[0]];
1659 if (ots
->fixed_reg
) {
1660 /* for fixed registers, we do not do any constant
1662 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1664 /* The movi is not explicitly generated here */
1665 if (ots
->val_type
== TEMP_VAL_REG
)
1666 s
->reg_to_temp
[ots
->reg
] = -1;
1667 ots
->val_type
= TEMP_VAL_CONST
;
1672 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1674 unsigned int dead_args
)
1678 const TCGArgConstraint
*arg_ct
;
1680 ots
= &s
->temps
[args
[0]];
1681 ts
= &s
->temps
[args
[1]];
1682 arg_ct
= &def
->args_ct
[0];
1684 /* XXX: always mark arg dead if IS_DEAD_ARG(1) */
1685 if (ts
->val_type
== TEMP_VAL_REG
) {
1686 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1687 /* the mov can be suppressed */
1688 if (ots
->val_type
== TEMP_VAL_REG
)
1689 s
->reg_to_temp
[ots
->reg
] = -1;
1691 temp_dead(s
, args
[1]);
1693 if (ots
->val_type
== TEMP_VAL_REG
) {
1696 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, s
->reserved_regs
);
1698 if (ts
->reg
!= reg
) {
1699 tcg_out_mov(s
, ots
->type
, reg
, ts
->reg
);
1702 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1703 if (ots
->val_type
== TEMP_VAL_REG
) {
1706 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, s
->reserved_regs
);
1708 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1709 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1710 if (ots
->fixed_reg
) {
1712 tcg_out_movi(s
, ots
->type
, reg
, ts
->val
);
1714 /* propagate constant */
1715 if (ots
->val_type
== TEMP_VAL_REG
)
1716 s
->reg_to_temp
[ots
->reg
] = -1;
1717 ots
->val_type
= TEMP_VAL_CONST
;
1724 s
->reg_to_temp
[reg
] = args
[0];
1726 ots
->val_type
= TEMP_VAL_REG
;
1727 ots
->mem_coherent
= 0;
1730 static void tcg_reg_alloc_op(TCGContext
*s
,
1731 const TCGOpDef
*def
, TCGOpcode opc
,
1733 unsigned int dead_args
)
1735 TCGRegSet allocated_regs
;
1736 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1738 const TCGArgConstraint
*arg_ct
;
1740 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1741 int const_args
[TCG_MAX_OP_ARGS
];
1743 nb_oargs
= def
->nb_oargs
;
1744 nb_iargs
= def
->nb_iargs
;
1746 /* copy constants */
1747 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1748 args
+ nb_oargs
+ nb_iargs
,
1749 sizeof(TCGArg
) * def
->nb_cargs
);
1751 /* satisfy input constraints */
1752 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1753 for(k
= 0; k
< nb_iargs
; k
++) {
1754 i
= def
->sorted_args
[nb_oargs
+ k
];
1756 arg_ct
= &def
->args_ct
[i
];
1757 ts
= &s
->temps
[arg
];
1758 if (ts
->val_type
== TEMP_VAL_MEM
) {
1759 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1760 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1761 ts
->val_type
= TEMP_VAL_REG
;
1763 ts
->mem_coherent
= 1;
1764 s
->reg_to_temp
[reg
] = arg
;
1765 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1766 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1767 /* constant is OK for instruction */
1769 new_args
[i
] = ts
->val
;
1772 /* need to move to a register */
1773 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1774 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1775 ts
->val_type
= TEMP_VAL_REG
;
1777 ts
->mem_coherent
= 0;
1778 s
->reg_to_temp
[reg
] = arg
;
1781 assert(ts
->val_type
== TEMP_VAL_REG
);
1782 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
1783 if (ts
->fixed_reg
) {
1784 /* if fixed register, we must allocate a new register
1785 if the alias is not the same register */
1786 if (arg
!= args
[arg_ct
->alias_index
])
1787 goto allocate_in_reg
;
1789 /* if the input is aliased to an output and if it is
1790 not dead after the instruction, we must allocate
1791 a new register and move it */
1792 if (!IS_DEAD_ARG(i
)) {
1793 goto allocate_in_reg
;
1798 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1799 /* nothing to do : the constraint is satisfied */
1802 /* allocate a new register matching the constraint
1803 and move the temporary register into it */
1804 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1805 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1809 tcg_regset_set_reg(allocated_regs
, reg
);
1813 if (def
->flags
& TCG_OPF_BB_END
) {
1814 tcg_reg_alloc_bb_end(s
, allocated_regs
);
1816 /* mark dead temporaries and free the associated registers */
1817 for(i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1818 if (IS_DEAD_ARG(i
)) {
1819 temp_dead(s
, args
[i
]);
1823 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1824 /* XXX: permit generic clobber register list ? */
1825 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1826 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1827 tcg_reg_free(s
, reg
);
1830 /* XXX: for load/store we could do that only for the slow path
1831 (i.e. when a memory callback is called) */
1833 /* store globals and free associated registers (we assume the insn
1834 can modify any global. */
1835 save_globals(s
, allocated_regs
);
1838 /* satisfy the output constraints */
1839 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1840 for(k
= 0; k
< nb_oargs
; k
++) {
1841 i
= def
->sorted_args
[k
];
1843 arg_ct
= &def
->args_ct
[i
];
1844 ts
= &s
->temps
[arg
];
1845 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1846 reg
= new_args
[arg_ct
->alias_index
];
1848 /* if fixed register, we try to use it */
1850 if (ts
->fixed_reg
&&
1851 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1854 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1856 tcg_regset_set_reg(allocated_regs
, reg
);
1857 /* if a fixed register is used, then a move will be done afterwards */
1858 if (!ts
->fixed_reg
) {
1859 if (IS_DEAD_ARG(i
)) {
1860 temp_dead(s
, args
[i
]);
1862 if (ts
->val_type
== TEMP_VAL_REG
) {
1863 s
->reg_to_temp
[ts
->reg
] = -1;
1865 ts
->val_type
= TEMP_VAL_REG
;
1867 /* temp value is modified, so the value kept in memory is
1868 potentially not the same */
1869 ts
->mem_coherent
= 0;
1870 s
->reg_to_temp
[reg
] = arg
;
1878 /* emit instruction */
1879 tcg_out_op(s
, opc
, new_args
, const_args
);
1881 /* move the outputs in the correct register if needed */
1882 for(i
= 0; i
< nb_oargs
; i
++) {
1883 ts
= &s
->temps
[args
[i
]];
1885 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
1886 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
1891 #ifdef TCG_TARGET_STACK_GROWSUP
1892 #define STACK_DIR(x) (-(x))
1894 #define STACK_DIR(x) (x)
1897 static int tcg_reg_alloc_call(TCGContext
*s
, const TCGOpDef
*def
,
1898 TCGOpcode opc
, const TCGArg
*args
,
1899 unsigned int dead_args
)
1901 int nb_iargs
, nb_oargs
, flags
, nb_regs
, i
, reg
, nb_params
;
1902 TCGArg arg
, func_arg
;
1904 tcg_target_long stack_offset
, call_stack_size
, func_addr
;
1905 int const_func_arg
, allocate_args
;
1906 TCGRegSet allocated_regs
;
1907 const TCGArgConstraint
*arg_ct
;
1911 nb_oargs
= arg
>> 16;
1912 nb_iargs
= arg
& 0xffff;
1913 nb_params
= nb_iargs
- 1;
1915 flags
= args
[nb_oargs
+ nb_iargs
];
1917 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
1918 if (nb_regs
> nb_params
)
1919 nb_regs
= nb_params
;
1921 /* assign stack slots first */
1922 call_stack_size
= (nb_params
- nb_regs
) * sizeof(tcg_target_long
);
1923 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
1924 ~(TCG_TARGET_STACK_ALIGN
- 1);
1925 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
1926 if (allocate_args
) {
1927 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
1928 preallocate call stack */
1932 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
1933 for(i
= nb_regs
; i
< nb_params
; i
++) {
1934 arg
= args
[nb_oargs
+ i
];
1935 #ifdef TCG_TARGET_STACK_GROWSUP
1936 stack_offset
-= sizeof(tcg_target_long
);
1938 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1939 ts
= &s
->temps
[arg
];
1940 if (ts
->val_type
== TEMP_VAL_REG
) {
1941 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
1942 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1943 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1945 /* XXX: not correct if reading values from the stack */
1946 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1947 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
1948 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1949 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1951 /* XXX: sign extend may be needed on some targets */
1952 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1953 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
1958 #ifndef TCG_TARGET_STACK_GROWSUP
1959 stack_offset
+= sizeof(tcg_target_long
);
1963 /* assign input registers */
1964 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1965 for(i
= 0; i
< nb_regs
; i
++) {
1966 arg
= args
[nb_oargs
+ i
];
1967 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1968 ts
= &s
->temps
[arg
];
1969 reg
= tcg_target_call_iarg_regs
[i
];
1970 tcg_reg_free(s
, reg
);
1971 if (ts
->val_type
== TEMP_VAL_REG
) {
1972 if (ts
->reg
!= reg
) {
1973 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1975 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1976 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1977 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1978 /* XXX: sign extend ? */
1979 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1983 tcg_regset_set_reg(allocated_regs
, reg
);
1987 /* assign function address */
1988 func_arg
= args
[nb_oargs
+ nb_iargs
- 1];
1989 arg_ct
= &def
->args_ct
[0];
1990 ts
= &s
->temps
[func_arg
];
1991 func_addr
= ts
->val
;
1993 if (ts
->val_type
== TEMP_VAL_MEM
) {
1994 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1995 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1997 tcg_regset_set_reg(allocated_regs
, reg
);
1998 } else if (ts
->val_type
== TEMP_VAL_REG
) {
2000 if (!tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2001 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2002 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2005 tcg_regset_set_reg(allocated_regs
, reg
);
2006 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2007 if (tcg_target_const_match(func_addr
, arg_ct
)) {
2009 func_arg
= func_addr
;
2011 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2012 tcg_out_movi(s
, ts
->type
, reg
, func_addr
);
2014 tcg_regset_set_reg(allocated_regs
, reg
);
2021 /* mark dead temporaries and free the associated registers */
2022 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2023 if (IS_DEAD_ARG(i
)) {
2024 temp_dead(s
, args
[i
]);
2028 /* clobber call registers */
2029 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2030 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2031 tcg_reg_free(s
, reg
);
2035 /* store globals and free associated registers (we assume the call
2036 can modify any global. */
2037 if (!(flags
& TCG_CALL_CONST
)) {
2038 save_globals(s
, allocated_regs
);
2041 tcg_out_op(s
, opc
, &func_arg
, &const_func_arg
);
2043 /* assign output registers and emit moves if needed */
2044 for(i
= 0; i
< nb_oargs
; i
++) {
2046 ts
= &s
->temps
[arg
];
2047 reg
= tcg_target_call_oarg_regs
[i
];
2048 assert(s
->reg_to_temp
[reg
] == -1);
2049 if (ts
->fixed_reg
) {
2050 if (ts
->reg
!= reg
) {
2051 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2054 if (IS_DEAD_ARG(i
)) {
2055 temp_dead(s
, args
[i
]);
2057 if (ts
->val_type
== TEMP_VAL_REG
) {
2058 s
->reg_to_temp
[ts
->reg
] = -1;
2060 ts
->val_type
= TEMP_VAL_REG
;
2062 ts
->mem_coherent
= 0;
2063 s
->reg_to_temp
[reg
] = arg
;
2068 return nb_iargs
+ nb_oargs
+ def
->nb_cargs
+ 1;
2071 #ifdef CONFIG_PROFILER
2073 static int64_t tcg_table_op_count
[NB_OPS
];
2075 static void dump_op_count(void)
2079 f
= fopen("/tmp/op.log", "w");
2080 for(i
= INDEX_op_end
; i
< NB_OPS
; i
++) {
2081 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, tcg_table_op_count
[i
]);
2088 static inline int tcg_gen_code_common(TCGContext
*s
, uint8_t *gen_code_buf
,
2093 const TCGOpDef
*def
;
2094 unsigned int dead_args
;
2098 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2105 #ifdef CONFIG_PROFILER
2106 s
->opt_time
-= profile_getclock();
2109 #ifdef USE_TCG_OPTIMIZATIONS
2111 tcg_optimize(s
, gen_opc_ptr
, gen_opparam_buf
, tcg_op_defs
);
2114 #ifdef CONFIG_PROFILER
2115 s
->opt_time
+= profile_getclock();
2116 s
->la_time
-= profile_getclock();
2119 tcg_liveness_analysis(s
);
2121 #ifdef CONFIG_PROFILER
2122 s
->la_time
+= profile_getclock();
2126 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2127 qemu_log("OP after optimization and liveness analysis:\n");
2133 tcg_reg_alloc_start(s
);
2135 s
->code_buf
= gen_code_buf
;
2136 s
->code_ptr
= gen_code_buf
;
2138 args
= gen_opparam_buf
;
2142 opc
= gen_opc_buf
[op_index
];
2143 #ifdef CONFIG_PROFILER
2144 tcg_table_op_count
[opc
]++;
2146 def
= &tcg_op_defs
[opc
];
2148 printf("%s: %d %d %d\n", def
->name
,
2149 def
->nb_oargs
, def
->nb_iargs
, def
->nb_cargs
);
2153 case INDEX_op_mov_i32
:
2154 case INDEX_op_mov_i64
:
2155 dead_args
= s
->op_dead_args
[op_index
];
2156 tcg_reg_alloc_mov(s
, def
, args
, dead_args
);
2158 case INDEX_op_movi_i32
:
2159 case INDEX_op_movi_i64
:
2160 tcg_reg_alloc_movi(s
, args
);
2162 case INDEX_op_debug_insn_start
:
2163 /* debug instruction */
2173 case INDEX_op_discard
:
2174 temp_dead(s
, args
[0]);
2176 case INDEX_op_set_label
:
2177 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2178 tcg_out_label(s
, args
[0], s
->code_ptr
);
2181 dead_args
= s
->op_dead_args
[op_index
];
2182 args
+= tcg_reg_alloc_call(s
, def
, opc
, args
, dead_args
);
2187 /* Sanity check that we've not introduced any unhandled opcodes. */
2188 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2191 /* Note: in order to speed up the code, it would be much
2192 faster to have specialized register allocator functions for
2193 some common argument patterns */
2194 dead_args
= s
->op_dead_args
[op_index
];
2195 tcg_reg_alloc_op(s
, def
, opc
, args
, dead_args
);
2198 args
+= def
->nb_args
;
2200 if (search_pc
>= 0 && search_pc
< s
->code_ptr
- gen_code_buf
) {
2212 int tcg_gen_code(TCGContext
*s
, uint8_t *gen_code_buf
)
2214 #ifdef CONFIG_PROFILER
2217 n
= (gen_opc_ptr
- gen_opc_buf
);
2219 if (n
> s
->op_count_max
)
2220 s
->op_count_max
= n
;
2222 s
->temp_count
+= s
->nb_temps
;
2223 if (s
->nb_temps
> s
->temp_count_max
)
2224 s
->temp_count_max
= s
->nb_temps
;
2228 tcg_gen_code_common(s
, gen_code_buf
, -1);
2230 /* flush instruction cache */
2231 flush_icache_range((tcg_target_ulong
)gen_code_buf
,
2232 (tcg_target_ulong
)s
->code_ptr
);
2234 return s
->code_ptr
- gen_code_buf
;
2237 /* Return the index of the micro operation such as the pc after is <
2238 offset bytes from the start of the TB. The contents of gen_code_buf must
2239 not be changed, though writing the same values is ok.
2240 Return -1 if not found. */
2241 int tcg_gen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
, long offset
)
2243 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2246 #ifdef CONFIG_PROFILER
2247 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2249 TCGContext
*s
= &tcg_ctx
;
2252 tot
= s
->interm_time
+ s
->code_time
;
2253 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2255 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2257 s
->tb_count1
- s
->tb_count
,
2258 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2259 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2260 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2261 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2263 (double)s
->del_op_count
/ s
->tb_count
: 0);
2264 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2266 (double)s
->temp_count
/ s
->tb_count
: 0,
2269 cpu_fprintf(f
, "cycles/op %0.1f\n",
2270 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2271 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2272 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2273 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2274 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2277 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2278 (double)s
->interm_time
/ tot
* 100.0);
2279 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2280 (double)s
->code_time
/ tot
* 100.0);
2281 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2282 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2284 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2285 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2286 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2288 cpu_fprintf(f
, " avg cycles %0.1f\n",
2289 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2294 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2296 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2300 #ifdef ELF_HOST_MACHINE
2301 /* In order to use this feature, the backend needs to do three things:
2303 (1) Define ELF_HOST_MACHINE to indicate both what value to
2304 put into the ELF image and to indicate support for the feature.
2306 (2) Define tcg_register_jit. This should create a buffer containing
2307 the contents of a .debug_frame section that describes the post-
2308 prologue unwind info for the tcg machine.
2310 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2313 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2320 struct jit_code_entry
{
2321 struct jit_code_entry
*next_entry
;
2322 struct jit_code_entry
*prev_entry
;
2323 const void *symfile_addr
;
2324 uint64_t symfile_size
;
2327 struct jit_descriptor
{
2329 uint32_t action_flag
;
2330 struct jit_code_entry
*relevant_entry
;
2331 struct jit_code_entry
*first_entry
;
2334 void __jit_debug_register_code(void) __attribute__((noinline
));
2335 void __jit_debug_register_code(void)
2340 /* Must statically initialize the version, because GDB may check
2341 the version before we can set it. */
2342 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2344 /* End GDB interface. */
2346 static int find_string(const char *strtab
, const char *str
)
2348 const char *p
= strtab
+ 1;
2351 if (strcmp(p
, str
) == 0) {
2358 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2359 void *debug_frame
, size_t debug_frame_size
)
2361 struct __attribute__((packed
)) DebugInfo
{
2368 uintptr_t cu_low_pc
;
2369 uintptr_t cu_high_pc
;
2372 uintptr_t fn_low_pc
;
2373 uintptr_t fn_high_pc
;
2382 struct DebugInfo di
;
2387 struct ElfImage
*img
;
2389 static const struct ElfImage img_template
= {
2391 .e_ident
[EI_MAG0
] = ELFMAG0
,
2392 .e_ident
[EI_MAG1
] = ELFMAG1
,
2393 .e_ident
[EI_MAG2
] = ELFMAG2
,
2394 .e_ident
[EI_MAG3
] = ELFMAG3
,
2395 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2396 .e_ident
[EI_DATA
] = ELF_DATA
,
2397 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2399 .e_machine
= ELF_HOST_MACHINE
,
2400 .e_version
= EV_CURRENT
,
2401 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2402 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2403 .e_ehsize
= sizeof(ElfW(Shdr
)),
2404 .e_phentsize
= sizeof(ElfW(Phdr
)),
2406 .e_shentsize
= sizeof(ElfW(Shdr
)),
2407 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2408 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2409 #ifdef ELF_HOST_FLAGS
2410 .e_flags
= ELF_HOST_FLAGS
,
2413 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2421 [0] = { .sh_type
= SHT_NULL
},
2422 /* Trick: The contents of code_gen_buffer are not present in
2423 this fake ELF file; that got allocated elsewhere. Therefore
2424 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2425 will not look for contents. We can record any address. */
2427 .sh_type
= SHT_NOBITS
,
2428 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2430 [2] = { /* .debug_info */
2431 .sh_type
= SHT_PROGBITS
,
2432 .sh_offset
= offsetof(struct ElfImage
, di
),
2433 .sh_size
= sizeof(struct DebugInfo
),
2435 [3] = { /* .debug_abbrev */
2436 .sh_type
= SHT_PROGBITS
,
2437 .sh_offset
= offsetof(struct ElfImage
, da
),
2438 .sh_size
= sizeof(img
->da
),
2440 [4] = { /* .debug_frame */
2441 .sh_type
= SHT_PROGBITS
,
2442 .sh_offset
= sizeof(struct ElfImage
),
2444 [5] = { /* .symtab */
2445 .sh_type
= SHT_SYMTAB
,
2446 .sh_offset
= offsetof(struct ElfImage
, sym
),
2447 .sh_size
= sizeof(img
->sym
),
2449 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2450 .sh_entsize
= sizeof(ElfW(Sym
)),
2452 [6] = { /* .strtab */
2453 .sh_type
= SHT_STRTAB
,
2454 .sh_offset
= offsetof(struct ElfImage
, str
),
2455 .sh_size
= sizeof(img
->str
),
2459 [1] = { /* code_gen_buffer */
2460 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2465 .len
= sizeof(struct DebugInfo
) - 4,
2467 .ptr_size
= sizeof(void *),
2469 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2471 .fn_name
= "code_gen_buffer"
2474 1, /* abbrev number (the cu) */
2475 0x11, 1, /* DW_TAG_compile_unit, has children */
2476 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2477 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2478 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2479 0, 0, /* end of abbrev */
2480 2, /* abbrev number (the fn) */
2481 0x2e, 0, /* DW_TAG_subprogram, no children */
2482 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2483 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2484 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2485 0, 0, /* end of abbrev */
2486 0 /* no more abbrev */
2488 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2489 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2492 /* We only need a single jit entry; statically allocate it. */
2493 static struct jit_code_entry one_entry
;
2495 uintptr_t buf
= (uintptr_t)buf_ptr
;
2496 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2498 img
= g_malloc(img_size
);
2499 *img
= img_template
;
2500 memcpy(img
+ 1, debug_frame
, debug_frame_size
);
2502 img
->phdr
.p_vaddr
= buf
;
2503 img
->phdr
.p_paddr
= buf
;
2504 img
->phdr
.p_memsz
= buf_size
;
2506 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2507 img
->shdr
[1].sh_addr
= buf
;
2508 img
->shdr
[1].sh_size
= buf_size
;
2510 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2511 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2513 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2514 img
->shdr
[4].sh_size
= debug_frame_size
;
2516 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2517 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2519 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2520 img
->sym
[1].st_value
= buf
;
2521 img
->sym
[1].st_size
= buf_size
;
2523 img
->di
.cu_low_pc
= buf
;
2524 img
->di
.cu_high_pc
= buf_size
;
2525 img
->di
.fn_low_pc
= buf
;
2526 img
->di
.fn_high_pc
= buf_size
;
2529 /* Enable this block to be able to debug the ELF image file creation.
2530 One can use readelf, objdump, or other inspection utilities. */
2532 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2534 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2535 /* Avoid stupid unused return value warning for fwrite. */
2542 one_entry
.symfile_addr
= img
;
2543 one_entry
.symfile_size
= img_size
;
2545 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2546 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2547 __jit_debug_descriptor
.first_entry
= &one_entry
;
2548 __jit_debug_register_code();
2551 /* No support for the feature. Provide the entry point expected by exec.c,
2552 and implement the internal function we declared earlier. */
2554 static void tcg_register_jit_int(void *buf
, size_t size
,
2555 void *debug_frame
, size_t debug_frame_size
)
2559 void tcg_register_jit(void *buf
, size_t buf_size
)
2562 #endif /* ELF_HOST_MACHINE */