2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "cache-utils.h"
41 #include "host-utils.h"
42 #include "qemu-timer.h"
44 /* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
47 #define NO_CPU_IO_DEFS
52 #if TCG_TARGET_REG_BITS == 64
53 # define ELF_CLASS ELFCLASS64
55 # define ELF_CLASS ELFCLASS32
57 #ifdef HOST_WORDS_BIGENDIAN
58 # define ELF_DATA ELFDATA2MSB
60 # define ELF_DATA ELFDATA2LSB
65 /* Forward declarations for functions declared in tcg-target.c and used here. */
66 static void tcg_target_init(TCGContext
*s
);
67 static void tcg_target_qemu_prologue(TCGContext
*s
);
68 static void patch_reloc(uint8_t *code_ptr
, int type
,
69 tcg_target_long value
, tcg_target_long addend
);
71 static void tcg_register_jit_int(void *buf
, size_t size
,
72 void *debug_frame
, size_t debug_frame_size
)
73 __attribute__((unused
));
75 /* Forward declarations for functions declared and used in tcg-target.c. */
76 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
77 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
78 tcg_target_long arg2
);
79 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
80 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
81 TCGReg ret
, tcg_target_long arg
);
82 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
83 const int *const_args
);
84 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
85 tcg_target_long arg2
);
86 static int tcg_target_const_match(tcg_target_long val
,
87 const TCGArgConstraint
*arg_ct
);
89 TCGOpDef tcg_op_defs
[] = {
90 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
94 const size_t tcg_op_defs_max
= ARRAY_SIZE(tcg_op_defs
);
96 static TCGRegSet tcg_target_available_regs
[2];
97 static TCGRegSet tcg_target_call_clobber_regs
;
99 /* XXX: move that inside the context */
100 uint16_t *gen_opc_ptr
;
101 TCGArg
*gen_opparam_ptr
;
103 static inline void tcg_out8(TCGContext
*s
, uint8_t v
)
108 static inline void tcg_out16(TCGContext
*s
, uint16_t v
)
110 *(uint16_t *)s
->code_ptr
= v
;
114 static inline void tcg_out32(TCGContext
*s
, uint32_t v
)
116 *(uint32_t *)s
->code_ptr
= v
;
120 /* label relocation processing */
122 static void tcg_out_reloc(TCGContext
*s
, uint8_t *code_ptr
, int type
,
123 int label_index
, long addend
)
128 l
= &s
->labels
[label_index
];
130 /* FIXME: This may break relocations on RISC targets that
131 modify instruction fields in place. The caller may not have
132 written the initial value. */
133 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
135 /* add a new relocation entry */
136 r
= tcg_malloc(sizeof(TCGRelocation
));
140 r
->next
= l
->u
.first_reloc
;
141 l
->u
.first_reloc
= r
;
145 static void tcg_out_label(TCGContext
*s
, int label_index
, void *ptr
)
149 tcg_target_long value
= (tcg_target_long
)ptr
;
151 l
= &s
->labels
[label_index
];
154 r
= l
->u
.first_reloc
;
156 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
163 int gen_new_label(void)
165 TCGContext
*s
= &tcg_ctx
;
169 if (s
->nb_labels
>= TCG_MAX_LABELS
)
171 idx
= s
->nb_labels
++;
174 l
->u
.first_reloc
= NULL
;
178 #include "tcg-target.c"
180 /* pool based memory allocation */
181 void *tcg_malloc_internal(TCGContext
*s
, int size
)
186 if (size
> TCG_POOL_CHUNK_SIZE
) {
187 /* big malloc: insert a new pool (XXX: could optimize) */
188 p
= g_malloc(sizeof(TCGPool
) + size
);
190 p
->next
= s
->pool_first_large
;
191 s
->pool_first_large
= p
;
202 pool_size
= TCG_POOL_CHUNK_SIZE
;
203 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
207 s
->pool_current
->next
= p
;
216 s
->pool_cur
= p
->data
+ size
;
217 s
->pool_end
= p
->data
+ p
->size
;
221 void tcg_pool_reset(TCGContext
*s
)
224 for (p
= s
->pool_first_large
; p
; p
= t
) {
228 s
->pool_first_large
= NULL
;
229 s
->pool_cur
= s
->pool_end
= NULL
;
230 s
->pool_current
= NULL
;
233 void tcg_context_init(TCGContext
*s
)
235 int op
, total_args
, n
;
237 TCGArgConstraint
*args_ct
;
240 memset(s
, 0, sizeof(*s
));
243 /* Count total number of arguments and allocate the corresponding
246 for(op
= 0; op
< NB_OPS
; op
++) {
247 def
= &tcg_op_defs
[op
];
248 n
= def
->nb_iargs
+ def
->nb_oargs
;
252 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
253 sorted_args
= g_malloc(sizeof(int) * total_args
);
255 for(op
= 0; op
< NB_OPS
; op
++) {
256 def
= &tcg_op_defs
[op
];
257 def
->args_ct
= args_ct
;
258 def
->sorted_args
= sorted_args
;
259 n
= def
->nb_iargs
+ def
->nb_oargs
;
267 void tcg_prologue_init(TCGContext
*s
)
269 /* init global prologue and epilogue */
270 s
->code_buf
= code_gen_prologue
;
271 s
->code_ptr
= s
->code_buf
;
272 tcg_target_qemu_prologue(s
);
273 flush_icache_range((tcg_target_ulong
)s
->code_buf
,
274 (tcg_target_ulong
)s
->code_ptr
);
277 void tcg_set_frame(TCGContext
*s
, int reg
,
278 tcg_target_long start
, tcg_target_long size
)
280 s
->frame_start
= start
;
281 s
->frame_end
= start
+ size
;
285 void tcg_func_start(TCGContext
*s
)
289 s
->nb_temps
= s
->nb_globals
;
290 for(i
= 0; i
< (TCG_TYPE_COUNT
* 2); i
++)
291 s
->first_free_temp
[i
] = -1;
292 s
->labels
= tcg_malloc(sizeof(TCGLabel
) * TCG_MAX_LABELS
);
294 s
->current_frame_offset
= s
->frame_start
;
296 #ifdef CONFIG_DEBUG_TCG
297 s
->goto_tb_issue_mask
= 0;
300 gen_opc_ptr
= gen_opc_buf
;
301 gen_opparam_ptr
= gen_opparam_buf
;
304 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
306 if (n
> TCG_MAX_TEMPS
)
310 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
313 TCGContext
*s
= &tcg_ctx
;
317 #if TCG_TARGET_REG_BITS == 32
318 if (type
!= TCG_TYPE_I32
)
321 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
324 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
325 ts
= &s
->temps
[s
->nb_globals
];
326 ts
->base_type
= type
;
332 tcg_regset_set_reg(s
->reserved_regs
, reg
);
336 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
340 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
341 return MAKE_TCGV_I32(idx
);
344 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
348 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
349 return MAKE_TCGV_I64(idx
);
352 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
353 tcg_target_long offset
,
356 TCGContext
*s
= &tcg_ctx
;
361 #if TCG_TARGET_REG_BITS == 32
362 if (type
== TCG_TYPE_I64
) {
364 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
365 ts
= &s
->temps
[s
->nb_globals
];
366 ts
->base_type
= type
;
367 ts
->type
= TCG_TYPE_I32
;
369 ts
->mem_allocated
= 1;
371 #ifdef TCG_TARGET_WORDS_BIGENDIAN
372 ts
->mem_offset
= offset
+ 4;
374 ts
->mem_offset
= offset
;
376 pstrcpy(buf
, sizeof(buf
), name
);
377 pstrcat(buf
, sizeof(buf
), "_0");
378 ts
->name
= strdup(buf
);
381 ts
->base_type
= type
;
382 ts
->type
= TCG_TYPE_I32
;
384 ts
->mem_allocated
= 1;
386 #ifdef TCG_TARGET_WORDS_BIGENDIAN
387 ts
->mem_offset
= offset
;
389 ts
->mem_offset
= offset
+ 4;
391 pstrcpy(buf
, sizeof(buf
), name
);
392 pstrcat(buf
, sizeof(buf
), "_1");
393 ts
->name
= strdup(buf
);
399 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
400 ts
= &s
->temps
[s
->nb_globals
];
401 ts
->base_type
= type
;
404 ts
->mem_allocated
= 1;
406 ts
->mem_offset
= offset
;
413 TCGv_i32
tcg_global_mem_new_i32(int reg
, tcg_target_long offset
,
418 idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
419 return MAKE_TCGV_I32(idx
);
422 TCGv_i64
tcg_global_mem_new_i64(int reg
, tcg_target_long offset
,
427 idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
428 return MAKE_TCGV_I64(idx
);
431 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
433 TCGContext
*s
= &tcg_ctx
;
440 idx
= s
->first_free_temp
[k
];
442 /* There is already an available temp with the
445 s
->first_free_temp
[k
] = ts
->next_free_temp
;
446 ts
->temp_allocated
= 1;
447 assert(ts
->temp_local
== temp_local
);
450 #if TCG_TARGET_REG_BITS == 32
451 if (type
== TCG_TYPE_I64
) {
452 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
453 ts
= &s
->temps
[s
->nb_temps
];
454 ts
->base_type
= type
;
455 ts
->type
= TCG_TYPE_I32
;
456 ts
->temp_allocated
= 1;
457 ts
->temp_local
= temp_local
;
460 ts
->base_type
= TCG_TYPE_I32
;
461 ts
->type
= TCG_TYPE_I32
;
462 ts
->temp_allocated
= 1;
463 ts
->temp_local
= temp_local
;
469 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
470 ts
= &s
->temps
[s
->nb_temps
];
471 ts
->base_type
= type
;
473 ts
->temp_allocated
= 1;
474 ts
->temp_local
= temp_local
;
480 #if defined(CONFIG_DEBUG_TCG)
486 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
490 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
491 return MAKE_TCGV_I32(idx
);
494 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
498 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
499 return MAKE_TCGV_I64(idx
);
502 static inline void tcg_temp_free_internal(int idx
)
504 TCGContext
*s
= &tcg_ctx
;
508 #if defined(CONFIG_DEBUG_TCG)
510 if (s
->temps_in_use
< 0) {
511 fprintf(stderr
, "More temporaries freed than allocated!\n");
515 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
517 assert(ts
->temp_allocated
!= 0);
518 ts
->temp_allocated
= 0;
522 ts
->next_free_temp
= s
->first_free_temp
[k
];
523 s
->first_free_temp
[k
] = idx
;
526 void tcg_temp_free_i32(TCGv_i32 arg
)
528 tcg_temp_free_internal(GET_TCGV_I32(arg
));
531 void tcg_temp_free_i64(TCGv_i64 arg
)
533 tcg_temp_free_internal(GET_TCGV_I64(arg
));
536 TCGv_i32
tcg_const_i32(int32_t val
)
539 t0
= tcg_temp_new_i32();
540 tcg_gen_movi_i32(t0
, val
);
544 TCGv_i64
tcg_const_i64(int64_t val
)
547 t0
= tcg_temp_new_i64();
548 tcg_gen_movi_i64(t0
, val
);
552 TCGv_i32
tcg_const_local_i32(int32_t val
)
555 t0
= tcg_temp_local_new_i32();
556 tcg_gen_movi_i32(t0
, val
);
560 TCGv_i64
tcg_const_local_i64(int64_t val
)
563 t0
= tcg_temp_local_new_i64();
564 tcg_gen_movi_i64(t0
, val
);
568 #if defined(CONFIG_DEBUG_TCG)
569 void tcg_clear_temp_count(void)
571 TCGContext
*s
= &tcg_ctx
;
575 int tcg_check_temp_count(void)
577 TCGContext
*s
= &tcg_ctx
;
578 if (s
->temps_in_use
) {
579 /* Clear the count so that we don't give another
580 * warning immediately next time around.
589 void tcg_register_helper(void *func
, const char *name
)
591 TCGContext
*s
= &tcg_ctx
;
593 if ((s
->nb_helpers
+ 1) > s
->allocated_helpers
) {
594 n
= s
->allocated_helpers
;
600 s
->helpers
= realloc(s
->helpers
, n
* sizeof(TCGHelperInfo
));
601 s
->allocated_helpers
= n
;
603 s
->helpers
[s
->nb_helpers
].func
= (tcg_target_ulong
)func
;
604 s
->helpers
[s
->nb_helpers
].name
= name
;
608 /* Note: we convert the 64 bit args to 32 bit and do some alignment
609 and endian swap. Maybe it would be better to do the alignment
610 and endian swap in tcg_reg_alloc_call(). */
611 void tcg_gen_callN(TCGContext
*s
, TCGv_ptr func
, unsigned int flags
,
612 int sizemask
, TCGArg ret
, int nargs
, TCGArg
*args
)
619 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
620 for (i
= 0; i
< nargs
; ++i
) {
621 int is_64bit
= sizemask
& (1 << (i
+1)*2);
622 int is_signed
= sizemask
& (2 << (i
+1)*2);
624 TCGv_i64 temp
= tcg_temp_new_i64();
625 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
627 tcg_gen_ext32s_i64(temp
, orig
);
629 tcg_gen_ext32u_i64(temp
, orig
);
631 args
[i
] = GET_TCGV_I64(temp
);
634 #endif /* TCG_TARGET_EXTEND_ARGS */
636 *gen_opc_ptr
++ = INDEX_op_call
;
637 nparam
= gen_opparam_ptr
++;
638 if (ret
!= TCG_CALL_DUMMY_ARG
) {
639 #if TCG_TARGET_REG_BITS < 64
641 #ifdef TCG_TARGET_WORDS_BIGENDIAN
642 *gen_opparam_ptr
++ = ret
+ 1;
643 *gen_opparam_ptr
++ = ret
;
645 *gen_opparam_ptr
++ = ret
;
646 *gen_opparam_ptr
++ = ret
+ 1;
652 *gen_opparam_ptr
++ = ret
;
659 for (i
= 0; i
< nargs
; i
++) {
660 #if TCG_TARGET_REG_BITS < 64
661 int is_64bit
= sizemask
& (1 << (i
+1)*2);
663 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
664 /* some targets want aligned 64 bit args */
666 *gen_opparam_ptr
++ = TCG_CALL_DUMMY_ARG
;
670 /* If stack grows up, then we will be placing successive
671 arguments at lower addresses, which means we need to
672 reverse the order compared to how we would normally
673 treat either big or little-endian. For those arguments
674 that will wind up in registers, this still works for
675 HPPA (the only current STACK_GROWSUP target) since the
676 argument registers are *also* allocated in decreasing
677 order. If another such target is added, this logic may
678 have to get more complicated to differentiate between
679 stack arguments and register arguments. */
680 #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
681 *gen_opparam_ptr
++ = args
[i
] + 1;
682 *gen_opparam_ptr
++ = args
[i
];
684 *gen_opparam_ptr
++ = args
[i
];
685 *gen_opparam_ptr
++ = args
[i
] + 1;
690 #endif /* TCG_TARGET_REG_BITS < 64 */
692 *gen_opparam_ptr
++ = args
[i
];
695 *gen_opparam_ptr
++ = GET_TCGV_PTR(func
);
697 *gen_opparam_ptr
++ = flags
;
699 *nparam
= (nb_rets
<< 16) | (real_args
+ 1);
701 /* total parameters, needed to go backward in the instruction stream */
702 *gen_opparam_ptr
++ = 1 + nb_rets
+ real_args
+ 3;
704 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
705 for (i
= 0; i
< nargs
; ++i
) {
706 int is_64bit
= sizemask
& (1 << (i
+1)*2);
708 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
709 tcg_temp_free_i64(temp
);
712 #endif /* TCG_TARGET_EXTEND_ARGS */
715 #if TCG_TARGET_REG_BITS == 32
716 void tcg_gen_shifti_i64(TCGv_i64 ret
, TCGv_i64 arg1
,
717 int c
, int right
, int arith
)
720 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
));
721 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
));
722 } else if (c
>= 32) {
726 tcg_gen_sari_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
727 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), 31);
729 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
730 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
733 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_LOW(arg1
), c
);
734 tcg_gen_movi_i32(TCGV_LOW(ret
), 0);
739 t0
= tcg_temp_new_i32();
740 t1
= tcg_temp_new_i32();
742 tcg_gen_shli_i32(t0
, TCGV_HIGH(arg1
), 32 - c
);
744 tcg_gen_sari_i32(t1
, TCGV_HIGH(arg1
), c
);
746 tcg_gen_shri_i32(t1
, TCGV_HIGH(arg1
), c
);
747 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), c
);
748 tcg_gen_or_i32(TCGV_LOW(ret
), TCGV_LOW(ret
), t0
);
749 tcg_gen_mov_i32(TCGV_HIGH(ret
), t1
);
751 tcg_gen_shri_i32(t0
, TCGV_LOW(arg1
), 32 - c
);
752 /* Note: ret can be the same as arg1, so we use t1 */
753 tcg_gen_shli_i32(t1
, TCGV_LOW(arg1
), c
);
754 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), c
);
755 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), t0
);
756 tcg_gen_mov_i32(TCGV_LOW(ret
), t1
);
758 tcg_temp_free_i32(t0
);
759 tcg_temp_free_i32(t1
);
765 static void tcg_reg_alloc_start(TCGContext
*s
)
769 for(i
= 0; i
< s
->nb_globals
; i
++) {
772 ts
->val_type
= TEMP_VAL_REG
;
774 ts
->val_type
= TEMP_VAL_MEM
;
777 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
779 if (ts
->temp_local
) {
780 ts
->val_type
= TEMP_VAL_MEM
;
782 ts
->val_type
= TEMP_VAL_DEAD
;
784 ts
->mem_allocated
= 0;
787 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
788 s
->reg_to_temp
[i
] = -1;
792 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
797 assert(idx
>= 0 && idx
< s
->nb_temps
);
800 if (idx
< s
->nb_globals
) {
801 pstrcpy(buf
, buf_size
, ts
->name
);
804 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
806 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
811 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
813 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
816 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
818 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
821 static int helper_cmp(const void *p1
, const void *p2
)
823 const TCGHelperInfo
*th1
= p1
;
824 const TCGHelperInfo
*th2
= p2
;
825 if (th1
->func
< th2
->func
)
827 else if (th1
->func
== th2
->func
)
833 /* find helper definition (Note: A hash table would be better) */
834 static TCGHelperInfo
*tcg_find_helper(TCGContext
*s
, tcg_target_ulong val
)
840 if (unlikely(!s
->helpers_sorted
)) {
841 qsort(s
->helpers
, s
->nb_helpers
, sizeof(TCGHelperInfo
),
843 s
->helpers_sorted
= 1;
848 m_max
= s
->nb_helpers
- 1;
849 while (m_min
<= m_max
) {
850 m
= (m_min
+ m_max
) >> 1;
864 static const char * const cond_name
[] =
866 [TCG_COND_NEVER
] = "never",
867 [TCG_COND_ALWAYS
] = "always",
868 [TCG_COND_EQ
] = "eq",
869 [TCG_COND_NE
] = "ne",
870 [TCG_COND_LT
] = "lt",
871 [TCG_COND_GE
] = "ge",
872 [TCG_COND_LE
] = "le",
873 [TCG_COND_GT
] = "gt",
874 [TCG_COND_LTU
] = "ltu",
875 [TCG_COND_GEU
] = "geu",
876 [TCG_COND_LEU
] = "leu",
877 [TCG_COND_GTU
] = "gtu"
880 void tcg_dump_ops(TCGContext
*s
)
882 const uint16_t *opc_ptr
;
886 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
, first_insn
;
891 opc_ptr
= gen_opc_buf
;
892 args
= gen_opparam_buf
;
893 while (opc_ptr
< gen_opc_ptr
) {
895 def
= &tcg_op_defs
[c
];
896 if (c
== INDEX_op_debug_insn_start
) {
898 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
899 pc
= ((uint64_t)args
[1] << 32) | args
[0];
906 qemu_log(" ---- 0x%" PRIx64
, pc
);
908 nb_oargs
= def
->nb_oargs
;
909 nb_iargs
= def
->nb_iargs
;
910 nb_cargs
= def
->nb_cargs
;
911 } else if (c
== INDEX_op_call
) {
914 /* variable number of arguments */
916 nb_oargs
= arg
>> 16;
917 nb_iargs
= arg
& 0xffff;
918 nb_cargs
= def
->nb_cargs
;
920 qemu_log(" %s ", def
->name
);
924 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
925 args
[nb_oargs
+ nb_iargs
- 1]));
927 qemu_log(",$0x%" TCG_PRIlx
, args
[nb_oargs
+ nb_iargs
]);
929 qemu_log(",$%d", nb_oargs
);
930 for(i
= 0; i
< nb_oargs
; i
++) {
932 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
935 for(i
= 0; i
< (nb_iargs
- 1); i
++) {
937 if (args
[nb_oargs
+ i
] == TCG_CALL_DUMMY_ARG
) {
940 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
941 args
[nb_oargs
+ i
]));
944 } else if (c
== INDEX_op_movi_i32
|| c
== INDEX_op_movi_i64
) {
945 tcg_target_ulong val
;
948 nb_oargs
= def
->nb_oargs
;
949 nb_iargs
= def
->nb_iargs
;
950 nb_cargs
= def
->nb_cargs
;
951 qemu_log(" %s %s,$", def
->name
,
952 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[0]));
954 th
= tcg_find_helper(s
, val
);
956 qemu_log("%s", th
->name
);
958 if (c
== INDEX_op_movi_i32
) {
959 qemu_log("0x%x", (uint32_t)val
);
961 qemu_log("0x%" PRIx64
, (uint64_t)val
);
965 qemu_log(" %s ", def
->name
);
966 if (c
== INDEX_op_nopn
) {
967 /* variable number of arguments */
972 nb_oargs
= def
->nb_oargs
;
973 nb_iargs
= def
->nb_iargs
;
974 nb_cargs
= def
->nb_cargs
;
978 for(i
= 0; i
< nb_oargs
; i
++) {
982 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
985 for(i
= 0; i
< nb_iargs
; i
++) {
989 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
993 case INDEX_op_brcond_i32
:
994 case INDEX_op_setcond_i32
:
995 case INDEX_op_movcond_i32
:
996 case INDEX_op_brcond2_i32
:
997 case INDEX_op_setcond2_i32
:
998 case INDEX_op_brcond_i64
:
999 case INDEX_op_setcond_i64
:
1000 case INDEX_op_movcond_i64
:
1001 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
1002 qemu_log(",%s", cond_name
[args
[k
++]]);
1004 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1012 for(; i
< nb_cargs
; i
++) {
1017 qemu_log("$0x%" TCG_PRIlx
, arg
);
1021 args
+= nb_iargs
+ nb_oargs
+ nb_cargs
;
1025 /* we give more priority to constraints with less registers */
1026 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1028 const TCGArgConstraint
*arg_ct
;
1031 arg_ct
= &def
->args_ct
[k
];
1032 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1033 /* an alias is equivalent to a single register */
1036 if (!(arg_ct
->ct
& TCG_CT_REG
))
1039 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1040 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1044 return TCG_TARGET_NB_REGS
- n
+ 1;
1047 /* sort from highest priority to lowest */
1048 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1050 int i
, j
, p1
, p2
, tmp
;
1052 for(i
= 0; i
< n
; i
++)
1053 def
->sorted_args
[start
+ i
] = start
+ i
;
1056 for(i
= 0; i
< n
- 1; i
++) {
1057 for(j
= i
+ 1; j
< n
; j
++) {
1058 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1059 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1061 tmp
= def
->sorted_args
[start
+ i
];
1062 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1063 def
->sorted_args
[start
+ j
] = tmp
;
1069 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1077 if (tdefs
->op
== (TCGOpcode
)-1)
1080 assert((unsigned)op
< NB_OPS
);
1081 def
= &tcg_op_defs
[op
];
1082 #if defined(CONFIG_DEBUG_TCG)
1083 /* Duplicate entry in op definitions? */
1087 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1088 for(i
= 0; i
< nb_args
; i
++) {
1089 ct_str
= tdefs
->args_ct_str
[i
];
1090 /* Incomplete TCGTargetOpDef entry? */
1091 assert(ct_str
!= NULL
);
1092 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1093 def
->args_ct
[i
].ct
= 0;
1094 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1096 oarg
= ct_str
[0] - '0';
1097 assert(oarg
< def
->nb_oargs
);
1098 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1099 /* TCG_CT_ALIAS is for the output arguments. The input
1100 argument is tagged with TCG_CT_IALIAS. */
1101 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1102 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1103 def
->args_ct
[oarg
].alias_index
= i
;
1104 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1105 def
->args_ct
[i
].alias_index
= oarg
;
1108 if (*ct_str
== '\0')
1112 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1116 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1117 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1118 ct_str
, i
, def
->name
);
1126 /* TCGTargetOpDef entry with too much information? */
1127 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1129 /* sort the constraints (XXX: this is just an heuristic) */
1130 sort_constraints(def
, 0, def
->nb_oargs
);
1131 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1137 printf("%s: sorted=", def
->name
);
1138 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1139 printf(" %d", def
->sorted_args
[i
]);
1146 #if defined(CONFIG_DEBUG_TCG)
1148 for (op
= 0; op
< ARRAY_SIZE(tcg_op_defs
); op
++) {
1149 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1150 if (op
< INDEX_op_call
1151 || op
== INDEX_op_debug_insn_start
1152 || (def
->flags
& TCG_OPF_NOT_PRESENT
)) {
1153 /* Wrong entry in op definitions? */
1155 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1159 /* Missing entry in op definitions? */
1161 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1172 #ifdef USE_LIVENESS_ANALYSIS
1174 /* set a nop for an operation using 'nb_args' */
1175 static inline void tcg_set_nop(TCGContext
*s
, uint16_t *opc_ptr
,
1176 TCGArg
*args
, int nb_args
)
1179 *opc_ptr
= INDEX_op_nop
;
1181 *opc_ptr
= INDEX_op_nopn
;
1183 args
[nb_args
- 1] = nb_args
;
1187 /* liveness analysis: end of function: all temps are dead, and globals
1188 should be in memory. */
1189 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
,
1192 memset(dead_temps
, 1, s
->nb_temps
);
1193 memset(mem_temps
, 1, s
->nb_globals
);
1194 memset(mem_temps
+ s
->nb_globals
, 0, s
->nb_temps
- s
->nb_globals
);
1197 /* liveness analysis: end of basic block: all temps are dead, globals
1198 and local temps should be in memory. */
1199 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
,
1204 memset(dead_temps
, 1, s
->nb_temps
);
1205 memset(mem_temps
, 1, s
->nb_globals
);
1206 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1207 mem_temps
[i
] = s
->temps
[i
].temp_local
;
1211 /* Liveness analysis : update the opc_dead_args array to tell if a
1212 given input arguments is dead. Instructions updating dead
1213 temporaries are removed. */
1214 static void tcg_liveness_analysis(TCGContext
*s
)
1216 int i
, op_index
, nb_args
, nb_iargs
, nb_oargs
, arg
, nb_ops
;
1219 const TCGOpDef
*def
;
1220 uint8_t *dead_temps
, *mem_temps
;
1224 gen_opc_ptr
++; /* skip end */
1226 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
1228 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1229 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1231 dead_temps
= tcg_malloc(s
->nb_temps
);
1232 mem_temps
= tcg_malloc(s
->nb_temps
);
1233 tcg_la_func_end(s
, dead_temps
, mem_temps
);
1235 args
= gen_opparam_ptr
;
1236 op_index
= nb_ops
- 1;
1237 while (op_index
>= 0) {
1238 op
= gen_opc_buf
[op_index
];
1239 def
= &tcg_op_defs
[op
];
1247 nb_iargs
= args
[0] & 0xffff;
1248 nb_oargs
= args
[0] >> 16;
1250 call_flags
= args
[nb_oargs
+ nb_iargs
];
1252 /* pure functions can be removed if their result is not
1254 if (call_flags
& TCG_CALL_PURE
) {
1255 for(i
= 0; i
< nb_oargs
; i
++) {
1257 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1258 goto do_not_remove_call
;
1261 tcg_set_nop(s
, gen_opc_buf
+ op_index
,
1266 /* output args are dead */
1269 for(i
= 0; i
< nb_oargs
; i
++) {
1271 if (dead_temps
[arg
]) {
1272 dead_args
|= (1 << i
);
1274 if (mem_temps
[arg
]) {
1275 sync_args
|= (1 << i
);
1277 dead_temps
[arg
] = 1;
1281 if (!(call_flags
& TCG_CALL_CONST
)) {
1282 /* globals should go back to memory */
1283 memset(dead_temps
, 1, s
->nb_globals
);
1284 memset(mem_temps
, 1, s
->nb_globals
);
1287 /* input args are live */
1288 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1290 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1291 if (dead_temps
[arg
]) {
1292 dead_args
|= (1 << i
);
1294 dead_temps
[arg
] = 0;
1297 s
->op_dead_args
[op_index
] = dead_args
;
1298 s
->op_sync_args
[op_index
] = sync_args
;
1303 case INDEX_op_debug_insn_start
:
1304 args
-= def
->nb_args
;
1310 case INDEX_op_discard
:
1312 /* mark the temporary as dead */
1313 dead_temps
[args
[0]] = 1;
1314 mem_temps
[args
[0]] = 0;
1319 case INDEX_op_add2_i32
:
1320 case INDEX_op_sub2_i32
:
1324 /* Test if the high part of the operation is dead, but not
1325 the low part. The result can be optimized to a simple
1326 add or sub. This happens often for x86_64 guest when the
1327 cpu mode is set to 32 bit. */
1328 if (dead_temps
[args
[1]]) {
1329 if (dead_temps
[args
[0]]) {
1332 /* Create the single operation plus nop. */
1333 if (op
== INDEX_op_add2_i32
) {
1334 op
= INDEX_op_add_i32
;
1336 op
= INDEX_op_sub_i32
;
1338 gen_opc_buf
[op_index
] = op
;
1341 assert(gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1342 tcg_set_nop(s
, gen_opc_buf
+ op_index
+ 1, args
+ 3, 3);
1343 /* Fall through and mark the single-word operation live. */
1349 case INDEX_op_mulu2_i32
:
1353 /* Likewise, test for the high part of the operation dead. */
1354 if (dead_temps
[args
[1]]) {
1355 if (dead_temps
[args
[0]]) {
1358 gen_opc_buf
[op_index
] = op
= INDEX_op_mul_i32
;
1361 assert(gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1362 tcg_set_nop(s
, gen_opc_buf
+ op_index
+ 1, args
+ 3, 1);
1363 /* Fall through and mark the single-word operation live. */
1369 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1370 args
-= def
->nb_args
;
1371 nb_iargs
= def
->nb_iargs
;
1372 nb_oargs
= def
->nb_oargs
;
1374 /* Test if the operation can be removed because all
1375 its outputs are dead. We assume that nb_oargs == 0
1376 implies side effects */
1377 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1378 for(i
= 0; i
< nb_oargs
; i
++) {
1380 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1385 tcg_set_nop(s
, gen_opc_buf
+ op_index
, args
, def
->nb_args
);
1386 #ifdef CONFIG_PROFILER
1392 /* output args are dead */
1395 for(i
= 0; i
< nb_oargs
; i
++) {
1397 if (dead_temps
[arg
]) {
1398 dead_args
|= (1 << i
);
1400 if (mem_temps
[arg
]) {
1401 sync_args
|= (1 << i
);
1403 dead_temps
[arg
] = 1;
1407 /* if end of basic block, update */
1408 if (def
->flags
& TCG_OPF_BB_END
) {
1409 tcg_la_bb_end(s
, dead_temps
, mem_temps
);
1410 } else if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1411 /* globals should go back to memory */
1412 memset(dead_temps
, 1, s
->nb_globals
);
1413 memset(mem_temps
, 1, s
->nb_globals
);
1416 /* input args are live */
1417 for(i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1419 if (dead_temps
[arg
]) {
1420 dead_args
|= (1 << i
);
1422 dead_temps
[arg
] = 0;
1424 s
->op_dead_args
[op_index
] = dead_args
;
1425 s
->op_sync_args
[op_index
] = sync_args
;
1432 if (args
!= gen_opparam_buf
)
1436 /* dummy liveness analysis */
1437 static void tcg_liveness_analysis(TCGContext
*s
)
1440 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
1442 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1443 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1444 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1445 memset(s
->op_sync_args
, 0, nb_ops
* sizeof(uint8_t));
1450 static void dump_regs(TCGContext
*s
)
1456 for(i
= 0; i
< s
->nb_temps
; i
++) {
1458 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1459 switch(ts
->val_type
) {
1461 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1464 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1466 case TEMP_VAL_CONST
:
1467 printf("$0x%" TCG_PRIlx
, ts
->val
);
1479 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1480 if (s
->reg_to_temp
[i
] >= 0) {
1482 tcg_target_reg_names
[i
],
1483 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1488 static void check_regs(TCGContext
*s
)
1494 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1495 k
= s
->reg_to_temp
[reg
];
1498 if (ts
->val_type
!= TEMP_VAL_REG
||
1500 printf("Inconsistency for register %s:\n",
1501 tcg_target_reg_names
[reg
]);
1506 for(k
= 0; k
< s
->nb_temps
; k
++) {
1508 if (ts
->val_type
== TEMP_VAL_REG
&&
1510 s
->reg_to_temp
[ts
->reg
] != k
) {
1511 printf("Inconsistency for temp %s:\n",
1512 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1514 printf("reg state:\n");
1522 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1525 ts
= &s
->temps
[temp
];
1526 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1527 /* Sparc64 stack is accessed with offset of 2047 */
1528 s
->current_frame_offset
= (s
->current_frame_offset
+
1529 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1530 ~(sizeof(tcg_target_long
) - 1);
1532 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1536 ts
->mem_offset
= s
->current_frame_offset
;
1537 ts
->mem_reg
= s
->frame_reg
;
1538 ts
->mem_allocated
= 1;
1539 s
->current_frame_offset
+= (tcg_target_long
)sizeof(tcg_target_long
);
1542 /* sync register 'reg' by saving it to the corresponding temporary */
1543 static inline void tcg_reg_sync(TCGContext
*s
, int reg
)
1548 temp
= s
->reg_to_temp
[reg
];
1549 ts
= &s
->temps
[temp
];
1550 assert(ts
->val_type
== TEMP_VAL_REG
);
1551 if (!ts
->mem_coherent
&& !ts
->fixed_reg
) {
1552 if (!ts
->mem_allocated
) {
1553 temp_allocate_frame(s
, temp
);
1555 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1557 ts
->mem_coherent
= 1;
1560 /* free register 'reg' by spilling the corresponding temporary if necessary */
1561 static void tcg_reg_free(TCGContext
*s
, int reg
)
1565 temp
= s
->reg_to_temp
[reg
];
1567 tcg_reg_sync(s
, reg
);
1568 s
->temps
[temp
].val_type
= TEMP_VAL_MEM
;
1569 s
->reg_to_temp
[reg
] = -1;
1573 /* Allocate a register belonging to reg1 & ~reg2 */
1574 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1579 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1581 /* first try free registers */
1582 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1583 reg
= tcg_target_reg_alloc_order
[i
];
1584 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1588 /* XXX: do better spill choice */
1589 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1590 reg
= tcg_target_reg_alloc_order
[i
];
1591 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1592 tcg_reg_free(s
, reg
);
1600 /* mark a temporary as dead. */
1601 static inline void temp_dead(TCGContext
*s
, int temp
)
1605 ts
= &s
->temps
[temp
];
1606 if (!ts
->fixed_reg
) {
1607 if (ts
->val_type
== TEMP_VAL_REG
) {
1608 s
->reg_to_temp
[ts
->reg
] = -1;
1610 if (temp
< s
->nb_globals
|| (ts
->temp_local
&& ts
->mem_allocated
)) {
1611 ts
->val_type
= TEMP_VAL_MEM
;
1613 ts
->val_type
= TEMP_VAL_DEAD
;
1618 /* sync a temporary to memory. 'allocated_regs' is used in case a
1619 temporary registers needs to be allocated to store a constant. */
1620 static inline void temp_sync(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1624 ts
= &s
->temps
[temp
];
1625 if (!ts
->fixed_reg
) {
1626 switch(ts
->val_type
) {
1627 case TEMP_VAL_CONST
:
1628 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1630 ts
->val_type
= TEMP_VAL_REG
;
1631 s
->reg_to_temp
[ts
->reg
] = temp
;
1632 ts
->mem_coherent
= 0;
1633 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1636 tcg_reg_sync(s
, ts
->reg
);
1647 /* save a temporary to memory. 'allocated_regs' is used in case a
1648 temporary registers needs to be allocated to store a constant. */
1649 static inline void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1651 temp_sync(s
, temp
, allocated_regs
);
1655 /* save globals to their canonical location and assume they can be
1656 modified be the following code. 'allocated_regs' is used in case a
1657 temporary registers needs to be allocated to store a constant. */
1658 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1662 for(i
= 0; i
< s
->nb_globals
; i
++) {
1663 temp_save(s
, i
, allocated_regs
);
1667 /* at the end of a basic block, we assume all temporaries are dead and
1668 all globals are stored at their canonical location. */
1669 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1674 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1676 if (ts
->temp_local
) {
1677 temp_save(s
, i
, allocated_regs
);
1683 save_globals(s
, allocated_regs
);
1686 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1687 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1689 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
,
1690 uint16_t dead_args
, uint8_t sync_args
)
1693 tcg_target_ulong val
;
1695 ots
= &s
->temps
[args
[0]];
1698 if (ots
->fixed_reg
) {
1699 /* for fixed registers, we do not do any constant
1701 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1703 /* The movi is not explicitly generated here */
1704 if (ots
->val_type
== TEMP_VAL_REG
)
1705 s
->reg_to_temp
[ots
->reg
] = -1;
1706 ots
->val_type
= TEMP_VAL_CONST
;
1709 if (NEED_SYNC_ARG(0)) {
1710 temp_sync(s
, args
[0], s
->reserved_regs
);
1712 if (IS_DEAD_ARG(0)) {
1713 temp_dead(s
, args
[0]);
1717 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1718 const TCGArg
*args
, uint16_t dead_args
,
1721 TCGRegSet allocated_regs
;
1723 const TCGArgConstraint
*arg_ct
, *oarg_ct
;
1725 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1726 ots
= &s
->temps
[args
[0]];
1727 ts
= &s
->temps
[args
[1]];
1728 oarg_ct
= &def
->args_ct
[0];
1729 arg_ct
= &def
->args_ct
[1];
1731 /* If the source value is not in a register, and we're going to be
1732 forced to have it in a register in order to perform the copy,
1733 then copy the SOURCE value into its own register first. That way
1734 we don't have to reload SOURCE the next time it is used. */
1735 if (((NEED_SYNC_ARG(0) || ots
->fixed_reg
) && ts
->val_type
!= TEMP_VAL_REG
)
1736 || ts
->val_type
== TEMP_VAL_MEM
) {
1737 ts
->reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1738 if (ts
->val_type
== TEMP_VAL_MEM
) {
1739 tcg_out_ld(s
, ts
->type
, ts
->reg
, ts
->mem_reg
, ts
->mem_offset
);
1740 ts
->mem_coherent
= 1;
1741 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1742 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1744 s
->reg_to_temp
[ts
->reg
] = args
[1];
1745 ts
->val_type
= TEMP_VAL_REG
;
1748 if (IS_DEAD_ARG(0) && !ots
->fixed_reg
) {
1749 /* mov to a non-saved dead register makes no sense (even with
1750 liveness analysis disabled). */
1751 assert(NEED_SYNC_ARG(0));
1752 /* The code above should have moved the temp to a register. */
1753 assert(ts
->val_type
== TEMP_VAL_REG
);
1754 if (!ots
->mem_allocated
) {
1755 temp_allocate_frame(s
, args
[0]);
1757 tcg_out_st(s
, ots
->type
, ts
->reg
, ots
->mem_reg
, ots
->mem_offset
);
1758 if (IS_DEAD_ARG(1)) {
1759 temp_dead(s
, args
[1]);
1761 temp_dead(s
, args
[0]);
1762 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1763 /* propagate constant */
1764 if (ots
->val_type
== TEMP_VAL_REG
) {
1765 s
->reg_to_temp
[ots
->reg
] = -1;
1767 ots
->val_type
= TEMP_VAL_CONST
;
1770 /* The code in the first if block should have moved the
1771 temp to a register. */
1772 assert(ts
->val_type
== TEMP_VAL_REG
);
1773 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1774 /* the mov can be suppressed */
1775 if (ots
->val_type
== TEMP_VAL_REG
) {
1776 s
->reg_to_temp
[ots
->reg
] = -1;
1779 temp_dead(s
, args
[1]);
1781 if (ots
->val_type
!= TEMP_VAL_REG
) {
1782 /* When allocating a new register, make sure to not spill the
1784 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1785 ots
->reg
= tcg_reg_alloc(s
, oarg_ct
->u
.regs
, allocated_regs
);
1787 tcg_out_mov(s
, ots
->type
, ots
->reg
, ts
->reg
);
1789 ots
->val_type
= TEMP_VAL_REG
;
1790 ots
->mem_coherent
= 0;
1791 s
->reg_to_temp
[ots
->reg
] = args
[0];
1792 if (NEED_SYNC_ARG(0)) {
1793 tcg_reg_sync(s
, ots
->reg
);
1798 static void tcg_reg_alloc_op(TCGContext
*s
,
1799 const TCGOpDef
*def
, TCGOpcode opc
,
1800 const TCGArg
*args
, uint16_t dead_args
,
1803 TCGRegSet allocated_regs
;
1804 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1806 const TCGArgConstraint
*arg_ct
;
1808 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1809 int const_args
[TCG_MAX_OP_ARGS
];
1811 nb_oargs
= def
->nb_oargs
;
1812 nb_iargs
= def
->nb_iargs
;
1814 /* copy constants */
1815 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1816 args
+ nb_oargs
+ nb_iargs
,
1817 sizeof(TCGArg
) * def
->nb_cargs
);
1819 /* satisfy input constraints */
1820 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1821 for(k
= 0; k
< nb_iargs
; k
++) {
1822 i
= def
->sorted_args
[nb_oargs
+ k
];
1824 arg_ct
= &def
->args_ct
[i
];
1825 ts
= &s
->temps
[arg
];
1826 if (ts
->val_type
== TEMP_VAL_MEM
) {
1827 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1828 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1829 ts
->val_type
= TEMP_VAL_REG
;
1831 ts
->mem_coherent
= 1;
1832 s
->reg_to_temp
[reg
] = arg
;
1833 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1834 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1835 /* constant is OK for instruction */
1837 new_args
[i
] = ts
->val
;
1840 /* need to move to a register */
1841 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1842 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1843 ts
->val_type
= TEMP_VAL_REG
;
1845 ts
->mem_coherent
= 0;
1846 s
->reg_to_temp
[reg
] = arg
;
1849 assert(ts
->val_type
== TEMP_VAL_REG
);
1850 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
1851 if (ts
->fixed_reg
) {
1852 /* if fixed register, we must allocate a new register
1853 if the alias is not the same register */
1854 if (arg
!= args
[arg_ct
->alias_index
])
1855 goto allocate_in_reg
;
1857 /* if the input is aliased to an output and if it is
1858 not dead after the instruction, we must allocate
1859 a new register and move it */
1860 if (!IS_DEAD_ARG(i
)) {
1861 goto allocate_in_reg
;
1866 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1867 /* nothing to do : the constraint is satisfied */
1870 /* allocate a new register matching the constraint
1871 and move the temporary register into it */
1872 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1873 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1877 tcg_regset_set_reg(allocated_regs
, reg
);
1881 /* mark dead temporaries and free the associated registers */
1882 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1883 if (IS_DEAD_ARG(i
)) {
1884 temp_dead(s
, args
[i
]);
1888 if (def
->flags
& TCG_OPF_BB_END
) {
1889 tcg_reg_alloc_bb_end(s
, allocated_regs
);
1891 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1892 /* XXX: permit generic clobber register list ? */
1893 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1894 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1895 tcg_reg_free(s
, reg
);
1898 /* XXX: for load/store we could do that only for the slow path
1899 (i.e. when a memory callback is called) */
1901 /* store globals and free associated registers (we assume the insn
1902 can modify any global. */
1903 save_globals(s
, allocated_regs
);
1906 /* satisfy the output constraints */
1907 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1908 for(k
= 0; k
< nb_oargs
; k
++) {
1909 i
= def
->sorted_args
[k
];
1911 arg_ct
= &def
->args_ct
[i
];
1912 ts
= &s
->temps
[arg
];
1913 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1914 reg
= new_args
[arg_ct
->alias_index
];
1916 /* if fixed register, we try to use it */
1918 if (ts
->fixed_reg
&&
1919 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1922 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1924 tcg_regset_set_reg(allocated_regs
, reg
);
1925 /* if a fixed register is used, then a move will be done afterwards */
1926 if (!ts
->fixed_reg
) {
1927 if (ts
->val_type
== TEMP_VAL_REG
) {
1928 s
->reg_to_temp
[ts
->reg
] = -1;
1930 ts
->val_type
= TEMP_VAL_REG
;
1932 /* temp value is modified, so the value kept in memory is
1933 potentially not the same */
1934 ts
->mem_coherent
= 0;
1935 s
->reg_to_temp
[reg
] = arg
;
1942 /* emit instruction */
1943 tcg_out_op(s
, opc
, new_args
, const_args
);
1945 /* move the outputs in the correct register if needed */
1946 for(i
= 0; i
< nb_oargs
; i
++) {
1947 ts
= &s
->temps
[args
[i
]];
1949 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
1950 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
1952 if (NEED_SYNC_ARG(i
)) {
1953 tcg_reg_sync(s
, reg
);
1955 if (IS_DEAD_ARG(i
)) {
1956 temp_dead(s
, args
[i
]);
1961 #ifdef TCG_TARGET_STACK_GROWSUP
1962 #define STACK_DIR(x) (-(x))
1964 #define STACK_DIR(x) (x)
1967 static int tcg_reg_alloc_call(TCGContext
*s
, const TCGOpDef
*def
,
1968 TCGOpcode opc
, const TCGArg
*args
,
1969 uint16_t dead_args
, uint8_t sync_args
)
1971 int nb_iargs
, nb_oargs
, flags
, nb_regs
, i
, reg
, nb_params
;
1972 TCGArg arg
, func_arg
;
1974 tcg_target_long stack_offset
, call_stack_size
, func_addr
;
1975 int const_func_arg
, allocate_args
;
1976 TCGRegSet allocated_regs
;
1977 const TCGArgConstraint
*arg_ct
;
1981 nb_oargs
= arg
>> 16;
1982 nb_iargs
= arg
& 0xffff;
1983 nb_params
= nb_iargs
- 1;
1985 flags
= args
[nb_oargs
+ nb_iargs
];
1987 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
1988 if (nb_regs
> nb_params
)
1989 nb_regs
= nb_params
;
1991 /* assign stack slots first */
1992 call_stack_size
= (nb_params
- nb_regs
) * sizeof(tcg_target_long
);
1993 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
1994 ~(TCG_TARGET_STACK_ALIGN
- 1);
1995 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
1996 if (allocate_args
) {
1997 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
1998 preallocate call stack */
2002 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
2003 for(i
= nb_regs
; i
< nb_params
; i
++) {
2004 arg
= args
[nb_oargs
+ i
];
2005 #ifdef TCG_TARGET_STACK_GROWSUP
2006 stack_offset
-= sizeof(tcg_target_long
);
2008 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2009 ts
= &s
->temps
[arg
];
2010 if (ts
->val_type
== TEMP_VAL_REG
) {
2011 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
2012 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2013 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2015 /* XXX: not correct if reading values from the stack */
2016 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2017 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2018 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2019 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2021 /* XXX: sign extend may be needed on some targets */
2022 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2023 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2028 #ifndef TCG_TARGET_STACK_GROWSUP
2029 stack_offset
+= sizeof(tcg_target_long
);
2033 /* assign input registers */
2034 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2035 for(i
= 0; i
< nb_regs
; i
++) {
2036 arg
= args
[nb_oargs
+ i
];
2037 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2038 ts
= &s
->temps
[arg
];
2039 reg
= tcg_target_call_iarg_regs
[i
];
2040 tcg_reg_free(s
, reg
);
2041 if (ts
->val_type
== TEMP_VAL_REG
) {
2042 if (ts
->reg
!= reg
) {
2043 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2045 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2046 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2047 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2048 /* XXX: sign extend ? */
2049 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2053 tcg_regset_set_reg(allocated_regs
, reg
);
2057 /* assign function address */
2058 func_arg
= args
[nb_oargs
+ nb_iargs
- 1];
2059 arg_ct
= &def
->args_ct
[0];
2060 ts
= &s
->temps
[func_arg
];
2061 func_addr
= ts
->val
;
2063 if (ts
->val_type
== TEMP_VAL_MEM
) {
2064 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2065 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2067 tcg_regset_set_reg(allocated_regs
, reg
);
2068 } else if (ts
->val_type
== TEMP_VAL_REG
) {
2070 if (!tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2071 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2072 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2075 tcg_regset_set_reg(allocated_regs
, reg
);
2076 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2077 if (tcg_target_const_match(func_addr
, arg_ct
)) {
2079 func_arg
= func_addr
;
2081 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2082 tcg_out_movi(s
, ts
->type
, reg
, func_addr
);
2084 tcg_regset_set_reg(allocated_regs
, reg
);
2091 /* mark dead temporaries and free the associated registers */
2092 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2093 if (IS_DEAD_ARG(i
)) {
2094 temp_dead(s
, args
[i
]);
2098 /* clobber call registers */
2099 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2100 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2101 tcg_reg_free(s
, reg
);
2105 /* store globals and free associated registers (we assume the call
2106 can modify any global. */
2107 if (!(flags
& TCG_CALL_CONST
)) {
2108 save_globals(s
, allocated_regs
);
2111 tcg_out_op(s
, opc
, &func_arg
, &const_func_arg
);
2113 /* assign output registers and emit moves if needed */
2114 for(i
= 0; i
< nb_oargs
; i
++) {
2116 ts
= &s
->temps
[arg
];
2117 reg
= tcg_target_call_oarg_regs
[i
];
2118 assert(s
->reg_to_temp
[reg
] == -1);
2119 if (ts
->fixed_reg
) {
2120 if (ts
->reg
!= reg
) {
2121 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2124 if (ts
->val_type
== TEMP_VAL_REG
) {
2125 s
->reg_to_temp
[ts
->reg
] = -1;
2127 ts
->val_type
= TEMP_VAL_REG
;
2129 ts
->mem_coherent
= 0;
2130 s
->reg_to_temp
[reg
] = arg
;
2131 if (NEED_SYNC_ARG(i
)) {
2132 tcg_reg_sync(s
, reg
);
2134 if (IS_DEAD_ARG(i
)) {
2135 temp_dead(s
, args
[i
]);
2140 return nb_iargs
+ nb_oargs
+ def
->nb_cargs
+ 1;
2143 #ifdef CONFIG_PROFILER
2145 static int64_t tcg_table_op_count
[NB_OPS
];
2147 static void dump_op_count(void)
2151 f
= fopen("/tmp/op.log", "w");
2152 for(i
= INDEX_op_end
; i
< NB_OPS
; i
++) {
2153 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, tcg_table_op_count
[i
]);
2160 static inline int tcg_gen_code_common(TCGContext
*s
, uint8_t *gen_code_buf
,
2165 const TCGOpDef
*def
;
2169 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2176 #ifdef CONFIG_PROFILER
2177 s
->opt_time
-= profile_getclock();
2180 #ifdef USE_TCG_OPTIMIZATIONS
2182 tcg_optimize(s
, gen_opc_ptr
, gen_opparam_buf
, tcg_op_defs
);
2185 #ifdef CONFIG_PROFILER
2186 s
->opt_time
+= profile_getclock();
2187 s
->la_time
-= profile_getclock();
2190 tcg_liveness_analysis(s
);
2192 #ifdef CONFIG_PROFILER
2193 s
->la_time
+= profile_getclock();
2197 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2198 qemu_log("OP after optimization and liveness analysis:\n");
2204 tcg_reg_alloc_start(s
);
2206 s
->code_buf
= gen_code_buf
;
2207 s
->code_ptr
= gen_code_buf
;
2209 args
= gen_opparam_buf
;
2213 opc
= gen_opc_buf
[op_index
];
2214 #ifdef CONFIG_PROFILER
2215 tcg_table_op_count
[opc
]++;
2217 def
= &tcg_op_defs
[opc
];
2219 printf("%s: %d %d %d\n", def
->name
,
2220 def
->nb_oargs
, def
->nb_iargs
, def
->nb_cargs
);
2224 case INDEX_op_mov_i32
:
2225 case INDEX_op_mov_i64
:
2226 tcg_reg_alloc_mov(s
, def
, args
, s
->op_dead_args
[op_index
],
2227 s
->op_sync_args
[op_index
]);
2229 case INDEX_op_movi_i32
:
2230 case INDEX_op_movi_i64
:
2231 tcg_reg_alloc_movi(s
, args
, s
->op_dead_args
[op_index
],
2232 s
->op_sync_args
[op_index
]);
2234 case INDEX_op_debug_insn_start
:
2235 /* debug instruction */
2245 case INDEX_op_discard
:
2246 temp_dead(s
, args
[0]);
2248 case INDEX_op_set_label
:
2249 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2250 tcg_out_label(s
, args
[0], s
->code_ptr
);
2253 args
+= tcg_reg_alloc_call(s
, def
, opc
, args
,
2254 s
->op_dead_args
[op_index
],
2255 s
->op_sync_args
[op_index
]);
2260 /* Sanity check that we've not introduced any unhandled opcodes. */
2261 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2264 /* Note: in order to speed up the code, it would be much
2265 faster to have specialized register allocator functions for
2266 some common argument patterns */
2267 tcg_reg_alloc_op(s
, def
, opc
, args
, s
->op_dead_args
[op_index
],
2268 s
->op_sync_args
[op_index
]);
2271 args
+= def
->nb_args
;
2273 if (search_pc
>= 0 && search_pc
< s
->code_ptr
- gen_code_buf
) {
2285 int tcg_gen_code(TCGContext
*s
, uint8_t *gen_code_buf
)
2287 #ifdef CONFIG_PROFILER
2290 n
= (gen_opc_ptr
- gen_opc_buf
);
2292 if (n
> s
->op_count_max
)
2293 s
->op_count_max
= n
;
2295 s
->temp_count
+= s
->nb_temps
;
2296 if (s
->nb_temps
> s
->temp_count_max
)
2297 s
->temp_count_max
= s
->nb_temps
;
2301 tcg_gen_code_common(s
, gen_code_buf
, -1);
2303 /* flush instruction cache */
2304 flush_icache_range((tcg_target_ulong
)gen_code_buf
,
2305 (tcg_target_ulong
)s
->code_ptr
);
2307 return s
->code_ptr
- gen_code_buf
;
2310 /* Return the index of the micro operation such as the pc after is <
2311 offset bytes from the start of the TB. The contents of gen_code_buf must
2312 not be changed, though writing the same values is ok.
2313 Return -1 if not found. */
2314 int tcg_gen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
, long offset
)
2316 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2319 #ifdef CONFIG_PROFILER
2320 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2322 TCGContext
*s
= &tcg_ctx
;
2325 tot
= s
->interm_time
+ s
->code_time
;
2326 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2328 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2330 s
->tb_count1
- s
->tb_count
,
2331 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2332 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2333 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2334 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2336 (double)s
->del_op_count
/ s
->tb_count
: 0);
2337 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2339 (double)s
->temp_count
/ s
->tb_count
: 0,
2342 cpu_fprintf(f
, "cycles/op %0.1f\n",
2343 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2344 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2345 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2346 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2347 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2350 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2351 (double)s
->interm_time
/ tot
* 100.0);
2352 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2353 (double)s
->code_time
/ tot
* 100.0);
2354 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2355 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2357 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2358 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2359 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2361 cpu_fprintf(f
, " avg cycles %0.1f\n",
2362 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2367 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2369 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2373 #ifdef ELF_HOST_MACHINE
2374 /* In order to use this feature, the backend needs to do three things:
2376 (1) Define ELF_HOST_MACHINE to indicate both what value to
2377 put into the ELF image and to indicate support for the feature.
2379 (2) Define tcg_register_jit. This should create a buffer containing
2380 the contents of a .debug_frame section that describes the post-
2381 prologue unwind info for the tcg machine.
2383 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2386 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2393 struct jit_code_entry
{
2394 struct jit_code_entry
*next_entry
;
2395 struct jit_code_entry
*prev_entry
;
2396 const void *symfile_addr
;
2397 uint64_t symfile_size
;
2400 struct jit_descriptor
{
2402 uint32_t action_flag
;
2403 struct jit_code_entry
*relevant_entry
;
2404 struct jit_code_entry
*first_entry
;
2407 void __jit_debug_register_code(void) __attribute__((noinline
));
2408 void __jit_debug_register_code(void)
2413 /* Must statically initialize the version, because GDB may check
2414 the version before we can set it. */
2415 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2417 /* End GDB interface. */
2419 static int find_string(const char *strtab
, const char *str
)
2421 const char *p
= strtab
+ 1;
2424 if (strcmp(p
, str
) == 0) {
2431 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2432 void *debug_frame
, size_t debug_frame_size
)
2434 struct __attribute__((packed
)) DebugInfo
{
2441 uintptr_t cu_low_pc
;
2442 uintptr_t cu_high_pc
;
2445 uintptr_t fn_low_pc
;
2446 uintptr_t fn_high_pc
;
2455 struct DebugInfo di
;
2460 struct ElfImage
*img
;
2462 static const struct ElfImage img_template
= {
2464 .e_ident
[EI_MAG0
] = ELFMAG0
,
2465 .e_ident
[EI_MAG1
] = ELFMAG1
,
2466 .e_ident
[EI_MAG2
] = ELFMAG2
,
2467 .e_ident
[EI_MAG3
] = ELFMAG3
,
2468 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2469 .e_ident
[EI_DATA
] = ELF_DATA
,
2470 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2472 .e_machine
= ELF_HOST_MACHINE
,
2473 .e_version
= EV_CURRENT
,
2474 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2475 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2476 .e_ehsize
= sizeof(ElfW(Shdr
)),
2477 .e_phentsize
= sizeof(ElfW(Phdr
)),
2479 .e_shentsize
= sizeof(ElfW(Shdr
)),
2480 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2481 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2482 #ifdef ELF_HOST_FLAGS
2483 .e_flags
= ELF_HOST_FLAGS
,
2486 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2494 [0] = { .sh_type
= SHT_NULL
},
2495 /* Trick: The contents of code_gen_buffer are not present in
2496 this fake ELF file; that got allocated elsewhere. Therefore
2497 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2498 will not look for contents. We can record any address. */
2500 .sh_type
= SHT_NOBITS
,
2501 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2503 [2] = { /* .debug_info */
2504 .sh_type
= SHT_PROGBITS
,
2505 .sh_offset
= offsetof(struct ElfImage
, di
),
2506 .sh_size
= sizeof(struct DebugInfo
),
2508 [3] = { /* .debug_abbrev */
2509 .sh_type
= SHT_PROGBITS
,
2510 .sh_offset
= offsetof(struct ElfImage
, da
),
2511 .sh_size
= sizeof(img
->da
),
2513 [4] = { /* .debug_frame */
2514 .sh_type
= SHT_PROGBITS
,
2515 .sh_offset
= sizeof(struct ElfImage
),
2517 [5] = { /* .symtab */
2518 .sh_type
= SHT_SYMTAB
,
2519 .sh_offset
= offsetof(struct ElfImage
, sym
),
2520 .sh_size
= sizeof(img
->sym
),
2522 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2523 .sh_entsize
= sizeof(ElfW(Sym
)),
2525 [6] = { /* .strtab */
2526 .sh_type
= SHT_STRTAB
,
2527 .sh_offset
= offsetof(struct ElfImage
, str
),
2528 .sh_size
= sizeof(img
->str
),
2532 [1] = { /* code_gen_buffer */
2533 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2538 .len
= sizeof(struct DebugInfo
) - 4,
2540 .ptr_size
= sizeof(void *),
2542 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2544 .fn_name
= "code_gen_buffer"
2547 1, /* abbrev number (the cu) */
2548 0x11, 1, /* DW_TAG_compile_unit, has children */
2549 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2550 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2551 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2552 0, 0, /* end of abbrev */
2553 2, /* abbrev number (the fn) */
2554 0x2e, 0, /* DW_TAG_subprogram, no children */
2555 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2556 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2557 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2558 0, 0, /* end of abbrev */
2559 0 /* no more abbrev */
2561 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2562 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2565 /* We only need a single jit entry; statically allocate it. */
2566 static struct jit_code_entry one_entry
;
2568 uintptr_t buf
= (uintptr_t)buf_ptr
;
2569 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2571 img
= g_malloc(img_size
);
2572 *img
= img_template
;
2573 memcpy(img
+ 1, debug_frame
, debug_frame_size
);
2575 img
->phdr
.p_vaddr
= buf
;
2576 img
->phdr
.p_paddr
= buf
;
2577 img
->phdr
.p_memsz
= buf_size
;
2579 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2580 img
->shdr
[1].sh_addr
= buf
;
2581 img
->shdr
[1].sh_size
= buf_size
;
2583 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2584 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2586 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2587 img
->shdr
[4].sh_size
= debug_frame_size
;
2589 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2590 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2592 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2593 img
->sym
[1].st_value
= buf
;
2594 img
->sym
[1].st_size
= buf_size
;
2596 img
->di
.cu_low_pc
= buf
;
2597 img
->di
.cu_high_pc
= buf_size
;
2598 img
->di
.fn_low_pc
= buf
;
2599 img
->di
.fn_high_pc
= buf_size
;
2602 /* Enable this block to be able to debug the ELF image file creation.
2603 One can use readelf, objdump, or other inspection utilities. */
2605 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2607 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2608 /* Avoid stupid unused return value warning for fwrite. */
2615 one_entry
.symfile_addr
= img
;
2616 one_entry
.symfile_size
= img_size
;
2618 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2619 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2620 __jit_debug_descriptor
.first_entry
= &one_entry
;
2621 __jit_debug_register_code();
2624 /* No support for the feature. Provide the entry point expected by exec.c,
2625 and implement the internal function we declared earlier. */
2627 static void tcg_register_jit_int(void *buf
, size_t size
,
2628 void *debug_frame
, size_t debug_frame_size
)
2632 void tcg_register_jit(void *buf
, size_t buf_size
)
2635 #endif /* ELF_HOST_MACHINE */