tcg/tcg.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "qemu-common.h"
  25
  26 /* Target word size (must be identical to pointer size). */
  27 #if UINTPTR_MAX == UINT32_MAX
  28 # define TCG_TARGET_REG_BITS 32
  29 #elif UINTPTR_MAX == UINT64_MAX
  30 # define TCG_TARGET_REG_BITS 64
  31 #else
  32 # error Unknown pointer size for tcg target
  33 #endif
  34
  35 #if TCG_TARGET_REG_BITS == 32
  36 typedef int32_t tcg_target_long;
  37 typedef uint32_t tcg_target_ulong;
  38 #define TCG_PRIlx PRIx32
  39 #define TCG_PRIld PRId32
  40 #elif TCG_TARGET_REG_BITS == 64
  41 typedef int64_t tcg_target_long;
  42 typedef uint64_t tcg_target_ulong;
  43 #define TCG_PRIlx PRIx64
  44 #define TCG_PRIld PRId64
  45 #else
  46 #error unsupported
  47 #endif
  48
  49 #include "tcg-target.h"
  50 #include "tcg-runtime.h"
  51
  52 #if TCG_TARGET_NB_REGS <= 32
  53 typedef uint32_t TCGRegSet;
  54 #elif TCG_TARGET_NB_REGS <= 64
  55 typedef uint64_t TCGRegSet;
  56 #else
  57 #error unsupported
  58 #endif
  59
  60 #if TCG_TARGET_REG_BITS == 32
  61 /* Turn some undef macros into false macros.  */
  62 #define TCG_TARGET_HAS_div_i64          0
  63 #define TCG_TARGET_HAS_rem_i64          0
  64 #define TCG_TARGET_HAS_div2_i64         0
  65 #define TCG_TARGET_HAS_rot_i64          0
  66 #define TCG_TARGET_HAS_ext8s_i64        0
  67 #define TCG_TARGET_HAS_ext16s_i64       0
  68 #define TCG_TARGET_HAS_ext32s_i64       0
  69 #define TCG_TARGET_HAS_ext8u_i64        0
  70 #define TCG_TARGET_HAS_ext16u_i64       0
  71 #define TCG_TARGET_HAS_ext32u_i64       0
  72 #define TCG_TARGET_HAS_bswap16_i64      0
  73 #define TCG_TARGET_HAS_bswap32_i64      0
  74 #define TCG_TARGET_HAS_bswap64_i64      0
  75 #define TCG_TARGET_HAS_neg_i64          0
  76 #define TCG_TARGET_HAS_not_i64          0
  77 #define TCG_TARGET_HAS_andc_i64         0
  78 #define TCG_TARGET_HAS_orc_i64          0
  79 #define TCG_TARGET_HAS_eqv_i64          0
  80 #define TCG_TARGET_HAS_nand_i64         0
  81 #define TCG_TARGET_HAS_nor_i64          0
  82 #define TCG_TARGET_HAS_deposit_i64      0
  83 #define TCG_TARGET_HAS_movcond_i64      0
  84 #define TCG_TARGET_HAS_add2_i64         0
  85 #define TCG_TARGET_HAS_sub2_i64         0
  86 #define TCG_TARGET_HAS_mulu2_i64        0
  87 #define TCG_TARGET_HAS_muls2_i64        0
  88 /* Turn some undef macros into true macros.  */
  89 #define TCG_TARGET_HAS_add2_i32         1
  90 #define TCG_TARGET_HAS_sub2_i32         1
  91 #define TCG_TARGET_HAS_mulu2_i32        1
  92 #endif
  93
  94 #ifndef TCG_TARGET_deposit_i32_valid
  95 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
  96 #endif
  97 #ifndef TCG_TARGET_deposit_i64_valid
  98 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
  99 #endif
 100
 101 /* Only one of DIV or DIV2 should be defined.  */
 102 #if defined(TCG_TARGET_HAS_div_i32)
 103 #define TCG_TARGET_HAS_div2_i32         0
 104 #elif defined(TCG_TARGET_HAS_div2_i32)
 105 #define TCG_TARGET_HAS_div_i32          0
 106 #define TCG_TARGET_HAS_rem_i32          0
 107 #endif
 108 #if defined(TCG_TARGET_HAS_div_i64)
 109 #define TCG_TARGET_HAS_div2_i64         0
 110 #elif defined(TCG_TARGET_HAS_div2_i64)
 111 #define TCG_TARGET_HAS_div_i64          0
 112 #define TCG_TARGET_HAS_rem_i64          0
 113 #endif
 114
 115 typedef enum TCGOpcode {
 116 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 117 #include "tcg-opc.h"
 118 #undef DEF
 119     NB_OPS,
 120 } TCGOpcode;
 121
 122 #define tcg_regset_clear(d) (d) = 0
 123 #define tcg_regset_set(d, s) (d) = (s)
 124 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
 125 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
 126 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
 127 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
 128 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
 129 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
 130 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
 131 #define tcg_regset_not(d, a) (d) = ~(a)
 132
 133 typedef struct TCGRelocation {
 134     struct TCGRelocation *next;
 135     int type;
 136     uint8_t *ptr;
 137     tcg_target_long addend;
 138 } TCGRelocation;
 139
 140 typedef struct TCGLabel {
 141     int has_value;
 142     union {
 143         tcg_target_ulong value;
 144         TCGRelocation *first_reloc;
 145     } u;
 146 } TCGLabel;
 147
 148 typedef struct TCGPool {
 149     struct TCGPool *next;
 150     int size;
 151     uint8_t data[0] __attribute__ ((aligned));
 152 } TCGPool;
 153
 154 #define TCG_POOL_CHUNK_SIZE 32768
 155
 156 #define TCG_MAX_LABELS 512
 157
 158 #define TCG_MAX_TEMPS 512
 159
 160 /* when the size of the arguments of a called function is smaller than
 161    this value, they are statically allocated in the TB stack frame */
 162 #define TCG_STATIC_CALL_ARGS_SIZE 128
 163
 164 typedef enum TCGType {
 165     TCG_TYPE_I32,
 166     TCG_TYPE_I64,
 167     TCG_TYPE_COUNT, /* number of different types */
 168
 169     /* An alias for the size of the host register.  */
 170 #if TCG_TARGET_REG_BITS == 32
 171     TCG_TYPE_REG = TCG_TYPE_I32,
 172 #else
 173     TCG_TYPE_REG = TCG_TYPE_I64,
 174 #endif
 175
 176     /* An alias for the size of the native pointer.  We don't currently
 177        support any hosts with 64-bit registers and 32-bit pointers.  */
 178     TCG_TYPE_PTR = TCG_TYPE_REG,
 179
 180     /* An alias for the size of the target "long", aka register.  */
 181 #if TARGET_LONG_BITS == 64
 182     TCG_TYPE_TL = TCG_TYPE_I64,
 183 #else
 184     TCG_TYPE_TL = TCG_TYPE_I32,
 185 #endif
 186 } TCGType;
 187
 188 typedef tcg_target_ulong TCGArg;
 189
 190 /* Define a type and accessor macros for variables.  Using a struct is
 191    nice because it gives some level of type safely.  Ideally the compiler
 192    be able to see through all this.  However in practice this is not true,
 193    especially on targets with braindamaged ABIs (e.g. i386).
 194    We use plain int by default to avoid this runtime overhead.
 195    Users of tcg_gen_* don't need to know about any of this, and should
 196    treat TCGv as an opaque type.
 197    In addition we do typechecking for different types of variables.  TCGv_i32
 198    and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
 199    are aliases for target_ulong and host pointer sized values respectively.
 200  */
 201
 202 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
 203 /* Macros/structures for qemu_ld/st IR code optimization:
 204    TCG_MAX_HELPER_LABELS is defined as same as OPC_BUF_SIZE in exec-all.h. */
 205 #define TCG_MAX_QEMU_LDST       640
 206
 207 typedef struct TCGLabelQemuLdst {
 208     int is_ld:1;            /* qemu_ld: 1, qemu_st: 0 */
 209     int opc:4;
 210     int addrlo_reg;         /* reg index for low word of guest virtual addr */
 211     int addrhi_reg;         /* reg index for high word of guest virtual addr */
 212     int datalo_reg;         /* reg index for low word to be loaded or stored */
 213     int datahi_reg;         /* reg index for high word to be loaded or stored */
 214     int mem_index;          /* soft MMU memory index */
 215     uint8_t *raddr;         /* gen code addr of the next IR of qemu_ld/st IR */
 216     uint8_t *label_ptr[2];  /* label pointers to be updated */
 217 } TCGLabelQemuLdst;
 218 #endif
 219
 220 #ifdef CONFIG_DEBUG_TCG
 221 #define DEBUG_TCGV 1
 222 #endif
 223
 224 #ifdef DEBUG_TCGV
 225
 226 typedef struct
 227 {
 228     int i32;
 229 } TCGv_i32;
 230
 231 typedef struct
 232 {
 233     int i64;
 234 } TCGv_i64;
 235
 236 typedef struct {
 237     int iptr;
 238 } TCGv_ptr;
 239
 240 #define MAKE_TCGV_I32(i) __extension__                  \
 241     ({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 242 #define MAKE_TCGV_I64(i) __extension__                  \
 243     ({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 244 #define MAKE_TCGV_PTR(i) __extension__                  \
 245     ({ TCGv_ptr make_tcgv_tmp = {i}; make_tcgv_tmp; })
 246 #define GET_TCGV_I32(t) ((t).i32)
 247 #define GET_TCGV_I64(t) ((t).i64)
 248 #define GET_TCGV_PTR(t) ((t).iptr)
 249 #if TCG_TARGET_REG_BITS == 32
 250 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
 251 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
 252 #endif
 253
 254 #else /* !DEBUG_TCGV */
 255
 256 typedef int TCGv_i32;
 257 typedef int TCGv_i64;
 258 #if TCG_TARGET_REG_BITS == 32
 259 #define TCGv_ptr TCGv_i32
 260 #else
 261 #define TCGv_ptr TCGv_i64
 262 #endif
 263 #define MAKE_TCGV_I32(x) (x)
 264 #define MAKE_TCGV_I64(x) (x)
 265 #define MAKE_TCGV_PTR(x) (x)
 266 #define GET_TCGV_I32(t) (t)
 267 #define GET_TCGV_I64(t) (t)
 268 #define GET_TCGV_PTR(t) (t)
 269
 270 #if TCG_TARGET_REG_BITS == 32
 271 #define TCGV_LOW(t) (t)
 272 #define TCGV_HIGH(t) ((t) + 1)
 273 #endif
 274
 275 #endif /* DEBUG_TCGV */
 276
 277 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
 278 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
 279
 280 /* Dummy definition to avoid compiler warnings.  */
 281 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
 282 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
 283
 284 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
 285 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
 286
 287 /* call flags */
 288 /* Helper does not read globals (either directly or through an exception). It
 289    implies TCG_CALL_NO_WRITE_GLOBALS. */
 290 #define TCG_CALL_NO_READ_GLOBALS    0x0010
 291 /* Helper does not write globals */
 292 #define TCG_CALL_NO_WRITE_GLOBALS   0x0020
 293 /* Helper can be safely suppressed if the return value is not used. */
 294 #define TCG_CALL_NO_SIDE_EFFECTS    0x0040
 295
 296 /* convenience version of most used call flags */
 297 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
 298 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
 299 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
 300 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
 301 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
 302
 303 /* used to align parameters */
 304 #define TCG_CALL_DUMMY_TCGV     MAKE_TCGV_I32(-1)
 305 #define TCG_CALL_DUMMY_ARG      ((TCGArg)(-1))
 306
 307 /* Conditions.  Note that these are laid out for easy manipulation by
 308    the functions below:
 309      bit 0 is used for inverting;
 310      bit 1 is signed,
 311      bit 2 is unsigned,
 312      bit 3 is used with bit 0 for swapping signed/unsigned.  */
 313 typedef enum {
 314     /* non-signed */
 315     TCG_COND_NEVER  = 0 | 0 | 0 | 0,
 316     TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
 317     TCG_COND_EQ     = 8 | 0 | 0 | 0,
 318     TCG_COND_NE     = 8 | 0 | 0 | 1,
 319     /* signed */
 320     TCG_COND_LT     = 0 | 0 | 2 | 0,
 321     TCG_COND_GE     = 0 | 0 | 2 | 1,
 322     TCG_COND_LE     = 8 | 0 | 2 | 0,
 323     TCG_COND_GT     = 8 | 0 | 2 | 1,
 324     /* unsigned */
 325     TCG_COND_LTU    = 0 | 4 | 0 | 0,
 326     TCG_COND_GEU    = 0 | 4 | 0 | 1,
 327     TCG_COND_LEU    = 8 | 4 | 0 | 0,
 328     TCG_COND_GTU    = 8 | 4 | 0 | 1,
 329 } TCGCond;
 330
 331 /* Invert the sense of the comparison.  */
 332 static inline TCGCond tcg_invert_cond(TCGCond c)
 333 {
 334     return (TCGCond)(c ^ 1);
 335 }
 336
 337 /* Swap the operands in a comparison.  */
 338 static inline TCGCond tcg_swap_cond(TCGCond c)
 339 {
 340     return c & 6 ? (TCGCond)(c ^ 9) : c;
 341 }
 342
 343 /* Create an "unsigned" version of a "signed" comparison.  */
 344 static inline TCGCond tcg_unsigned_cond(TCGCond c)
 345 {
 346     return c & 2 ? (TCGCond)(c ^ 6) : c;
 347 }
 348
 349 /* Must a comparison be considered unsigned?  */
 350 static inline bool is_unsigned_cond(TCGCond c)
 351 {
 352     return (c & 4) != 0;
 353 }
 354
 355 /* Create a "high" version of a double-word comparison.
 356    This removes equality from a LTE or GTE comparison.  */
 357 static inline TCGCond tcg_high_cond(TCGCond c)
 358 {
 359     switch (c) {
 360     case TCG_COND_GE:
 361     case TCG_COND_LE:
 362     case TCG_COND_GEU:
 363     case TCG_COND_LEU:
 364         return (TCGCond)(c ^ 8);
 365     default:
 366         return c;
 367     }
 368 }
 369
 370 #define TEMP_VAL_DEAD  0
 371 #define TEMP_VAL_REG   1
 372 #define TEMP_VAL_MEM   2
 373 #define TEMP_VAL_CONST 3
 374
 375 /* XXX: optimize memory layout */
 376 typedef struct TCGTemp {
 377     TCGType base_type;
 378     TCGType type;
 379     int val_type;
 380     int reg;
 381     tcg_target_long val;
 382     int mem_reg;
 383     tcg_target_long mem_offset;
 384     unsigned int fixed_reg:1;
 385     unsigned int mem_coherent:1;
 386     unsigned int mem_allocated:1;
 387     unsigned int temp_local:1; /* If true, the temp is saved across
 388                                   basic blocks. Otherwise, it is not
 389                                   preserved across basic blocks. */
 390     unsigned int temp_allocated:1; /* never used for code gen */
 391     /* index of next free temp of same base type, -1 if end */
 392     int next_free_temp;
 393     const char *name;
 394 } TCGTemp;
 395
 396 typedef struct TCGHelperInfo {
 397     tcg_target_ulong func;
 398     const char *name;
 399 } TCGHelperInfo;
 400
 401 typedef struct TCGContext TCGContext;
 402
 403 struct TCGContext {
 404     uint8_t *pool_cur, *pool_end;
 405     TCGPool *pool_first, *pool_current, *pool_first_large;
 406     TCGLabel *labels;
 407     int nb_labels;
 408     int nb_globals;
 409     int nb_temps;
 410     /* index of free temps, -1 if none */
 411     int first_free_temp[TCG_TYPE_COUNT * 2];
 412
 413     /* goto_tb support */
 414     uint8_t *code_buf;
 415     uintptr_t *tb_next;
 416     uint16_t *tb_next_offset;
 417     uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
 418
 419     /* liveness analysis */
 420     uint16_t *op_dead_args; /* for each operation, each bit tells if the
 421                                corresponding argument is dead */
 422     uint8_t *op_sync_args;  /* for each operation, each bit tells if the
 423                                corresponding output argument needs to be
 424                                sync to memory. */
 425
 426     /* tells in which temporary a given register is. It does not take
 427        into account fixed registers */
 428     int reg_to_temp[TCG_TARGET_NB_REGS];
 429     TCGRegSet reserved_regs;
 430     tcg_target_long current_frame_offset;
 431     tcg_target_long frame_start;
 432     tcg_target_long frame_end;
 433     int frame_reg;
 434
 435     uint8_t *code_ptr;
 436     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
 437
 438     TCGHelperInfo *helpers;
 439     int nb_helpers;
 440     int allocated_helpers;
 441     int helpers_sorted;
 442
 443 #ifdef CONFIG_PROFILER
 444     /* profiling info */
 445     int64_t tb_count1;
 446     int64_t tb_count;
 447     int64_t op_count; /* total insn count */
 448     int op_count_max; /* max insn per TB */
 449     int64_t temp_count;
 450     int temp_count_max;
 451     int64_t del_op_count;
 452     int64_t code_in_len;
 453     int64_t code_out_len;
 454     int64_t interm_time;
 455     int64_t code_time;
 456     int64_t la_time;
 457     int64_t opt_time;
 458     int64_t restore_count;
 459     int64_t restore_time;
 460 #endif
 461
 462 #ifdef CONFIG_DEBUG_TCG
 463     int temps_in_use;
 464     int goto_tb_issue_mask;
 465 #endif
 466
 467     uint16_t gen_opc_buf[OPC_BUF_SIZE];
 468     TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
 469
 470     uint16_t *gen_opc_ptr;
 471     TCGArg *gen_opparam_ptr;
 472     target_ulong gen_opc_pc[OPC_BUF_SIZE];
 473     uint16_t gen_opc_icount[OPC_BUF_SIZE];
 474     uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 475
 476     /* Code generation */
 477     int code_gen_max_blocks;
 478     uint8_t *code_gen_prologue;
 479     uint8_t *code_gen_buffer;
 480     size_t code_gen_buffer_size;
 481     /* threshold to flush the translated code buffer */
 482     size_t code_gen_buffer_max_size;
 483     uint8_t *code_gen_ptr;
 484
 485     TBContext tb_ctx;
 486
 487 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
 488     /* labels info for qemu_ld/st IRs
 489        The labels help to generate TLB miss case codes at the end of TB */
 490     TCGLabelQemuLdst *qemu_ldst_labels;
 491     int nb_qemu_ldst_labels;
 492 #endif
 493 };
 494
 495 extern TCGContext tcg_ctx;
 496
 497 /* pool based memory allocation */
 498
 499 void *tcg_malloc_internal(TCGContext *s, int size);
 500 void tcg_pool_reset(TCGContext *s);
 501 void tcg_pool_delete(TCGContext *s);
 502
 503 static inline void *tcg_malloc(int size)
 504 {
 505     TCGContext *s = &tcg_ctx;
 506     uint8_t *ptr, *ptr_end;
 507     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
 508     ptr = s->pool_cur;
 509     ptr_end = ptr + size;
 510     if (unlikely(ptr_end > s->pool_end)) {
 511         return tcg_malloc_internal(&tcg_ctx, size);
 512     } else {
 513         s->pool_cur = ptr_end;
 514         return ptr;
 515     }
 516 }
 517
 518 void tcg_context_init(TCGContext *s);
 519 void tcg_prologue_init(TCGContext *s);
 520 void tcg_func_start(TCGContext *s);
 521
 522 int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf);
 523 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset);
 524
 525 void tcg_set_frame(TCGContext *s, int reg,
 526                    tcg_target_long start, tcg_target_long size);
 527
 528 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
 529 TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
 530                                 const char *name);
 531 TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
 532 static inline TCGv_i32 tcg_temp_new_i32(void)
 533 {
 534     return tcg_temp_new_internal_i32(0);
 535 }
 536 static inline TCGv_i32 tcg_temp_local_new_i32(void)
 537 {
 538     return tcg_temp_new_internal_i32(1);
 539 }
 540 void tcg_temp_free_i32(TCGv_i32 arg);
 541 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
 542
 543 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
 544 TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
 545                                 const char *name);
 546 TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
 547 static inline TCGv_i64 tcg_temp_new_i64(void)
 548 {
 549     return tcg_temp_new_internal_i64(0);
 550 }
 551 static inline TCGv_i64 tcg_temp_local_new_i64(void)
 552 {
 553     return tcg_temp_new_internal_i64(1);
 554 }
 555 void tcg_temp_free_i64(TCGv_i64 arg);
 556 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
 557
 558 #if defined(CONFIG_DEBUG_TCG)
 559 /* If you call tcg_clear_temp_count() at the start of a section of
 560  * code which is not supposed to leak any TCG temporaries, then
 561  * calling tcg_check_temp_count() at the end of the section will
 562  * return 1 if the section did in fact leak a temporary.
 563  */
 564 void tcg_clear_temp_count(void);
 565 int tcg_check_temp_count(void);
 566 #else
 567 #define tcg_clear_temp_count() do { } while (0)
 568 #define tcg_check_temp_count() 0
 569 #endif
 570
 571 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
 572
 573 #define TCG_CT_ALIAS  0x80
 574 #define TCG_CT_IALIAS 0x40
 575 #define TCG_CT_REG    0x01
 576 #define TCG_CT_CONST  0x02 /* any constant of register size */
 577
 578 typedef struct TCGArgConstraint {
 579     uint16_t ct;
 580     uint8_t alias_index;
 581     union {
 582         TCGRegSet regs;
 583     } u;
 584 } TCGArgConstraint;
 585
 586 #define TCG_MAX_OP_ARGS 16
 587
 588 /* Bits for TCGOpDef->flags, 8 bits available.  */
 589 enum {
 590     /* Instruction defines the end of a basic block.  */
 591     TCG_OPF_BB_END       = 0x01,
 592     /* Instruction clobbers call registers and potentially update globals.  */
 593     TCG_OPF_CALL_CLOBBER = 0x02,
 594     /* Instruction has side effects: it cannot be removed if its outputs
 595        are not used, and might trigger exceptions.  */
 596     TCG_OPF_SIDE_EFFECTS = 0x04,
 597     /* Instruction operands are 64-bits (otherwise 32-bits).  */
 598     TCG_OPF_64BIT        = 0x08,
 599     /* Instruction is optional and not implemented by the host, or insn
 600        is generic and should not be implemened by the host.  */
 601     TCG_OPF_NOT_PRESENT  = 0x10,
 602 };
 603
 604 typedef struct TCGOpDef {
 605     const char *name;
 606     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
 607     uint8_t flags;
 608     TCGArgConstraint *args_ct;
 609     int *sorted_args;
 610 #if defined(CONFIG_DEBUG_TCG)
 611     int used;
 612 #endif
 613 } TCGOpDef;
 614
 615 extern TCGOpDef tcg_op_defs[];
 616 extern const size_t tcg_op_defs_max;
 617
 618 typedef struct TCGTargetOpDef {
 619     TCGOpcode op;
 620     const char *args_ct_str[TCG_MAX_OP_ARGS];
 621 } TCGTargetOpDef;
 622
 623 #define tcg_abort() \
 624 do {\
 625     fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
 626     abort();\
 627 } while (0)
 628
 629 #ifdef CONFIG_DEBUG_TCG
 630 # define tcg_debug_assert(X) do { assert(X); } while (0)
 631 #elif QEMU_GNUC_PREREQ(4, 5)
 632 # define tcg_debug_assert(X) \
 633     do { if (!(X)) { __builtin_unreachable(); } } while (0)
 634 #else
 635 # define tcg_debug_assert(X) do { (void)(X); } while (0)
 636 #endif
 637
 638 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 639
 640 #if TCG_TARGET_REG_BITS == 32
 641 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 642 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 643
 644 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((tcg_target_long)(V)))
 645 #define tcg_global_reg_new_ptr(R, N) \
 646     TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
 647 #define tcg_global_mem_new_ptr(R, O, N) \
 648     TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
 649 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
 650 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
 651 #else
 652 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
 653 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
 654
 655 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((tcg_target_long)(V)))
 656 #define tcg_global_reg_new_ptr(R, N) \
 657     TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
 658 #define tcg_global_mem_new_ptr(R, O, N) \
 659     TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
 660 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
 661 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
 662 #endif
 663
 664 void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
 665                    int sizemask, TCGArg ret, int nargs, TCGArg *args);
 666
 667 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
 668                         int c, int right, int arith);
 669
 670 TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args,
 671                      TCGOpDef *tcg_op_def);
 672
 673 /* only used for debugging purposes */
 674 void tcg_register_helper(void *func, const char *name);
 675 const char *tcg_helper_get_name(TCGContext *s, void *func);
 676 void tcg_dump_ops(TCGContext *s);
 677
 678 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
 679 TCGv_i32 tcg_const_i32(int32_t val);
 680 TCGv_i64 tcg_const_i64(int64_t val);
 681 TCGv_i32 tcg_const_local_i32(int32_t val);
 682 TCGv_i64 tcg_const_local_i64(int64_t val);
 683
 684 /**
 685  * tcg_qemu_tb_exec:
 686  * @env: CPUArchState * for the CPU
 687  * @tb_ptr: address of generated code for the TB to execute
 688  *
 689  * Start executing code from a given translation block.
 690  * Where translation blocks have been linked, execution
 691  * may proceed from the given TB into successive ones.
 692  * Control eventually returns only when some action is needed
 693  * from the top-level loop: either control must pass to a TB
 694  * which has not yet been directly linked, or an asynchronous
 695  * event such as an interrupt needs handling.
 696  *
 697  * The return value is a pointer to the next TB to execute
 698  * (if known; otherwise zero). This pointer is assumed to be
 699  * 4-aligned, and the bottom two bits are used to return further
 700  * information:
 701  *  0, 1: the link between this TB and the next is via the specified
 702  *        TB index (0 or 1). That is, we left the TB via (the equivalent
 703  *        of) "goto_tb <index>". The main loop uses this to determine
 704  *        how to link the TB just executed to the next.
 705  *  2:    we are using instruction counting code generation, and we
 706  *        did not start executing this TB because the instruction counter
 707  *        would hit zero midway through it. In this case the next-TB pointer
 708  *        returned is the TB we were about to execute, and the caller must
 709  *        arrange to execute the remaining count of instructions.
 710  *  3:    we stopped because the CPU's exit_request flag was set
 711  *        (usually meaning that there is an interrupt that needs to be
 712  *        handled). The next-TB pointer returned is the TB we were
 713  *        about to execute when we noticed the pending exit request.
 714  *
 715  * If the bottom two bits indicate an exit-via-index then the CPU
 716  * state is correctly synchronised and ready for execution of the next
 717  * TB (and in particular the guest PC is the address to execute next).
 718  * Otherwise, we gave up on execution of this TB before it started, and
 719  * the caller must fix up the CPU state by calling cpu_pc_from_tb()
 720  * with the next-TB pointer we return.
 721  *
 722  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
 723  * to this default (which just calls the prologue.code emitted by
 724  * tcg_target_qemu_prologue()).
 725  */
 726 #define TB_EXIT_MASK 3
 727 #define TB_EXIT_IDX0 0
 728 #define TB_EXIT_IDX1 1
 729 #define TB_EXIT_ICOUNT_EXPIRED 2
 730 #define TB_EXIT_REQUESTED 3
 731
 732 #if !defined(tcg_qemu_tb_exec)
 733 # define tcg_qemu_tb_exec(env, tb_ptr) \
 734     ((tcg_target_ulong (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, \
 735                                                                       tb_ptr)
 736 #endif
 737
 738 void tcg_register_jit(void *buf, size_t buf_size);
 739
 740 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
 741 /* Generate TB finalization at the end of block */
 742 void tcg_out_tb_finalize(TCGContext *s);
 743 #endif