tcg/x86_64/tcg-target.c

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
  25     "%rax",
  26     "%rcx",
  27     "%rdx",
  28     "%rbx",
  29     "%rsp",
  30     "%rbp",
  31     "%rsi",
  32     "%rdi",
  33     "%r8",
  34     "%r9",
  35     "%r10",
  36     "%r11",
  37     "%r12",
  38     "%r13",
  39     "%r14",
  40     "%r15",
  41 };
  42
  43 int tcg_target_reg_alloc_order[] = {
  44     TCG_REG_RDI,
  45     TCG_REG_RSI,
  46     TCG_REG_RDX,
  47     TCG_REG_RCX,
  48     TCG_REG_R8,
  49     TCG_REG_R9,
  50     TCG_REG_RAX,
  51     TCG_REG_R10,
  52     TCG_REG_R11,
  53
  54     TCG_REG_RBP,
  55     TCG_REG_RBX,
  56     TCG_REG_R12,
  57     TCG_REG_R13,
  58     TCG_REG_R14,
  59     TCG_REG_R15,
  60 };
  61
  62 const int tcg_target_call_iarg_regs[6] = {
  63     TCG_REG_RDI,
  64     TCG_REG_RSI,
  65     TCG_REG_RDX,
  66     TCG_REG_RCX,
  67     TCG_REG_R8,
  68     TCG_REG_R9,
  69 };
  70
  71 const int tcg_target_call_oarg_regs[2] = {
  72     TCG_REG_RAX,
  73     TCG_REG_RDX
  74 };
  75
  76 static uint8_t *tb_ret_addr;
  77
  78 static void patch_reloc(uint8_t *code_ptr, int type,
  79                         tcg_target_long value, tcg_target_long addend)
  80 {
  81     value += addend;
  82     switch(type) {
  83     case R_X86_64_32:
  84         if (value != (uint32_t)value)
  85             tcg_abort();
  86         *(uint32_t *)code_ptr = value;
  87         break;
  88     case R_X86_64_32S:
  89         if (value != (int32_t)value)
  90             tcg_abort();
  91         *(uint32_t *)code_ptr = value;
  92         break;
  93     case R_386_PC32:
  94         value -= (long)code_ptr;
  95         if (value != (int32_t)value)
  96             tcg_abort();
  97         *(uint32_t *)code_ptr = value;
  98         break;
  99     default:
 100         tcg_abort();
 101     }
 102 }
 103
 104 /* maximum number of register used for input function arguments */
 105 static inline int tcg_target_get_call_iarg_regs_count(int flags)
 106 {
 107     return 6;
 108 }
 109
 110 /* parse target specific constraints */
 111 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
 112 {
 113     const char *ct_str;
 114
 115     ct_str = *pct_str;
 116     switch(ct_str[0]) {
 117     case 'a':
 118         ct->ct |= TCG_CT_REG;
 119         tcg_regset_set_reg(ct->u.regs, TCG_REG_RAX);
 120         break;
 121     case 'b':
 122         ct->ct |= TCG_CT_REG;
 123         tcg_regset_set_reg(ct->u.regs, TCG_REG_RBX);
 124         break;
 125     case 'c':
 126         ct->ct |= TCG_CT_REG;
 127         tcg_regset_set_reg(ct->u.regs, TCG_REG_RCX);
 128         break;
 129     case 'd':
 130         ct->ct |= TCG_CT_REG;
 131         tcg_regset_set_reg(ct->u.regs, TCG_REG_RDX);
 132         break;
 133     case 'S':
 134         ct->ct |= TCG_CT_REG;
 135         tcg_regset_set_reg(ct->u.regs, TCG_REG_RSI);
 136         break;
 137     case 'D':
 138         ct->ct |= TCG_CT_REG;
 139         tcg_regset_set_reg(ct->u.regs, TCG_REG_RDI);
 140         break;
 141     case 'q':
 142         ct->ct |= TCG_CT_REG;
 143         tcg_regset_set32(ct->u.regs, 0, 0xf);
 144         break;
 145     case 'r':
 146         ct->ct |= TCG_CT_REG;
 147         tcg_regset_set32(ct->u.regs, 0, 0xffff);
 148         break;
 149     case 'L': /* qemu_ld/st constraint */
 150         ct->ct |= TCG_CT_REG;
 151         tcg_regset_set32(ct->u.regs, 0, 0xffff);
 152         tcg_regset_reset_reg(ct->u.regs, TCG_REG_RSI);
 153         tcg_regset_reset_reg(ct->u.regs, TCG_REG_RDI);
 154         break;
 155     case 'e':
 156         ct->ct |= TCG_CT_CONST_S32;
 157         break;
 158     case 'Z':
 159         ct->ct |= TCG_CT_CONST_U32;
 160         break;
 161     default:
 162         return -1;
 163     }
 164     ct_str++;
 165     *pct_str = ct_str;
 166     return 0;
 167 }
 168
 169 /* test if a constant matches the constraint */
 170 static inline int tcg_target_const_match(tcg_target_long val,
 171                                          const TCGArgConstraint *arg_ct)
 172 {
 173     int ct;
 174     ct = arg_ct->ct;
 175     if (ct & TCG_CT_CONST)
 176         return 1;
 177     else if ((ct & TCG_CT_CONST_S32) && val == (int32_t)val)
 178         return 1;
 179     else if ((ct & TCG_CT_CONST_U32) && val == (uint32_t)val)
 180         return 1;
 181     else
 182         return 0;
 183 }
 184
 185 #define ARITH_ADD 0
 186 #define ARITH_OR  1
 187 #define ARITH_ADC 2
 188 #define ARITH_SBB 3
 189 #define ARITH_AND 4
 190 #define ARITH_SUB 5
 191 #define ARITH_XOR 6
 192 #define ARITH_CMP 7
 193
 194 #define SHIFT_SHL 4
 195 #define SHIFT_SHR 5
 196 #define SHIFT_SAR 7
 197
 198 #define JCC_JMP (-1)
 199 #define JCC_JO  0x0
 200 #define JCC_JNO 0x1
 201 #define JCC_JB  0x2
 202 #define JCC_JAE 0x3
 203 #define JCC_JE  0x4
 204 #define JCC_JNE 0x5
 205 #define JCC_JBE 0x6
 206 #define JCC_JA  0x7
 207 #define JCC_JS  0x8
 208 #define JCC_JNS 0x9
 209 #define JCC_JP  0xa
 210 #define JCC_JNP 0xb
 211 #define JCC_JL  0xc
 212 #define JCC_JGE 0xd
 213 #define JCC_JLE 0xe
 214 #define JCC_JG  0xf
 215
 216 #define P_EXT   0x100 /* 0x0f opcode prefix */
 217 #define P_REXW  0x200 /* set rex.w = 1 */
 218 #define P_REXB  0x400 /* force rex use for byte registers */
 219
 220 static const uint8_t tcg_cond_to_jcc[10] = {
 221     [TCG_COND_EQ] = JCC_JE,
 222     [TCG_COND_NE] = JCC_JNE,
 223     [TCG_COND_LT] = JCC_JL,
 224     [TCG_COND_GE] = JCC_JGE,
 225     [TCG_COND_LE] = JCC_JLE,
 226     [TCG_COND_GT] = JCC_JG,
 227     [TCG_COND_LTU] = JCC_JB,
 228     [TCG_COND_GEU] = JCC_JAE,
 229     [TCG_COND_LEU] = JCC_JBE,
 230     [TCG_COND_GTU] = JCC_JA,
 231 };
 232
 233 static inline void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x)
 234 {
 235     int rex;
 236     rex = ((opc >> 6) & 0x8) | ((r >> 1) & 0x4) |
 237         ((x >> 2) & 2) | ((rm >> 3) & 1);
 238     if (rex || (opc & P_REXB)) {
 239         tcg_out8(s, rex | 0x40);
 240     }
 241     if (opc & P_EXT)
 242         tcg_out8(s, 0x0f);
 243     tcg_out8(s, opc);
 244 }
 245
 246 static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm)
 247 {
 248     tcg_out_opc(s, opc, r, rm, 0);
 249     tcg_out8(s, 0xc0 | ((r & 7) << 3) | (rm & 7));
 250 }
 251
 252 /* rm < 0 means no register index plus (-rm - 1 immediate bytes) */
 253 static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm,
 254                                         tcg_target_long offset)
 255 {
 256     if (rm < 0) {
 257         tcg_target_long val;
 258         tcg_out_opc(s, opc, r, 0, 0);
 259         val = offset - ((tcg_target_long)s->code_ptr + 5 + (-rm - 1));
 260         if (val == (int32_t)val) {
 261             /* eip relative */
 262             tcg_out8(s, 0x05 | ((r & 7) << 3));
 263             tcg_out32(s, val);
 264         } else if (offset == (int32_t)offset) {
 265             tcg_out8(s, 0x04 | ((r & 7) << 3));
 266             tcg_out8(s, 0x25); /* sib */
 267             tcg_out32(s, offset);
 268         } else {
 269             tcg_abort();
 270         }
 271     } else if (offset == 0 && (rm & 7) != TCG_REG_RBP) {
 272         tcg_out_opc(s, opc, r, rm, 0);
 273         if ((rm & 7) == TCG_REG_RSP) {
 274             tcg_out8(s, 0x04 | ((r & 7) << 3));
 275             tcg_out8(s, 0x24);
 276         } else {
 277             tcg_out8(s, 0x00 | ((r & 7) << 3) | (rm & 7));
 278         }
 279     } else if ((int8_t)offset == offset) {
 280         tcg_out_opc(s, opc, r, rm, 0);
 281         if ((rm & 7) == TCG_REG_RSP) {
 282             tcg_out8(s, 0x44 | ((r & 7) << 3));
 283             tcg_out8(s, 0x24);
 284         } else {
 285             tcg_out8(s, 0x40 | ((r & 7) << 3) | (rm & 7));
 286         }
 287         tcg_out8(s, offset);
 288     } else {
 289         tcg_out_opc(s, opc, r, rm, 0);
 290         if ((rm & 7) == TCG_REG_RSP) {
 291             tcg_out8(s, 0x84 | ((r & 7) << 3));
 292             tcg_out8(s, 0x24);
 293         } else {
 294             tcg_out8(s, 0x80 | ((r & 7) << 3) | (rm & 7));
 295         }
 296         tcg_out32(s, offset);
 297     }
 298 }
 299
 300 #if defined(CONFIG_SOFTMMU)
 301 /* XXX: incomplete. index must be different from ESP */
 302 static void tcg_out_modrm_offset2(TCGContext *s, int opc, int r, int rm,
 303                                   int index, int shift,
 304                                   tcg_target_long offset)
 305 {
 306     int mod;
 307     if (rm == -1)
 308         tcg_abort();
 309     if (offset == 0 && (rm & 7) != TCG_REG_RBP) {
 310         mod = 0;
 311     } else if (offset == (int8_t)offset) {
 312         mod = 0x40;
 313     } else if (offset == (int32_t)offset) {
 314         mod = 0x80;
 315     } else {
 316         tcg_abort();
 317     }
 318     if (index == -1) {
 319         tcg_out_opc(s, opc, r, rm, 0);
 320         if ((rm & 7) == TCG_REG_RSP) {
 321             tcg_out8(s, mod | ((r & 7) << 3) | 0x04);
 322             tcg_out8(s, 0x04 | (rm & 7));
 323         } else {
 324             tcg_out8(s, mod | ((r & 7) << 3) | (rm & 7));
 325         }
 326     } else {
 327         tcg_out_opc(s, opc, r, rm, index);
 328         tcg_out8(s, mod | ((r & 7) << 3) | 0x04);
 329         tcg_out8(s, (shift << 6) | ((index & 7) << 3) | (rm & 7));
 330     }
 331     if (mod == 0x40) {
 332         tcg_out8(s, offset);
 333     } else if (mod == 0x80) {
 334         tcg_out32(s, offset);
 335     }
 336 }
 337 #endif
 338
 339 static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
 340 {
 341     tcg_out_modrm(s, 0x8b | P_REXW, ret, arg);
 342 }
 343
 344 static inline void tcg_out_movi(TCGContext *s, TCGType type,
 345                                 int ret, tcg_target_long arg)
 346 {
 347     if (arg == 0) {
 348         tcg_out_modrm(s, 0x01 | (ARITH_XOR << 3), ret, ret); /* xor r0,r0 */
 349     } else if (arg == (uint32_t)arg || type == TCG_TYPE_I32) {
 350         tcg_out_opc(s, 0xb8 + (ret & 7), 0, ret, 0);
 351         tcg_out32(s, arg);
 352     } else if (arg == (int32_t)arg) {
 353         tcg_out_modrm(s, 0xc7 | P_REXW, 0, ret);
 354         tcg_out32(s, arg);
 355     } else {
 356         tcg_out_opc(s, (0xb8 + (ret & 7)) | P_REXW, 0, ret, 0);
 357         tcg_out32(s, arg);
 358         tcg_out32(s, arg >> 32);
 359     }
 360 }
 361
 362 static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
 363                               int arg1, tcg_target_long arg2)
 364 {
 365     if (type == TCG_TYPE_I32)
 366         tcg_out_modrm_offset(s, 0x8b, ret, arg1, arg2); /* movl */
 367     else
 368         tcg_out_modrm_offset(s, 0x8b | P_REXW, ret, arg1, arg2); /* movq */
 369 }
 370
 371 static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
 372                               int arg1, tcg_target_long arg2)
 373 {
 374     if (type == TCG_TYPE_I32)
 375         tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2); /* movl */
 376     else
 377         tcg_out_modrm_offset(s, 0x89 | P_REXW, arg, arg1, arg2); /* movq */
 378 }
 379
 380 static inline void tgen_arithi32(TCGContext *s, int c, int r0, int32_t val)
 381 {
 382     if (val == (int8_t)val) {
 383         tcg_out_modrm(s, 0x83, c, r0);
 384         tcg_out8(s, val);
 385     } else {
 386         tcg_out_modrm(s, 0x81, c, r0);
 387         tcg_out32(s, val);
 388     }
 389 }
 390
 391 static inline void tgen_arithi64(TCGContext *s, int c, int r0, int64_t val)
 392 {
 393     if (val == (int8_t)val) {
 394         tcg_out_modrm(s, 0x83 | P_REXW, c, r0);
 395         tcg_out8(s, val);
 396     } else if (val == (int32_t)val) {
 397         tcg_out_modrm(s, 0x81 | P_REXW, c, r0);
 398         tcg_out32(s, val);
 399     } else if (c == ARITH_AND && val == (uint32_t)val) {
 400         tcg_out_modrm(s, 0x81, c, r0);
 401         tcg_out32(s, val);
 402     } else {
 403         tcg_abort();
 404     }
 405 }
 406
 407 static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
 408 {
 409     if (val != 0)
 410         tgen_arithi64(s, ARITH_ADD, reg, val);
 411 }
 412
 413 static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
 414 {
 415     int32_t val, val1;
 416     TCGLabel *l = &s->labels[label_index];
 417
 418     if (l->has_value) {
 419         val = l->u.value - (tcg_target_long)s->code_ptr;
 420         val1 = val - 2;
 421         if ((int8_t)val1 == val1) {
 422             if (opc == -1)
 423                 tcg_out8(s, 0xeb);
 424             else
 425                 tcg_out8(s, 0x70 + opc);
 426             tcg_out8(s, val1);
 427         } else {
 428             if (opc == -1) {
 429                 tcg_out8(s, 0xe9);
 430                 tcg_out32(s, val - 5);
 431             } else {
 432                 tcg_out8(s, 0x0f);
 433                 tcg_out8(s, 0x80 + opc);
 434                 tcg_out32(s, val - 6);
 435             }
 436         }
 437     } else {
 438         if (opc == -1) {
 439             tcg_out8(s, 0xe9);
 440         } else {
 441             tcg_out8(s, 0x0f);
 442             tcg_out8(s, 0x80 + opc);
 443         }
 444         tcg_out_reloc(s, s->code_ptr, R_386_PC32, label_index, -4);
 445         s->code_ptr += 4;
 446     }
 447 }
 448
 449 static void tcg_out_brcond(TCGContext *s, int cond,
 450                            TCGArg arg1, TCGArg arg2, int const_arg2,
 451                            int label_index, int rexw)
 452 {
 453     if (const_arg2) {
 454         if (arg2 == 0) {
 455             /* test r, r */
 456             tcg_out_modrm(s, 0x85 | rexw, arg1, arg1);
 457         } else {
 458             if (rexw)
 459                 tgen_arithi64(s, ARITH_CMP, arg1, arg2);
 460             else
 461                 tgen_arithi32(s, ARITH_CMP, arg1, arg2);
 462         }
 463     } else {
 464         tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3) | rexw, arg2, arg1);
 465     }
 466     tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
 467 }
 468
 469 #if defined(CONFIG_SOFTMMU)
 470
 471 #include "../../softmmu_defs.h"
 472
 473 static void *qemu_ld_helpers[4] = {
 474     __ldb_mmu,
 475     __ldw_mmu,
 476     __ldl_mmu,
 477     __ldq_mmu,
 478 };
 479
 480 static void *qemu_st_helpers[4] = {
 481     __stb_mmu,
 482     __stw_mmu,
 483     __stl_mmu,
 484     __stq_mmu,
 485 };
 486 #endif
 487
 488 static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
 489                             int opc)
 490 {
 491     int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, rexw;
 492 #if defined(CONFIG_SOFTMMU)
 493     uint8_t *label1_ptr, *label2_ptr;
 494 #endif
 495
 496     data_reg = *args++;
 497     addr_reg = *args++;
 498     mem_index = *args;
 499     s_bits = opc & 3;
 500
 501     r0 = TCG_REG_RDI;
 502     r1 = TCG_REG_RSI;
 503
 504 #if TARGET_LONG_BITS == 32
 505     rexw = 0;
 506 #else
 507     rexw = P_REXW;
 508 #endif
 509 #if defined(CONFIG_SOFTMMU)
 510     /* mov */
 511     tcg_out_modrm(s, 0x8b | rexw, r1, addr_reg);
 512
 513     /* mov */
 514     tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg);
 515
 516     tcg_out_modrm(s, 0xc1 | rexw, 5, r1); /* shr $x, r1 */
 517     tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
 518
 519     tcg_out_modrm(s, 0x81 | rexw, 4, r0); /* andl $x, r0 */
 520     tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
 521
 522     tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
 523     tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
 524
 525     /* lea offset(r1, env), r1 */
 526     tcg_out_modrm_offset2(s, 0x8d | P_REXW, r1, r1, TCG_AREG0, 0,
 527                           offsetof(CPUState, tlb_table[mem_index][0].addr_read));
 528
 529     /* cmp 0(r1), r0 */
 530     tcg_out_modrm_offset(s, 0x3b | rexw, r0, r1, 0);
 531
 532     /* mov */
 533     tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg);
 534
 535     /* je label1 */
 536     tcg_out8(s, 0x70 + JCC_JE);
 537     label1_ptr = s->code_ptr;
 538     s->code_ptr++;
 539
 540     /* XXX: move that code at the end of the TB */
 541     tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RSI, mem_index);
 542     tcg_out8(s, 0xe8);
 543     tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] -
 544               (tcg_target_long)s->code_ptr - 4);
 545
 546     switch(opc) {
 547     case 0 | 4:
 548         /* movsbq */
 549         tcg_out_modrm(s, 0xbe | P_EXT | P_REXW, data_reg, TCG_REG_RAX);
 550         break;
 551     case 1 | 4:
 552         /* movswq */
 553         tcg_out_modrm(s, 0xbf | P_EXT | P_REXW, data_reg, TCG_REG_RAX);
 554         break;
 555     case 2 | 4:
 556         /* movslq */
 557         tcg_out_modrm(s, 0x63 | P_REXW, data_reg, TCG_REG_RAX);
 558         break;
 559     case 0:
 560     case 1:
 561     case 2:
 562     default:
 563         /* movl */
 564         tcg_out_modrm(s, 0x8b, data_reg, TCG_REG_RAX);
 565         break;
 566     case 3:
 567         tcg_out_mov(s, data_reg, TCG_REG_RAX);
 568         break;
 569     }
 570
 571     /* jmp label2 */
 572     tcg_out8(s, 0xeb);
 573     label2_ptr = s->code_ptr;
 574     s->code_ptr++;
 575
 576     /* label1: */
 577     *label1_ptr = s->code_ptr - label1_ptr - 1;
 578
 579     /* add x(r1), r0 */
 580     tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) -
 581                          offsetof(CPUTLBEntry, addr_read));
 582 #else
 583     r0 = addr_reg;
 584 #endif
 585
 586 #ifdef TARGET_WORDS_BIGENDIAN
 587     bswap = 1;
 588 #else
 589     bswap = 0;
 590 #endif
 591     switch(opc) {
 592     case 0:
 593         /* movzbl */
 594         tcg_out_modrm_offset(s, 0xb6 | P_EXT, data_reg, r0, 0);
 595         break;
 596     case 0 | 4:
 597         /* movsbX */
 598         tcg_out_modrm_offset(s, 0xbe | P_EXT | rexw, data_reg, r0, 0);
 599         break;
 600     case 1:
 601         /* movzwl */
 602         tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0);
 603         if (bswap) {
 604             /* rolw $8, data_reg */
 605             tcg_out8(s, 0x66);
 606             tcg_out_modrm(s, 0xc1, 0, data_reg);
 607             tcg_out8(s, 8);
 608         }
 609         break;
 610     case 1 | 4:
 611         if (bswap) {
 612             /* movzwl */
 613             tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0);
 614             /* rolw $8, data_reg */
 615             tcg_out8(s, 0x66);
 616             tcg_out_modrm(s, 0xc1, 0, data_reg);
 617             tcg_out8(s, 8);
 618
 619             /* movswX data_reg, data_reg */
 620             tcg_out_modrm(s, 0xbf | P_EXT | rexw, data_reg, data_reg);
 621         } else {
 622             /* movswX */
 623             tcg_out_modrm_offset(s, 0xbf | P_EXT | rexw, data_reg, r0, 0);
 624         }
 625         break;
 626     case 2:
 627         /* movl (r0), data_reg */
 628         tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
 629         if (bswap) {
 630             /* bswap */
 631             tcg_out_opc(s, (0xc8 + (data_reg & 7)) | P_EXT, 0, data_reg, 0);
 632         }
 633         break;
 634     case 2 | 4:
 635         if (bswap) {
 636             /* movl (r0), data_reg */
 637             tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
 638             /* bswap */
 639             tcg_out_opc(s, (0xc8 + (data_reg & 7)) | P_EXT, 0, data_reg, 0);
 640             /* movslq */
 641             tcg_out_modrm(s, 0x63 | P_REXW, data_reg, data_reg);
 642         } else {
 643             /* movslq */
 644             tcg_out_modrm_offset(s, 0x63 | P_REXW, data_reg, r0, 0);
 645         }
 646         break;
 647     case 3:
 648         /* movq (r0), data_reg */
 649         tcg_out_modrm_offset(s, 0x8b | P_REXW, data_reg, r0, 0);
 650         if (bswap) {
 651             /* bswap */
 652             tcg_out_opc(s, (0xc8 + (data_reg & 7)) | P_EXT | P_REXW, 0, data_reg, 0);
 653         }
 654         break;
 655     default:
 656         tcg_abort();
 657     }
 658
 659 #if defined(CONFIG_SOFTMMU)
 660     /* label2: */
 661     *label2_ptr = s->code_ptr - label2_ptr - 1;
 662 #endif
 663 }
 664
 665 static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
 666                             int opc)
 667 {
 668     int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, rexw;
 669 #if defined(CONFIG_SOFTMMU)
 670     uint8_t *label1_ptr, *label2_ptr;
 671 #endif
 672
 673     data_reg = *args++;
 674     addr_reg = *args++;
 675     mem_index = *args;
 676
 677     s_bits = opc;
 678
 679     r0 = TCG_REG_RDI;
 680     r1 = TCG_REG_RSI;
 681
 682 #if TARGET_LONG_BITS == 32
 683     rexw = 0;
 684 #else
 685     rexw = P_REXW;
 686 #endif
 687 #if defined(CONFIG_SOFTMMU)
 688     /* mov */
 689     tcg_out_modrm(s, 0x8b | rexw, r1, addr_reg);
 690
 691     /* mov */
 692     tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg);
 693
 694     tcg_out_modrm(s, 0xc1 | rexw, 5, r1); /* shr $x, r1 */
 695     tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
 696
 697     tcg_out_modrm(s, 0x81 | rexw, 4, r0); /* andl $x, r0 */
 698     tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
 699
 700     tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
 701     tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
 702
 703     /* lea offset(r1, env), r1 */
 704     tcg_out_modrm_offset2(s, 0x8d | P_REXW, r1, r1, TCG_AREG0, 0,
 705                           offsetof(CPUState, tlb_table[mem_index][0].addr_write));
 706
 707     /* cmp 0(r1), r0 */
 708     tcg_out_modrm_offset(s, 0x3b | rexw, r0, r1, 0);
 709
 710     /* mov */
 711     tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg);
 712
 713     /* je label1 */
 714     tcg_out8(s, 0x70 + JCC_JE);
 715     label1_ptr = s->code_ptr;
 716     s->code_ptr++;
 717
 718     /* XXX: move that code at the end of the TB */
 719     switch(opc) {
 720     case 0:
 721         /* movzbl */
 722         tcg_out_modrm(s, 0xb6 | P_EXT | P_REXB, TCG_REG_RSI, data_reg);
 723         break;
 724     case 1:
 725         /* movzwl */
 726         tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_RSI, data_reg);
 727         break;
 728     case 2:
 729         /* movl */
 730         tcg_out_modrm(s, 0x8b, TCG_REG_RSI, data_reg);
 731         break;
 732     default:
 733     case 3:
 734         tcg_out_mov(s, TCG_REG_RSI, data_reg);
 735         break;
 736     }
 737     tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RDX, mem_index);
 738     tcg_out8(s, 0xe8);
 739     tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
 740               (tcg_target_long)s->code_ptr - 4);
 741
 742     /* jmp label2 */
 743     tcg_out8(s, 0xeb);
 744     label2_ptr = s->code_ptr;
 745     s->code_ptr++;
 746
 747     /* label1: */
 748     *label1_ptr = s->code_ptr - label1_ptr - 1;
 749
 750     /* add x(r1), r0 */
 751     tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) -
 752                          offsetof(CPUTLBEntry, addr_write));
 753 #else
 754     r0 = addr_reg;
 755 #endif
 756
 757 #ifdef TARGET_WORDS_BIGENDIAN
 758     bswap = 1;
 759 #else
 760     bswap = 0;
 761 #endif
 762     switch(opc) {
 763     case 0:
 764         /* movb */
 765         tcg_out_modrm_offset(s, 0x88 | P_REXB, data_reg, r0, 0);
 766         break;
 767     case 1:
 768         if (bswap) {
 769             tcg_out_modrm(s, 0x8b, r1, data_reg); /* movl */
 770             tcg_out8(s, 0x66); /* rolw $8, %ecx */
 771             tcg_out_modrm(s, 0xc1, 0, r1);
 772             tcg_out8(s, 8);
 773             data_reg = r1;
 774         }
 775         /* movw */
 776         tcg_out8(s, 0x66);
 777         tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
 778         break;
 779     case 2:
 780         if (bswap) {
 781             tcg_out_modrm(s, 0x8b, r1, data_reg); /* movl */
 782             /* bswap data_reg */
 783             tcg_out_opc(s, (0xc8 + r1) | P_EXT, 0, r1, 0);
 784             data_reg = r1;
 785         }
 786         /* movl */
 787         tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
 788         break;
 789     case 3:
 790         if (bswap) {
 791             tcg_out_mov(s, r1, data_reg);
 792             /* bswap data_reg */
 793             tcg_out_opc(s, (0xc8 + r1) | P_EXT | P_REXW, 0, r1, 0);
 794             data_reg = r1;
 795         }
 796         /* movq */
 797         tcg_out_modrm_offset(s, 0x89 | P_REXW, data_reg, r0, 0);
 798         break;
 799     default:
 800         tcg_abort();
 801     }
 802
 803 #if defined(CONFIG_SOFTMMU)
 804     /* label2: */
 805     *label2_ptr = s->code_ptr - label2_ptr - 1;
 806 #endif
 807 }
 808
 809 static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
 810                               const int *const_args)
 811 {
 812     int c;
 813
 814     switch(opc) {
 815     case INDEX_op_exit_tb:
 816         tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_RAX, args[0]);
 817         tcg_out8(s, 0xe9); /* jmp tb_ret_addr */
 818         tcg_out32(s, tb_ret_addr - s->code_ptr - 4);
 819         break;
 820     case INDEX_op_goto_tb:
 821         if (s->tb_jmp_offset) {
 822             /* direct jump method */
 823             tcg_out8(s, 0xe9); /* jmp im */
 824             s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
 825             tcg_out32(s, 0);
 826         } else {
 827             /* indirect jump method */
 828             /* jmp Ev */
 829             tcg_out_modrm_offset(s, 0xff, 4, -1,
 830                                  (tcg_target_long)(s->tb_next +
 831                                                    args[0]));
 832         }
 833         s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
 834         break;
 835     case INDEX_op_call:
 836         if (const_args[0]) {
 837             tcg_out8(s, 0xe8);
 838             tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
 839         } else {
 840             tcg_out_modrm(s, 0xff, 2, args[0]);
 841         }
 842         break;
 843     case INDEX_op_jmp:
 844         if (const_args[0]) {
 845             tcg_out8(s, 0xe9);
 846             tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
 847         } else {
 848             tcg_out_modrm(s, 0xff, 4, args[0]);
 849         }
 850         break;
 851     case INDEX_op_br:
 852         tcg_out_jxx(s, JCC_JMP, args[0]);
 853         break;
 854     case INDEX_op_movi_i32:
 855         tcg_out_movi(s, TCG_TYPE_I32, args[0], (uint32_t)args[1]);
 856         break;
 857     case INDEX_op_movi_i64:
 858         tcg_out_movi(s, TCG_TYPE_I64, args[0], args[1]);
 859         break;
 860     case INDEX_op_ld8u_i32:
 861     case INDEX_op_ld8u_i64:
 862         /* movzbl */
 863         tcg_out_modrm_offset(s, 0xb6 | P_EXT, args[0], args[1], args[2]);
 864         break;
 865     case INDEX_op_ld8s_i32:
 866         /* movsbl */
 867         tcg_out_modrm_offset(s, 0xbe | P_EXT, args[0], args[1], args[2]);
 868         break;
 869     case INDEX_op_ld8s_i64:
 870         /* movsbq */
 871         tcg_out_modrm_offset(s, 0xbe | P_EXT | P_REXW, args[0], args[1], args[2]);
 872         break;
 873     case INDEX_op_ld16u_i32:
 874     case INDEX_op_ld16u_i64:
 875         /* movzwl */
 876         tcg_out_modrm_offset(s, 0xb7 | P_EXT, args[0], args[1], args[2]);
 877         break;
 878     case INDEX_op_ld16s_i32:
 879         /* movswl */
 880         tcg_out_modrm_offset(s, 0xbf | P_EXT, args[0], args[1], args[2]);
 881         break;
 882     case INDEX_op_ld16s_i64:
 883         /* movswq */
 884         tcg_out_modrm_offset(s, 0xbf | P_EXT | P_REXW, args[0], args[1], args[2]);
 885         break;
 886     case INDEX_op_ld_i32:
 887     case INDEX_op_ld32u_i64:
 888         /* movl */
 889         tcg_out_modrm_offset(s, 0x8b, args[0], args[1], args[2]);
 890         break;
 891     case INDEX_op_ld32s_i64:
 892         /* movslq */
 893         tcg_out_modrm_offset(s, 0x63 | P_REXW, args[0], args[1], args[2]);
 894         break;
 895     case INDEX_op_ld_i64:
 896         /* movq */
 897         tcg_out_modrm_offset(s, 0x8b | P_REXW, args[0], args[1], args[2]);
 898         break;
 899
 900     case INDEX_op_st8_i32:
 901     case INDEX_op_st8_i64:
 902         /* movb */
 903         tcg_out_modrm_offset(s, 0x88 | P_REXB, args[0], args[1], args[2]);
 904         break;
 905     case INDEX_op_st16_i32:
 906     case INDEX_op_st16_i64:
 907         /* movw */
 908         tcg_out8(s, 0x66);
 909         tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
 910         break;
 911     case INDEX_op_st_i32:
 912     case INDEX_op_st32_i64:
 913         /* movl */
 914         tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
 915         break;
 916     case INDEX_op_st_i64:
 917         /* movq */
 918         tcg_out_modrm_offset(s, 0x89 | P_REXW, args[0], args[1], args[2]);
 919         break;
 920
 921     case INDEX_op_sub_i32:
 922         c = ARITH_SUB;
 923         goto gen_arith32;
 924     case INDEX_op_and_i32:
 925         c = ARITH_AND;
 926         goto gen_arith32;
 927     case INDEX_op_or_i32:
 928         c = ARITH_OR;
 929         goto gen_arith32;
 930     case INDEX_op_xor_i32:
 931         c = ARITH_XOR;
 932         goto gen_arith32;
 933     case INDEX_op_add_i32:
 934         c = ARITH_ADD;
 935     gen_arith32:
 936         if (const_args[2]) {
 937             tgen_arithi32(s, c, args[0], args[2]);
 938         } else {
 939             tcg_out_modrm(s, 0x01 | (c << 3), args[2], args[0]);
 940         }
 941         break;
 942
 943     case INDEX_op_sub_i64:
 944         c = ARITH_SUB;
 945         goto gen_arith64;
 946     case INDEX_op_and_i64:
 947         c = ARITH_AND;
 948         goto gen_arith64;
 949     case INDEX_op_or_i64:
 950         c = ARITH_OR;
 951         goto gen_arith64;
 952     case INDEX_op_xor_i64:
 953         c = ARITH_XOR;
 954         goto gen_arith64;
 955     case INDEX_op_add_i64:
 956         c = ARITH_ADD;
 957     gen_arith64:
 958         if (const_args[2]) {
 959             tgen_arithi64(s, c, args[0], args[2]);
 960         } else {
 961             tcg_out_modrm(s, 0x01 | (c << 3) | P_REXW, args[2], args[0]);
 962         }
 963         break;
 964
 965     case INDEX_op_mul_i32:
 966         if (const_args[2]) {
 967             int32_t val;
 968             val = args[2];
 969             if (val == (int8_t)val) {
 970                 tcg_out_modrm(s, 0x6b, args[0], args[0]);
 971                 tcg_out8(s, val);
 972             } else {
 973                 tcg_out_modrm(s, 0x69, args[0], args[0]);
 974                 tcg_out32(s, val);
 975             }
 976         } else {
 977             tcg_out_modrm(s, 0xaf | P_EXT, args[0], args[2]);
 978         }
 979         break;
 980     case INDEX_op_mul_i64:
 981         if (const_args[2]) {
 982             int32_t val;
 983             val = args[2];
 984             if (val == (int8_t)val) {
 985                 tcg_out_modrm(s, 0x6b | P_REXW, args[0], args[0]);
 986                 tcg_out8(s, val);
 987             } else {
 988                 tcg_out_modrm(s, 0x69 | P_REXW, args[0], args[0]);
 989                 tcg_out32(s, val);
 990             }
 991         } else {
 992             tcg_out_modrm(s, 0xaf | P_EXT | P_REXW, args[0], args[2]);
 993         }
 994         break;
 995     case INDEX_op_div2_i32:
 996         tcg_out_modrm(s, 0xf7, 7, args[4]);
 997         break;
 998     case INDEX_op_divu2_i32:
 999         tcg_out_modrm(s, 0xf7, 6, args[4]);
1000         break;
1001     case INDEX_op_div2_i64:
1002         tcg_out_modrm(s, 0xf7 | P_REXW, 7, args[4]);
1003         break;
1004     case INDEX_op_divu2_i64:
1005         tcg_out_modrm(s, 0xf7 | P_REXW, 6, args[4]);
1006         break;
1007
1008     case INDEX_op_shl_i32:
1009         c = SHIFT_SHL;
1010     gen_shift32:
1011         if (const_args[2]) {
1012             if (args[2] == 1) {
1013                 tcg_out_modrm(s, 0xd1, c, args[0]);
1014             } else {
1015                 tcg_out_modrm(s, 0xc1, c, args[0]);
1016                 tcg_out8(s, args[2]);
1017             }
1018         } else {
1019             tcg_out_modrm(s, 0xd3, c, args[0]);
1020         }
1021         break;
1022     case INDEX_op_shr_i32:
1023         c = SHIFT_SHR;
1024         goto gen_shift32;
1025     case INDEX_op_sar_i32:
1026         c = SHIFT_SAR;
1027         goto gen_shift32;
1028
1029     case INDEX_op_shl_i64:
1030         c = SHIFT_SHL;
1031     gen_shift64:
1032         if (const_args[2]) {
1033             if (args[2] == 1) {
1034                 tcg_out_modrm(s, 0xd1 | P_REXW, c, args[0]);
1035             } else {
1036                 tcg_out_modrm(s, 0xc1 | P_REXW, c, args[0]);
1037                 tcg_out8(s, args[2]);
1038             }
1039         } else {
1040             tcg_out_modrm(s, 0xd3 | P_REXW, c, args[0]);
1041         }
1042         break;
1043     case INDEX_op_shr_i64:
1044         c = SHIFT_SHR;
1045         goto gen_shift64;
1046     case INDEX_op_sar_i64:
1047         c = SHIFT_SAR;
1048         goto gen_shift64;
1049
1050     case INDEX_op_brcond_i32:
1051         tcg_out_brcond(s, args[2], args[0], args[1], const_args[1],
1052                        args[3], 0);
1053         break;
1054     case INDEX_op_brcond_i64:
1055         tcg_out_brcond(s, args[2], args[0], args[1], const_args[1],
1056                        args[3], P_REXW);
1057         break;
1058
1059     case INDEX_op_bswap_i32:
1060         tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT, 0, args[0], 0);
1061         break;
1062     case INDEX_op_bswap_i64:
1063         tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT | P_REXW, 0, args[0], 0);
1064         break;
1065
1066     case INDEX_op_neg_i32:
1067         tcg_out_modrm(s, 0xf7, 3, args[0]);
1068         break;
1069     case INDEX_op_neg_i64:
1070         tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]);
1071         break;
1072
1073     case INDEX_op_qemu_ld8u:
1074         tcg_out_qemu_ld(s, args, 0);
1075         break;
1076     case INDEX_op_qemu_ld8s:
1077         tcg_out_qemu_ld(s, args, 0 | 4);
1078         break;
1079     case INDEX_op_qemu_ld16u:
1080         tcg_out_qemu_ld(s, args, 1);
1081         break;
1082     case INDEX_op_qemu_ld16s:
1083         tcg_out_qemu_ld(s, args, 1 | 4);
1084         break;
1085     case INDEX_op_qemu_ld32u:
1086         tcg_out_qemu_ld(s, args, 2);
1087         break;
1088     case INDEX_op_qemu_ld32s:
1089         tcg_out_qemu_ld(s, args, 2 | 4);
1090         break;
1091     case INDEX_op_qemu_ld64:
1092         tcg_out_qemu_ld(s, args, 3);
1093         break;
1094
1095     case INDEX_op_qemu_st8:
1096         tcg_out_qemu_st(s, args, 0);
1097         break;
1098     case INDEX_op_qemu_st16:
1099         tcg_out_qemu_st(s, args, 1);
1100         break;
1101     case INDEX_op_qemu_st32:
1102         tcg_out_qemu_st(s, args, 2);
1103         break;
1104     case INDEX_op_qemu_st64:
1105         tcg_out_qemu_st(s, args, 3);
1106         break;
1107
1108     default:
1109         tcg_abort();
1110     }
1111 }
1112
1113 static int tcg_target_callee_save_regs[] = {
1114     TCG_REG_RBP,
1115     TCG_REG_RBX,
1116     TCG_REG_R12,
1117     TCG_REG_R13,
1118     /*    TCG_REG_R14, */ /* currently used for the global env, so no
1119                              need to save */
1120     TCG_REG_R15,
1121 };
1122
1123 static inline void tcg_out_push(TCGContext *s, int reg)
1124 {
1125     tcg_out_opc(s, (0x50 + (reg & 7)), 0, reg, 0);
1126 }
1127
1128 static inline void tcg_out_pop(TCGContext *s, int reg)
1129 {
1130     tcg_out_opc(s, (0x58 + (reg & 7)), 0, reg, 0);
1131 }
1132
1133 /* Generate global QEMU prologue and epilogue code */
1134 void tcg_target_qemu_prologue(TCGContext *s)
1135 {
1136     int i, frame_size, push_size, stack_addend;
1137
1138     /* TB prologue */
1139     /* save all callee saved registers */
1140     for(i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) {
1141         tcg_out_push(s, tcg_target_callee_save_regs[i]);
1142
1143     }
1144     /* reserve some stack space */
1145     push_size = 8 + ARRAY_SIZE(tcg_target_callee_save_regs) * 8;
1146     frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE;
1147     frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) &
1148         ~(TCG_TARGET_STACK_ALIGN - 1);
1149     stack_addend = frame_size - push_size;
1150     tcg_out_addi(s, TCG_REG_RSP, -stack_addend);
1151
1152     tcg_out_modrm(s, 0xff, 4, TCG_REG_RDI); /* jmp *%rdi */
1153
1154     /* TB epilogue */
1155     tb_ret_addr = s->code_ptr;
1156     tcg_out_addi(s, TCG_REG_RSP, stack_addend);
1157     for(i = ARRAY_SIZE(tcg_target_callee_save_regs) - 1; i >= 0; i--) {
1158         tcg_out_pop(s, tcg_target_callee_save_regs[i]);
1159     }
1160     tcg_out8(s, 0xc3); /* ret */
1161 }
1162
1163 static const TCGTargetOpDef x86_64_op_defs[] = {
1164     { INDEX_op_exit_tb, { } },
1165     { INDEX_op_goto_tb, { } },
1166     { INDEX_op_call, { "ri" } }, /* XXX: might need a specific constant constraint */
1167     { INDEX_op_jmp, { "ri" } }, /* XXX: might need a specific constant constraint */
1168     { INDEX_op_br, { } },
1169
1170     { INDEX_op_mov_i32, { "r", "r" } },
1171     { INDEX_op_movi_i32, { "r" } },
1172     { INDEX_op_ld8u_i32, { "r", "r" } },
1173     { INDEX_op_ld8s_i32, { "r", "r" } },
1174     { INDEX_op_ld16u_i32, { "r", "r" } },
1175     { INDEX_op_ld16s_i32, { "r", "r" } },
1176     { INDEX_op_ld_i32, { "r", "r" } },
1177     { INDEX_op_st8_i32, { "r", "r" } },
1178     { INDEX_op_st16_i32, { "r", "r" } },
1179     { INDEX_op_st_i32, { "r", "r" } },
1180
1181     { INDEX_op_add_i32, { "r", "0", "ri" } },
1182     { INDEX_op_mul_i32, { "r", "0", "ri" } },
1183     { INDEX_op_div2_i32, { "a", "d", "0", "1", "r" } },
1184     { INDEX_op_divu2_i32, { "a", "d", "0", "1", "r" } },
1185     { INDEX_op_sub_i32, { "r", "0", "ri" } },
1186     { INDEX_op_and_i32, { "r", "0", "ri" } },
1187     { INDEX_op_or_i32, { "r", "0", "ri" } },
1188     { INDEX_op_xor_i32, { "r", "0", "ri" } },
1189
1190     { INDEX_op_shl_i32, { "r", "0", "ci" } },
1191     { INDEX_op_shr_i32, { "r", "0", "ci" } },
1192     { INDEX_op_sar_i32, { "r", "0", "ci" } },
1193
1194     { INDEX_op_brcond_i32, { "r", "ri" } },
1195
1196     { INDEX_op_mov_i64, { "r", "r" } },
1197     { INDEX_op_movi_i64, { "r" } },
1198     { INDEX_op_ld8u_i64, { "r", "r" } },
1199     { INDEX_op_ld8s_i64, { "r", "r" } },
1200     { INDEX_op_ld16u_i64, { "r", "r" } },
1201     { INDEX_op_ld16s_i64, { "r", "r" } },
1202     { INDEX_op_ld32u_i64, { "r", "r" } },
1203     { INDEX_op_ld32s_i64, { "r", "r" } },
1204     { INDEX_op_ld_i64, { "r", "r" } },
1205     { INDEX_op_st8_i64, { "r", "r" } },
1206     { INDEX_op_st16_i64, { "r", "r" } },
1207     { INDEX_op_st32_i64, { "r", "r" } },
1208     { INDEX_op_st_i64, { "r", "r" } },
1209
1210     { INDEX_op_add_i64, { "r", "0", "re" } },
1211     { INDEX_op_mul_i64, { "r", "0", "re" } },
1212     { INDEX_op_div2_i64, { "a", "d", "0", "1", "r" } },
1213     { INDEX_op_divu2_i64, { "a", "d", "0", "1", "r" } },
1214     { INDEX_op_sub_i64, { "r", "0", "re" } },
1215     { INDEX_op_and_i64, { "r", "0", "reZ" } },
1216     { INDEX_op_or_i64, { "r", "0", "re" } },
1217     { INDEX_op_xor_i64, { "r", "0", "re" } },
1218
1219     { INDEX_op_shl_i64, { "r", "0", "ci" } },
1220     { INDEX_op_shr_i64, { "r", "0", "ci" } },
1221     { INDEX_op_sar_i64, { "r", "0", "ci" } },
1222
1223     { INDEX_op_brcond_i64, { "r", "re" } },
1224
1225     { INDEX_op_bswap_i32, { "r", "0" } },
1226     { INDEX_op_bswap_i64, { "r", "0" } },
1227
1228     { INDEX_op_neg_i32, { "r", "0" } },
1229     { INDEX_op_neg_i64, { "r", "0" } },
1230
1231     { INDEX_op_qemu_ld8u, { "r", "L" } },
1232     { INDEX_op_qemu_ld8s, { "r", "L" } },
1233     { INDEX_op_qemu_ld16u, { "r", "L" } },
1234     { INDEX_op_qemu_ld16s, { "r", "L" } },
1235     { INDEX_op_qemu_ld32u, { "r", "L" } },
1236     { INDEX_op_qemu_ld32s, { "r", "L" } },
1237     { INDEX_op_qemu_ld64, { "r", "L" } },
1238
1239     { INDEX_op_qemu_st8, { "L", "L" } },
1240     { INDEX_op_qemu_st16, { "L", "L" } },
1241     { INDEX_op_qemu_st32, { "L", "L" } },
1242     { INDEX_op_qemu_st64, { "L", "L", "L" } },
1243
1244     { -1 },
1245 };
1246
1247 void tcg_target_init(TCGContext *s)
1248 {
1249     /* fail safe */
1250     if ((1 << CPU_TLB_ENTRY_BITS) != sizeof(CPUTLBEntry))
1251         tcg_abort();
1252
1253     tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
1254     tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffff);
1255     tcg_regset_set32(tcg_target_call_clobber_regs, 0,
1256                      (1 << TCG_REG_RDI) |
1257                      (1 << TCG_REG_RSI) |
1258                      (1 << TCG_REG_RDX) |
1259                      (1 << TCG_REG_RCX) |
1260                      (1 << TCG_REG_R8) |
1261                      (1 << TCG_REG_R9) |
1262                      (1 << TCG_REG_RAX) |
1263                      (1 << TCG_REG_R10) |
1264                      (1 << TCG_REG_R11));
1265
1266     tcg_regset_clear(s->reserved_regs);
1267     tcg_regset_set_reg(s->reserved_regs, TCG_REG_RSP);
1268
1269     tcg_add_target_add_op_defs(x86_64_op_defs);
1270 }