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1 /*
2 * Host code generation
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #include <stdarg.h>
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <string.h>
24 #include <inttypes.h>
25
26 #include "config.h"
27
28 #define NO_CPU_IO_DEFS
29 #include "cpu.h"
30 #include "exec-all.h"
31 #include "disas.h"
32
33 enum {
34 #define DEF(s, n, copy_size) INDEX_op_ ## s,
35 #include "opc.h"
36 #undef DEF
37 NB_OPS,
38 };
39
40 #include "dyngen.h"
41 #include "op.h"
42
43 uint16_t gen_opc_buf[OPC_BUF_SIZE];
44 uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
45 uint32_t gen_opc_pc[OPC_BUF_SIZE];
46 uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
47 #if defined(TARGET_I386)
48 uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
49 #elif defined(TARGET_SPARC)
50 uint32_t gen_opc_npc[OPC_BUF_SIZE];
51 #endif
52
53 int code_copy_enabled = 1;
54
55 #ifdef DEBUG_DISAS
56 static const char *op_str[] = {
57 #define DEF(s, n, copy_size) #s,
58 #include "opc.h"
59 #undef DEF
60 };
61
62 static uint8_t op_nb_args[] = {
63 #define DEF(s, n, copy_size) n,
64 #include "opc.h"
65 #undef DEF
66 };
67
68 void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf)
69 {
70 const uint16_t *opc_ptr;
71 const uint32_t *opparam_ptr;
72 int c, n, i;
73
74 opc_ptr = opc_buf;
75 opparam_ptr = opparam_buf;
76 for(;;) {
77 c = *opc_ptr++;
78 n = op_nb_args[c];
79 fprintf(logfile, "0x%04x: %s",
80 (int)(opc_ptr - opc_buf - 1), op_str[c]);
81 for(i = 0; i < n; i++) {
82 fprintf(logfile, " 0x%x", opparam_ptr[i]);
83 }
84 fprintf(logfile, "\n");
85 if (c == INDEX_op_end)
86 break;
87 opparam_ptr += n;
88 }
89 }
90
91 #endif
92
93 /* return non zero if the very first instruction is invalid so that
94 the virtual CPU can trigger an exception.
95
96 '*gen_code_size_ptr' contains the size of the generated code (host
97 code).
98 */
99 int cpu_gen_code(CPUState *env, TranslationBlock *tb,
100 int max_code_size, int *gen_code_size_ptr)
101 {
102 uint8_t *gen_code_buf;
103 int gen_code_size;
104
105 #ifdef USE_CODE_COPY
106 if (code_copy_enabled &&
107 cpu_gen_code_copy(env, tb, max_code_size, &gen_code_size) == 0) {
108 /* nothing more to do */
109 } else
110 #endif
111 {
112 if (gen_intermediate_code(env, tb) < 0)
113 return -1;
114
115 /* generate machine code */
116 tb->tb_next_offset[0] = 0xffff;
117 tb->tb_next_offset[1] = 0xffff;
118 gen_code_buf = tb->tc_ptr;
119 #ifdef USE_DIRECT_JUMP
120 /* the following two entries are optional (only used for string ops) */
121 tb->tb_jmp_offset[2] = 0xffff;
122 tb->tb_jmp_offset[3] = 0xffff;
123 #endif
124 gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset,
125 #ifdef USE_DIRECT_JUMP
126 tb->tb_jmp_offset,
127 #else
128 NULL,
129 #endif
130 gen_opc_buf, gen_opparam_buf);
131 }
132 *gen_code_size_ptr = gen_code_size;
133 #ifdef DEBUG_DISAS
134 if (loglevel & CPU_LOG_TB_OUT_ASM) {
135 fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
136 disas(logfile, tb->tc_ptr, *gen_code_size_ptr, 1, 0);
137 fprintf(logfile, "\n");
138 fflush(logfile);
139 }
140 #endif
141 return 0;
142 }
143
144 static const unsigned short opc_copy_size[] = {
145 #define DEF(s, n, copy_size) copy_size,
146 #include "opc.h"
147 #undef DEF
148 };
149
150 /* The cpu state corresponding to 'searched_pc' is restored.
151 */
152 int cpu_restore_state(TranslationBlock *tb,
153 CPUState *env, unsigned long searched_pc,
154 void *puc)
155 {
156 int j, c;
157 unsigned long tc_ptr;
158 uint16_t *opc_ptr;
159
160 #ifdef USE_CODE_COPY
161 if (tb->cflags & CF_CODE_COPY) {
162 return cpu_restore_state_copy(tb, env, searched_pc, puc);
163 }
164 #endif
165 if (gen_intermediate_code_pc(env, tb) < 0)
166 return -1;
167
168 /* find opc index corresponding to search_pc */
169 tc_ptr = (unsigned long)tb->tc_ptr;
170 if (searched_pc < tc_ptr)
171 return -1;
172 j = 0;
173 opc_ptr = gen_opc_buf;
174 for(;;) {
175 c = *opc_ptr;
176 if (c == INDEX_op_end)
177 return -1;
178 tc_ptr += opc_copy_size[c];
179 if (searched_pc < tc_ptr)
180 break;
181 opc_ptr++;
182 }
183 j = opc_ptr - gen_opc_buf;
184 /* now find start of instruction before */
185 while (gen_opc_instr_start[j] == 0)
186 j--;
187 #if defined(TARGET_I386)
188 {
189 int cc_op;
190 #ifdef DEBUG_DISAS
191 if (loglevel & CPU_LOG_TB_OP) {
192 int i;
193 fprintf(logfile, "RESTORE:\n");
194 for(i=0;i<=j; i++) {
195 if (gen_opc_instr_start[i]) {
196 fprintf(logfile, "0x%04x: 0x%08x\n", i, gen_opc_pc[i]);
197 }
198 }
199 fprintf(logfile, "spc=0x%08lx j=0x%x eip=0x%x cs_base=%x\n",
200 searched_pc, j, gen_opc_pc[j] - tb->cs_base, tb->cs_base);
201 }
202 #endif
203 env->eip = gen_opc_pc[j] - tb->cs_base;
204 cc_op = gen_opc_cc_op[j];
205 if (cc_op != CC_OP_DYNAMIC)
206 env->cc_op = cc_op;
207 }
208 #elif defined(TARGET_ARM)
209 env->regs[15] = gen_opc_pc[j];
210 #elif defined(TARGET_SPARC)
211 /* XXX: restore npc too */
212 env->pc = gen_opc_pc[j];
213 env->npc = gen_opc_npc[j];
214 #elif defined(TARGET_PPC)
215 {
216 int type;
217 /* for PPC, we need to look at the micro operation to get the
218 access type */
219 env->nip = gen_opc_pc[j];
220 switch(c) {
221 #if defined(CONFIG_USER_ONLY)
222 #define CASE3(op)\
223 case INDEX_op_ ## op ## _raw
224 #else
225 #define CASE3(op)\
226 case INDEX_op_ ## op ## _user:\
227 case INDEX_op_ ## op ## _kernel
228 #endif
229
230 CASE3(stfd):
231 CASE3(stfs):
232 CASE3(lfd):
233 CASE3(lfs):
234 type = ACCESS_FLOAT;
235 break;
236 CASE3(lwarx):
237 type = ACCESS_RES;
238 break;
239 CASE3(stwcx):
240 type = ACCESS_RES;
241 break;
242 CASE3(eciwx):
243 CASE3(ecowx):
244 type = ACCESS_EXT;
245 break;
246 default:
247 type = ACCESS_INT;
248 break;
249 }
250 env->access_type = type;
251 }
252 #endif
253 return 0;
254 }