2 * QEMU System Emulator header
4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 extern int reset_requested
;
31 extern int64_t ticks_per_sec
;
32 extern int pit_min_timer_count
;
34 typedef void (IOPortWriteFunc
)(struct CPUState
*env
, uint32_t address
, uint32_t data
);
35 typedef uint32_t (IOPortReadFunc
)(struct CPUState
*env
, uint32_t address
);
37 int register_ioport_read(int start
, int length
, IOPortReadFunc
*func
, int size
);
38 int register_ioport_write(int start
, int length
, IOPortWriteFunc
*func
, int size
);
39 int64_t cpu_get_ticks(void);
40 uint64_t muldiv64(uint64_t a
, uint32_t b
, uint32_t c
);
42 void net_send_packet(int net_fd
, const uint8_t *buf
, int size
);
44 void hw_error(const char *fmt
, ...);
46 int load_image(const char *filename
, uint8_t *addr
);
47 extern const char *bios_dir
;
49 void pstrcpy(char *buf
, int buf_size
, const char *str
);
50 char *pstrcat(char *buf
, int buf_size
, const char *s
);
53 typedef struct BlockDriverState BlockDriverState
;
55 BlockDriverState
*bdrv_open(const char *filename
, int snapshot
);
56 void bdrv_close(BlockDriverState
*bs
);
57 int bdrv_read(BlockDriverState
*bs
, int64_t sector_num
,
58 uint8_t *buf
, int nb_sectors
);
59 int bdrv_write(BlockDriverState
*bs
, int64_t sector_num
,
60 const uint8_t *buf
, int nb_sectors
);
61 void bdrv_get_geometry(BlockDriverState
*bs
, int64_t *nb_sectors_ptr
);
62 int bdrv_commit(BlockDriverState
*bs
);
63 void bdrv_set_boot_sector(BlockDriverState
*bs
, const uint8_t *data
, int size
);
67 #define VGA_RAM_SIZE (4096 * 1024)
69 typedef struct DisplayState
{
73 void (*dpy_update
)(struct DisplayState
*s
, int x
, int y
, int w
, int h
);
74 void (*dpy_resize
)(struct DisplayState
*s
, int w
, int h
);
75 void (*dpy_refresh
)(struct DisplayState
*s
);
78 static inline void dpy_update(DisplayState
*s
, int x
, int y
, int w
, int h
)
80 s
->dpy_update(s
, x
, y
, w
, h
);
83 static inline void dpy_resize(DisplayState
*s
, int w
, int h
)
85 s
->dpy_resize(s
, w
, h
);
88 int vga_initialize(DisplayState
*ds
, uint8_t *vga_ram_base
,
89 unsigned long vga_ram_offset
, int vga_ram_size
);
90 void vga_update_display(void);
93 void sdl_display_init(DisplayState
*ds
);
98 extern BlockDriverState
*bs_table
[MAX_DISKS
];
101 void ide_set_geometry(int n
, int cyls
, int heads
, int secs
);
102 void ide_set_cdrom(int n
, int is_cdrom
);
112 void AUD_open (int rfreq
, int rnchannels
, audfmt_e rfmt
);
113 void AUD_reset (int rfreq
, int rnchannels
, audfmt_e rfmt
);
114 int AUD_write (void *in_buf
, int size
);
116 void AUD_adjust_estimate (int _leftover
);
117 int AUD_get_free (void);
118 int AUD_get_live (void);
119 int AUD_get_buffer_size (void);
120 void AUD_init (void);
123 typedef int (*DMA_transfer_handler
) (void *opaque
, target_ulong addr
, int size
);
124 int DMA_get_channel_mode (int nchan
);
125 void DMA_hold_DREQ (int nchan
);
126 void DMA_release_DREQ (int nchan
);
127 void DMA_schedule(int nchan
);
129 void DMA_init (void);
130 void DMA_register_channel (int nchan
,
131 DMA_transfer_handler transfer_handler
, void *opaque
);
134 void SB16_run (void);
135 void SB16_init (void);
139 extern BlockDriverState
*fd_table
[MAX_FD
];
141 void cmos_register_fd (uint8_t fd0
, uint8_t fd1
);
142 void fdctrl_init (int irq_lvl
, int dma_chann
, int mem_mapped
, uint32_t base
,
144 int fdctrl_disk_change (int idx
, const unsigned char *filename
, int ro
);
148 #define MAX_ETH_FRAME_SIZE 1514
150 void ne2000_init(int base
, int irq
);
151 int ne2000_can_receive(void);
152 void ne2000_receive(uint8_t *buf
, int size
);
158 void kbd_put_keycode(int keycode
);
160 #define MOUSE_EVENT_LBUTTON 0x01
161 #define MOUSE_EVENT_RBUTTON 0x02
162 #define MOUSE_EVENT_MBUTTON 0x04
163 void kbd_mouse_event(int dx
, int dy
, int dz
, int buttons_state
);
169 typedef struct RTCState
{
170 uint8_t cmos_data
[128];
175 extern RTCState rtc_state
;
177 void rtc_init(int base
, int irq
);
178 void rtc_timer(void);
182 void serial_init(int base
, int irq
);
183 int serial_can_receive(void);
184 void serial_receive_byte(int ch
);
185 void serial_receive_break(void);
189 void pic_set_irq(int irq
, int level
);
194 #define PIT_FREQ 1193182
196 typedef struct PITChannelState
{
197 int count
; /* can be 65536 */
198 uint16_t latched_count
;
201 uint8_t bcd
; /* not supported */
202 uint8_t gate
; /* timer start */
203 int64_t count_load_time
;
204 int64_t count_last_edge_check_time
;
207 extern PITChannelState pit_channels
[3];
210 void pit_set_gate(PITChannelState
*s
, int val
);
211 int pit_get_out(PITChannelState
*s
);
212 int pit_get_out_edges(PITChannelState
*s
);
215 void pc_init(int ram_size
, int vga_ram_size
, int boot_device
,
216 DisplayState
*ds
, const char **fd_filename
, int snapshot
,
217 const char *kernel_filename
, const char *kernel_cmdline
,
218 const char *initrd_filename
);