vl.h

   1 /*
   2  * QEMU System Emulator header
   3  *
   4  * Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #ifndef VL_H
  25 #define VL_H
  26
  27 /* we put basic includes here to avoid repeating them in device drivers */
  28 #include <stdlib.h>
  29 #include <stdio.h>
  30 #include <stdarg.h>
  31 #include <string.h>
  32 #include <inttypes.h>
  33 #include <limits.h>
  34 #include <time.h>
  35 #include <ctype.h>
  36 #include <errno.h>
  37 #include <unistd.h>
  38 #include <fcntl.h>
  39 #include <sys/stat.h>
  40
  41 #ifndef O_LARGEFILE
  42 #define O_LARGEFILE 0
  43 #endif
  44 #ifndef O_BINARY
  45 #define O_BINARY 0
  46 #endif
  47
  48 #ifndef ENOMEDIUM
  49 #define ENOMEDIUM ENODEV
  50 #endif
  51
  52 #ifdef _WIN32
  53 #include <windows.h>
  54 #define fsync _commit
  55 #define lseek _lseeki64
  56 #define ENOTSUP 4096
  57 extern int qemu_ftruncate64(int, int64_t);
  58 #define ftruncate qemu_ftruncate64
  59
  60
  61 static inline char *realpath(const char *path, char *resolved_path)
  62 {
  63     _fullpath(resolved_path, path, _MAX_PATH);
  64     return resolved_path;
  65 }
  66
  67 #define PRId64 "I64d"
  68 #define PRIx64 "I64x"
  69 #define PRIu64 "I64u"
  70 #define PRIo64 "I64o"
  71 #endif
  72
  73 #ifdef QEMU_TOOL
  74
  75 /* we use QEMU_TOOL in the command line tools which do not depend on
  76    the target CPU type */
  77 #include "config-host.h"
  78 #include <setjmp.h>
  79 #include "osdep.h"
  80 #include "bswap.h"
  81
  82 #else
  83
  84 #include "audio/audio.h"
  85 #include "cpu.h"
  86
  87 #endif /* !defined(QEMU_TOOL) */
  88
  89 #ifndef glue
  90 #define xglue(x, y) x ## y
  91 #define glue(x, y) xglue(x, y)
  92 #define stringify(s)    tostring(s)
  93 #define tostring(s)     #s
  94 #endif
  95
  96 #ifndef MIN
  97 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
  98 #endif
  99 #ifndef MAX
 100 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
 101 #endif
 102
 103 /* cutils.c */
 104 void pstrcpy(char *buf, int buf_size, const char *str);
 105 char *pstrcat(char *buf, int buf_size, const char *s);
 106 int strstart(const char *str, const char *val, const char **ptr);
 107 int stristart(const char *str, const char *val, const char **ptr);
 108
 109 /* vl.c */
 110 uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
 111
 112 void hw_error(const char *fmt, ...);
 113
 114 extern const char *bios_dir;
 115
 116 extern int vm_running;
 117 extern const char *qemu_name;
 118
 119 typedef struct vm_change_state_entry VMChangeStateEntry;
 120 typedef void VMChangeStateHandler(void *opaque, int running);
 121 typedef void VMStopHandler(void *opaque, int reason);
 122
 123 VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
 124                                                      void *opaque);
 125 void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
 126
 127 int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
 128 void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
 129
 130 void vm_start(void);
 131 void vm_stop(int reason);
 132
 133 typedef void QEMUResetHandler(void *opaque);
 134
 135 void qemu_register_reset(QEMUResetHandler *func, void *opaque);
 136 void qemu_system_reset_request(void);
 137 void qemu_system_shutdown_request(void);
 138 void qemu_system_powerdown_request(void);
 139 #if !defined(TARGET_SPARC)
 140 // Please implement a power failure function to signal the OS
 141 #define qemu_system_powerdown() do{}while(0)
 142 #else
 143 void qemu_system_powerdown(void);
 144 #endif
 145
 146 void main_loop_wait(int timeout);
 147
 148 extern int ram_size;
 149 extern int bios_size;
 150 extern int rtc_utc;
 151 extern int cirrus_vga_enabled;
 152 extern int graphic_width;
 153 extern int graphic_height;
 154 extern int graphic_depth;
 155 extern const char *keyboard_layout;
 156 extern int kqemu_allowed;
 157 extern int win2k_install_hack;
 158 extern int usb_enabled;
 159 extern int smp_cpus;
 160 extern int no_quit;
 161 extern int semihosting_enabled;
 162 extern int autostart;
 163 extern const char *bootp_filename;
 164
 165 #define MAX_OPTION_ROMS 16
 166 extern const char *option_rom[MAX_OPTION_ROMS];
 167 extern int nb_option_roms;
 168
 169 /* XXX: make it dynamic */
 170 #define MAX_BIOS_SIZE (4 * 1024 * 1024)
 171 #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
 172 #define BIOS_SIZE ((512 + 32) * 1024)
 173 #elif defined(TARGET_MIPS)
 174 #define BIOS_SIZE (4 * 1024 * 1024)
 175 #endif
 176
 177 /* keyboard/mouse support */
 178
 179 #define MOUSE_EVENT_LBUTTON 0x01
 180 #define MOUSE_EVENT_RBUTTON 0x02
 181 #define MOUSE_EVENT_MBUTTON 0x04
 182
 183 typedef void QEMUPutKBDEvent(void *opaque, int keycode);
 184 typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
 185
 186 typedef struct QEMUPutMouseEntry {
 187     QEMUPutMouseEvent *qemu_put_mouse_event;
 188     void *qemu_put_mouse_event_opaque;
 189     int qemu_put_mouse_event_absolute;
 190     char *qemu_put_mouse_event_name;
 191
 192     /* used internally by qemu for handling mice */
 193     struct QEMUPutMouseEntry *next;
 194 } QEMUPutMouseEntry;
 195
 196 void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
 197 QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
 198                                                 void *opaque, int absolute,
 199                                                 const char *name);
 200 void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
 201
 202 void kbd_put_keycode(int keycode);
 203 void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
 204 int kbd_mouse_is_absolute(void);
 205
 206 void do_info_mice(void);
 207 void do_mouse_set(int index);
 208
 209 /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
 210    constants) */
 211 #define QEMU_KEY_ESC1(c) ((c) | 0xe100)
 212 #define QEMU_KEY_BACKSPACE  0x007f
 213 #define QEMU_KEY_UP         QEMU_KEY_ESC1('A')
 214 #define QEMU_KEY_DOWN       QEMU_KEY_ESC1('B')
 215 #define QEMU_KEY_RIGHT      QEMU_KEY_ESC1('C')
 216 #define QEMU_KEY_LEFT       QEMU_KEY_ESC1('D')
 217 #define QEMU_KEY_HOME       QEMU_KEY_ESC1(1)
 218 #define QEMU_KEY_END        QEMU_KEY_ESC1(4)
 219 #define QEMU_KEY_PAGEUP     QEMU_KEY_ESC1(5)
 220 #define QEMU_KEY_PAGEDOWN   QEMU_KEY_ESC1(6)
 221 #define QEMU_KEY_DELETE     QEMU_KEY_ESC1(3)
 222
 223 #define QEMU_KEY_CTRL_UP         0xe400
 224 #define QEMU_KEY_CTRL_DOWN       0xe401
 225 #define QEMU_KEY_CTRL_LEFT       0xe402
 226 #define QEMU_KEY_CTRL_RIGHT      0xe403
 227 #define QEMU_KEY_CTRL_HOME       0xe404
 228 #define QEMU_KEY_CTRL_END        0xe405
 229 #define QEMU_KEY_CTRL_PAGEUP     0xe406
 230 #define QEMU_KEY_CTRL_PAGEDOWN   0xe407
 231
 232 void kbd_put_keysym(int keysym);
 233
 234 /* async I/O support */
 235
 236 typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
 237 typedef int IOCanRWHandler(void *opaque);
 238 typedef void IOHandler(void *opaque);
 239
 240 int qemu_set_fd_handler2(int fd,
 241                          IOCanRWHandler *fd_read_poll,
 242                          IOHandler *fd_read,
 243                          IOHandler *fd_write,
 244                          void *opaque);
 245 int qemu_set_fd_handler(int fd,
 246                         IOHandler *fd_read,
 247                         IOHandler *fd_write,
 248                         void *opaque);
 249
 250 /* Polling handling */
 251
 252 /* return TRUE if no sleep should be done afterwards */
 253 typedef int PollingFunc(void *opaque);
 254
 255 int qemu_add_polling_cb(PollingFunc *func, void *opaque);
 256 void qemu_del_polling_cb(PollingFunc *func, void *opaque);
 257
 258 #ifdef _WIN32
 259 /* Wait objects handling */
 260 typedef void WaitObjectFunc(void *opaque);
 261
 262 int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
 263 void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
 264 #endif
 265
 266 typedef struct QEMUBH QEMUBH;
 267
 268 /* character device */
 269
 270 #define CHR_EVENT_BREAK 0 /* serial break char */
 271 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
 272 #define CHR_EVENT_RESET 2 /* new connection established */
 273
 274
 275 #define CHR_IOCTL_SERIAL_SET_PARAMS   1
 276 typedef struct {
 277     int speed;
 278     int parity;
 279     int data_bits;
 280     int stop_bits;
 281 } QEMUSerialSetParams;
 282
 283 #define CHR_IOCTL_SERIAL_SET_BREAK    2
 284
 285 #define CHR_IOCTL_PP_READ_DATA        3
 286 #define CHR_IOCTL_PP_WRITE_DATA       4
 287 #define CHR_IOCTL_PP_READ_CONTROL     5
 288 #define CHR_IOCTL_PP_WRITE_CONTROL    6
 289 #define CHR_IOCTL_PP_READ_STATUS      7
 290 #define CHR_IOCTL_PP_EPP_READ_ADDR    8
 291 #define CHR_IOCTL_PP_EPP_READ         9
 292 #define CHR_IOCTL_PP_EPP_WRITE_ADDR  10
 293 #define CHR_IOCTL_PP_EPP_WRITE       11
 294
 295 typedef void IOEventHandler(void *opaque, int event);
 296
 297 typedef struct CharDriverState {
 298     int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
 299     void (*chr_update_read_handler)(struct CharDriverState *s);
 300     int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
 301     IOEventHandler *chr_event;
 302     IOCanRWHandler *chr_can_read;
 303     IOReadHandler *chr_read;
 304     void *handler_opaque;
 305     void (*chr_send_event)(struct CharDriverState *chr, int event);
 306     void (*chr_close)(struct CharDriverState *chr);
 307     void *opaque;
 308     int focus;
 309     QEMUBH *bh;
 310 } CharDriverState;
 311
 312 CharDriverState *qemu_chr_open(const char *filename);
 313 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
 314 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
 315 void qemu_chr_send_event(CharDriverState *s, int event);
 316 void qemu_chr_add_handlers(CharDriverState *s,
 317                            IOCanRWHandler *fd_can_read,
 318                            IOReadHandler *fd_read,
 319                            IOEventHandler *fd_event,
 320                            void *opaque);
 321 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
 322 void qemu_chr_reset(CharDriverState *s);
 323 int qemu_chr_can_read(CharDriverState *s);
 324 void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
 325
 326 /* consoles */
 327
 328 typedef struct DisplayState DisplayState;
 329 typedef struct TextConsole TextConsole;
 330
 331 typedef void (*vga_hw_update_ptr)(void *);
 332 typedef void (*vga_hw_invalidate_ptr)(void *);
 333 typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
 334
 335 TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
 336                                   vga_hw_invalidate_ptr invalidate,
 337                                   vga_hw_screen_dump_ptr screen_dump,
 338                                   void *opaque);
 339 void vga_hw_update(void);
 340 void vga_hw_invalidate(void);
 341 void vga_hw_screen_dump(const char *filename);
 342
 343 int is_graphic_console(void);
 344 CharDriverState *text_console_init(DisplayState *ds);
 345 void console_select(unsigned int index);
 346
 347 /* serial ports */
 348
 349 #define MAX_SERIAL_PORTS 4
 350
 351 extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
 352
 353 /* parallel ports */
 354
 355 #define MAX_PARALLEL_PORTS 3
 356
 357 extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
 358
 359 struct ParallelIOArg {
 360     void *buffer;
 361     int count;
 362 };
 363
 364 /* VLANs support */
 365
 366 typedef struct VLANClientState VLANClientState;
 367
 368 struct VLANClientState {
 369     IOReadHandler *fd_read;
 370     /* Packets may still be sent if this returns zero.  It's used to
 371        rate-limit the slirp code.  */
 372     IOCanRWHandler *fd_can_read;
 373     void *opaque;
 374     struct VLANClientState *next;
 375     struct VLANState *vlan;
 376     char info_str[256];
 377 };
 378
 379 typedef struct VLANState {
 380     int id;
 381     VLANClientState *first_client;
 382     struct VLANState *next;
 383 } VLANState;
 384
 385 VLANState *qemu_find_vlan(int id);
 386 VLANClientState *qemu_new_vlan_client(VLANState *vlan,
 387                                       IOReadHandler *fd_read,
 388                                       IOCanRWHandler *fd_can_read,
 389                                       void *opaque);
 390 int qemu_can_send_packet(VLANClientState *vc);
 391 void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
 392 void qemu_handler_true(void *opaque);
 393
 394 void do_info_network(void);
 395
 396 /* TAP win32 */
 397 int tap_win32_init(VLANState *vlan, const char *ifname);
 398
 399 /* NIC info */
 400
 401 #define MAX_NICS 8
 402
 403 typedef struct NICInfo {
 404     uint8_t macaddr[6];
 405     const char *model;
 406     VLANState *vlan;
 407 } NICInfo;
 408
 409 extern int nb_nics;
 410 extern NICInfo nd_table[MAX_NICS];
 411
 412 /* timers */
 413
 414 typedef struct QEMUClock QEMUClock;
 415 typedef struct QEMUTimer QEMUTimer;
 416 typedef void QEMUTimerCB(void *opaque);
 417
 418 /* The real time clock should be used only for stuff which does not
 419    change the virtual machine state, as it is run even if the virtual
 420    machine is stopped. The real time clock has a frequency of 1000
 421    Hz. */
 422 extern QEMUClock *rt_clock;
 423
 424 /* The virtual clock is only run during the emulation. It is stopped
 425    when the virtual machine is stopped. Virtual timers use a high
 426    precision clock, usually cpu cycles (use ticks_per_sec). */
 427 extern QEMUClock *vm_clock;
 428
 429 int64_t qemu_get_clock(QEMUClock *clock);
 430
 431 QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
 432 void qemu_free_timer(QEMUTimer *ts);
 433 void qemu_del_timer(QEMUTimer *ts);
 434 void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
 435 int qemu_timer_pending(QEMUTimer *ts);
 436
 437 extern int64_t ticks_per_sec;
 438 extern int pit_min_timer_count;
 439
 440 int64_t cpu_get_ticks(void);
 441 void cpu_enable_ticks(void);
 442 void cpu_disable_ticks(void);
 443
 444 /* VM Load/Save */
 445
 446 typedef struct QEMUFile QEMUFile;
 447
 448 QEMUFile *qemu_fopen(const char *filename, const char *mode);
 449 void qemu_fflush(QEMUFile *f);
 450 void qemu_fclose(QEMUFile *f);
 451 void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
 452 void qemu_put_byte(QEMUFile *f, int v);
 453 void qemu_put_be16(QEMUFile *f, unsigned int v);
 454 void qemu_put_be32(QEMUFile *f, unsigned int v);
 455 void qemu_put_be64(QEMUFile *f, uint64_t v);
 456 int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
 457 int qemu_get_byte(QEMUFile *f);
 458 unsigned int qemu_get_be16(QEMUFile *f);
 459 unsigned int qemu_get_be32(QEMUFile *f);
 460 uint64_t qemu_get_be64(QEMUFile *f);
 461
 462 static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
 463 {
 464     qemu_put_be64(f, *pv);
 465 }
 466
 467 static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
 468 {
 469     qemu_put_be32(f, *pv);
 470 }
 471
 472 static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
 473 {
 474     qemu_put_be16(f, *pv);
 475 }
 476
 477 static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
 478 {
 479     qemu_put_byte(f, *pv);
 480 }
 481
 482 static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
 483 {
 484     *pv = qemu_get_be64(f);
 485 }
 486
 487 static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
 488 {
 489     *pv = qemu_get_be32(f);
 490 }
 491
 492 static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
 493 {
 494     *pv = qemu_get_be16(f);
 495 }
 496
 497 static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
 498 {
 499     *pv = qemu_get_byte(f);
 500 }
 501
 502 #if TARGET_LONG_BITS == 64
 503 #define qemu_put_betl qemu_put_be64
 504 #define qemu_get_betl qemu_get_be64
 505 #define qemu_put_betls qemu_put_be64s
 506 #define qemu_get_betls qemu_get_be64s
 507 #else
 508 #define qemu_put_betl qemu_put_be32
 509 #define qemu_get_betl qemu_get_be32
 510 #define qemu_put_betls qemu_put_be32s
 511 #define qemu_get_betls qemu_get_be32s
 512 #endif
 513
 514 int64_t qemu_ftell(QEMUFile *f);
 515 int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
 516
 517 typedef void SaveStateHandler(QEMUFile *f, void *opaque);
 518 typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
 519
 520 int register_savevm(const char *idstr,
 521                     int instance_id,
 522                     int version_id,
 523                     SaveStateHandler *save_state,
 524                     LoadStateHandler *load_state,
 525                     void *opaque);
 526 void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
 527 void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
 528
 529 void cpu_save(QEMUFile *f, void *opaque);
 530 int cpu_load(QEMUFile *f, void *opaque, int version_id);
 531
 532 void do_savevm(const char *name);
 533 void do_loadvm(const char *name);
 534 void do_delvm(const char *name);
 535 void do_info_snapshots(void);
 536
 537 /* bottom halves */
 538 typedef void QEMUBHFunc(void *opaque);
 539
 540 QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
 541 void qemu_bh_schedule(QEMUBH *bh);
 542 void qemu_bh_cancel(QEMUBH *bh);
 543 void qemu_bh_delete(QEMUBH *bh);
 544 int qemu_bh_poll(void);
 545
 546 /* block.c */
 547 typedef struct BlockDriverState BlockDriverState;
 548 typedef struct BlockDriver BlockDriver;
 549
 550 extern BlockDriver bdrv_raw;
 551 extern BlockDriver bdrv_host_device;
 552 extern BlockDriver bdrv_cow;
 553 extern BlockDriver bdrv_qcow;
 554 extern BlockDriver bdrv_vmdk;
 555 extern BlockDriver bdrv_cloop;
 556 extern BlockDriver bdrv_dmg;
 557 extern BlockDriver bdrv_bochs;
 558 extern BlockDriver bdrv_vpc;
 559 extern BlockDriver bdrv_vvfat;
 560 extern BlockDriver bdrv_qcow2;
 561
 562 typedef struct BlockDriverInfo {
 563     /* in bytes, 0 if irrelevant */
 564     int cluster_size;
 565     /* offset at which the VM state can be saved (0 if not possible) */
 566     int64_t vm_state_offset;
 567 } BlockDriverInfo;
 568
 569 typedef struct QEMUSnapshotInfo {
 570     char id_str[128]; /* unique snapshot id */
 571     /* the following fields are informative. They are not needed for
 572        the consistency of the snapshot */
 573     char name[256]; /* user choosen name */
 574     uint32_t vm_state_size; /* VM state info size */
 575     uint32_t date_sec; /* UTC date of the snapshot */
 576     uint32_t date_nsec;
 577     uint64_t vm_clock_nsec; /* VM clock relative to boot */
 578 } QEMUSnapshotInfo;
 579
 580 #define BDRV_O_RDONLY      0x0000
 581 #define BDRV_O_RDWR        0x0002
 582 #define BDRV_O_ACCESS      0x0003
 583 #define BDRV_O_CREAT       0x0004 /* create an empty file */
 584 #define BDRV_O_SNAPSHOT    0x0008 /* open the file read only and save writes in a snapshot */
 585 #define BDRV_O_FILE        0x0010 /* open as a raw file (do not try to
 586                                      use a disk image format on top of
 587                                      it (default for
 588                                      bdrv_file_open()) */
 589
 590 void bdrv_init(void);
 591 BlockDriver *bdrv_find_format(const char *format_name);
 592 int bdrv_create(BlockDriver *drv,
 593                 const char *filename, int64_t size_in_sectors,
 594                 const char *backing_file, int flags);
 595 BlockDriverState *bdrv_new(const char *device_name);
 596 void bdrv_delete(BlockDriverState *bs);
 597 int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
 598 int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
 599 int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
 600                BlockDriver *drv);
 601 void bdrv_close(BlockDriverState *bs);
 602 int bdrv_read(BlockDriverState *bs, int64_t sector_num,
 603               uint8_t *buf, int nb_sectors);
 604 int bdrv_write(BlockDriverState *bs, int64_t sector_num,
 605                const uint8_t *buf, int nb_sectors);
 606 int bdrv_pread(BlockDriverState *bs, int64_t offset,
 607                void *buf, int count);
 608 int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
 609                 const void *buf, int count);
 610 int bdrv_truncate(BlockDriverState *bs, int64_t offset);
 611 int64_t bdrv_getlength(BlockDriverState *bs);
 612 void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
 613 int bdrv_commit(BlockDriverState *bs);
 614 void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
 615 /* async block I/O */
 616 typedef struct BlockDriverAIOCB BlockDriverAIOCB;
 617 typedef void BlockDriverCompletionFunc(void *opaque, int ret);
 618
 619 BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
 620                                 uint8_t *buf, int nb_sectors,
 621                                 BlockDriverCompletionFunc *cb, void *opaque);
 622 BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
 623                                  const uint8_t *buf, int nb_sectors,
 624                                  BlockDriverCompletionFunc *cb, void *opaque);
 625 void bdrv_aio_cancel(BlockDriverAIOCB *acb);
 626
 627 void qemu_aio_init(void);
 628 void qemu_aio_poll(void);
 629 void qemu_aio_flush(void);
 630 void qemu_aio_wait_start(void);
 631 void qemu_aio_wait(void);
 632 void qemu_aio_wait_end(void);
 633
 634 /* Ensure contents are flushed to disk.  */
 635 void bdrv_flush(BlockDriverState *bs);
 636
 637 #define BDRV_TYPE_HD     0
 638 #define BDRV_TYPE_CDROM  1
 639 #define BDRV_TYPE_FLOPPY 2
 640 #define BIOS_ATA_TRANSLATION_AUTO   0
 641 #define BIOS_ATA_TRANSLATION_NONE   1
 642 #define BIOS_ATA_TRANSLATION_LBA    2
 643 #define BIOS_ATA_TRANSLATION_LARGE  3
 644 #define BIOS_ATA_TRANSLATION_RECHS  4
 645
 646 void bdrv_set_geometry_hint(BlockDriverState *bs,
 647                             int cyls, int heads, int secs);
 648 void bdrv_set_type_hint(BlockDriverState *bs, int type);
 649 void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
 650 void bdrv_get_geometry_hint(BlockDriverState *bs,
 651                             int *pcyls, int *pheads, int *psecs);
 652 int bdrv_get_type_hint(BlockDriverState *bs);
 653 int bdrv_get_translation_hint(BlockDriverState *bs);
 654 int bdrv_is_removable(BlockDriverState *bs);
 655 int bdrv_is_read_only(BlockDriverState *bs);
 656 int bdrv_is_inserted(BlockDriverState *bs);
 657 int bdrv_media_changed(BlockDriverState *bs);
 658 int bdrv_is_locked(BlockDriverState *bs);
 659 void bdrv_set_locked(BlockDriverState *bs, int locked);
 660 void bdrv_eject(BlockDriverState *bs, int eject_flag);
 661 void bdrv_set_change_cb(BlockDriverState *bs,
 662                         void (*change_cb)(void *opaque), void *opaque);
 663 void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
 664 void bdrv_info(void);
 665 BlockDriverState *bdrv_find(const char *name);
 666 void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
 667 int bdrv_is_encrypted(BlockDriverState *bs);
 668 int bdrv_set_key(BlockDriverState *bs, const char *key);
 669 void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
 670                          void *opaque);
 671 const char *bdrv_get_device_name(BlockDriverState *bs);
 672 int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
 673                           const uint8_t *buf, int nb_sectors);
 674 int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
 675
 676 void bdrv_get_backing_filename(BlockDriverState *bs,
 677                                char *filename, int filename_size);
 678 int bdrv_snapshot_create(BlockDriverState *bs,
 679                          QEMUSnapshotInfo *sn_info);
 680 int bdrv_snapshot_goto(BlockDriverState *bs,
 681                        const char *snapshot_id);
 682 int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
 683 int bdrv_snapshot_list(BlockDriverState *bs,
 684                        QEMUSnapshotInfo **psn_info);
 685 char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
 686
 687 char *get_human_readable_size(char *buf, int buf_size, int64_t size);
 688 int path_is_absolute(const char *path);
 689 void path_combine(char *dest, int dest_size,
 690                   const char *base_path,
 691                   const char *filename);
 692
 693 #ifndef QEMU_TOOL
 694
 695 typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
 696                                  int boot_device,
 697              DisplayState *ds, const char **fd_filename, int snapshot,
 698              const char *kernel_filename, const char *kernel_cmdline,
 699              const char *initrd_filename, const char *cpu_model);
 700
 701 typedef struct QEMUMachine {
 702     const char *name;
 703     const char *desc;
 704     QEMUMachineInitFunc *init;
 705     struct QEMUMachine *next;
 706 } QEMUMachine;
 707
 708 int qemu_register_machine(QEMUMachine *m);
 709
 710 typedef void SetIRQFunc(void *opaque, int irq_num, int level);
 711 typedef void IRQRequestFunc(void *opaque, int level);
 712
 713 #if defined(TARGET_PPC)
 714 void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
 715 #endif
 716
 717 #if defined(TARGET_MIPS)
 718 void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
 719 #endif
 720
 721 /* ISA bus */
 722
 723 extern target_phys_addr_t isa_mem_base;
 724
 725 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
 726 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
 727
 728 int register_ioport_read(int start, int length, int size,
 729                          IOPortReadFunc *func, void *opaque);
 730 int register_ioport_write(int start, int length, int size,
 731                           IOPortWriteFunc *func, void *opaque);
 732 void isa_unassign_ioport(int start, int length);
 733
 734 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
 735
 736 /* PCI bus */
 737
 738 extern target_phys_addr_t pci_mem_base;
 739
 740 typedef struct PCIBus PCIBus;
 741 typedef struct PCIDevice PCIDevice;
 742
 743 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
 744                                 uint32_t address, uint32_t data, int len);
 745 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
 746                                    uint32_t address, int len);
 747 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
 748                                 uint32_t addr, uint32_t size, int type);
 749
 750 #define PCI_ADDRESS_SPACE_MEM           0x00
 751 #define PCI_ADDRESS_SPACE_IO            0x01
 752 #define PCI_ADDRESS_SPACE_MEM_PREFETCH  0x08
 753
 754 typedef struct PCIIORegion {
 755     uint32_t addr; /* current PCI mapping address. -1 means not mapped */
 756     uint32_t size;
 757     uint8_t type;
 758     PCIMapIORegionFunc *map_func;
 759 } PCIIORegion;
 760
 761 #define PCI_ROM_SLOT 6
 762 #define PCI_NUM_REGIONS 7
 763
 764 #define PCI_DEVICES_MAX 64
 765
 766 #define PCI_VENDOR_ID           0x00    /* 16 bits */
 767 #define PCI_DEVICE_ID           0x02    /* 16 bits */
 768 #define PCI_COMMAND             0x04    /* 16 bits */
 769 #define  PCI_COMMAND_IO         0x1     /* Enable response in I/O space */
 770 #define  PCI_COMMAND_MEMORY     0x2     /* Enable response in Memory space */
 771 #define PCI_CLASS_DEVICE        0x0a    /* Device class */
 772 #define PCI_INTERRUPT_LINE      0x3c    /* 8 bits */
 773 #define PCI_INTERRUPT_PIN       0x3d    /* 8 bits */
 774 #define PCI_MIN_GNT             0x3e    /* 8 bits */
 775 #define PCI_MAX_LAT             0x3f    /* 8 bits */
 776
 777 struct PCIDevice {
 778     /* PCI config space */
 779     uint8_t config[256];
 780
 781     /* the following fields are read only */
 782     PCIBus *bus;
 783     int devfn;
 784     char name[64];
 785     PCIIORegion io_regions[PCI_NUM_REGIONS];
 786
 787     /* do not access the following fields */
 788     PCIConfigReadFunc *config_read;
 789     PCIConfigWriteFunc *config_write;
 790     /* ??? This is a PC-specific hack, and should be removed.  */
 791     int irq_index;
 792
 793     /* Current IRQ levels.  Used internally by the generic PCI code.  */
 794     int irq_state[4];
 795 };
 796
 797 PCIDevice *pci_register_device(PCIBus *bus, const char *name,
 798                                int instance_size, int devfn,
 799                                PCIConfigReadFunc *config_read,
 800                                PCIConfigWriteFunc *config_write);
 801
 802 void pci_register_io_region(PCIDevice *pci_dev, int region_num,
 803                             uint32_t size, int type,
 804                             PCIMapIORegionFunc *map_func);
 805
 806 void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
 807
 808 uint32_t pci_default_read_config(PCIDevice *d,
 809                                  uint32_t address, int len);
 810 void pci_default_write_config(PCIDevice *d,
 811                               uint32_t address, uint32_t val, int len);
 812 void pci_device_save(PCIDevice *s, QEMUFile *f);
 813 int pci_device_load(PCIDevice *s, QEMUFile *f);
 814
 815 typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
 816 typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
 817 PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
 818                          void *pic, int devfn_min, int nirq);
 819
 820 void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
 821 void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
 822 uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
 823 int pci_bus_num(PCIBus *s);
 824 void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
 825
 826 void pci_info(void);
 827 PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
 828                         pci_map_irq_fn map_irq, const char *name);
 829
 830 /* prep_pci.c */
 831 PCIBus *pci_prep_init(void);
 832
 833 /* grackle_pci.c */
 834 PCIBus *pci_grackle_init(uint32_t base, void *pic);
 835
 836 /* unin_pci.c */
 837 PCIBus *pci_pmac_init(void *pic);
 838
 839 /* apb_pci.c */
 840 PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
 841                      void *pic);
 842
 843 PCIBus *pci_vpb_init(void *pic, int irq, int realview);
 844
 845 /* piix_pci.c */
 846 PCIBus *i440fx_init(PCIDevice **pi440fx_state);
 847 void i440fx_set_smm(PCIDevice *d, int val);
 848 int piix3_init(PCIBus *bus, int devfn);
 849 void i440fx_init_memory_mappings(PCIDevice *d);
 850
 851 int piix4_init(PCIBus *bus, int devfn);
 852
 853 /* openpic.c */
 854 typedef struct openpic_t openpic_t;
 855 enum {
 856     OPENPIC_EVT_INT = 0, /* IRQ                       */
 857     OPENPIC_EVT_CINT,    /* critical IRQ              */
 858     OPENPIC_EVT_MCK,     /* Machine check event       */
 859     OPENPIC_EVT_DEBUG,   /* Inconditional debug event */
 860     OPENPIC_EVT_RESET,   /* Core reset event          */
 861 };
 862 void openpic_set_irq(void *opaque, int n_IRQ, int level);
 863 openpic_t *openpic_init (PCIBus *bus, SetIRQFunc *set_irq,
 864                          int *pmem_index, int nb_cpus,
 865                          struct CPUState **envp);
 866
 867 /* heathrow_pic.c */
 868 typedef struct HeathrowPICS HeathrowPICS;
 869 void heathrow_pic_set_irq(void *opaque, int num, int level);
 870 HeathrowPICS *heathrow_pic_init(int *pmem_index);
 871
 872 /* gt64xxx.c */
 873 PCIBus *pci_gt64120_init(void *pic);
 874
 875 #ifdef HAS_AUDIO
 876 struct soundhw {
 877     const char *name;
 878     const char *descr;
 879     int enabled;
 880     int isa;
 881     union {
 882         int (*init_isa) (AudioState *s);
 883         int (*init_pci) (PCIBus *bus, AudioState *s);
 884     } init;
 885 };
 886
 887 extern struct soundhw soundhw[];
 888 #endif
 889
 890 /* vga.c */
 891
 892 #define VGA_RAM_SIZE (8192 * 1024)
 893
 894 struct DisplayState {
 895     uint8_t *data;
 896     int linesize;
 897     int depth;
 898     int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
 899     int width;
 900     int height;
 901     void *opaque;
 902
 903     void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
 904     void (*dpy_resize)(struct DisplayState *s, int w, int h);
 905     void (*dpy_refresh)(struct DisplayState *s);
 906     void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
 907 };
 908
 909 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
 910 {
 911     s->dpy_update(s, x, y, w, h);
 912 }
 913
 914 static inline void dpy_resize(DisplayState *s, int w, int h)
 915 {
 916     s->dpy_resize(s, w, h);
 917 }
 918
 919 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
 920                  unsigned long vga_ram_offset, int vga_ram_size);
 921 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
 922                  unsigned long vga_ram_offset, int vga_ram_size,
 923                  unsigned long vga_bios_offset, int vga_bios_size);
 924
 925 /* cirrus_vga.c */
 926 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
 927                          unsigned long vga_ram_offset, int vga_ram_size);
 928 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
 929                          unsigned long vga_ram_offset, int vga_ram_size);
 930
 931 /* sdl.c */
 932 void sdl_display_init(DisplayState *ds, int full_screen, int no_frame);
 933
 934 /* cocoa.m */
 935 void cocoa_display_init(DisplayState *ds, int full_screen);
 936
 937 /* vnc.c */
 938 void vnc_display_init(DisplayState *ds, const char *display);
 939 void do_info_vnc(void);
 940
 941 /* x_keymap.c */
 942 extern uint8_t _translate_keycode(const int key);
 943
 944 /* ide.c */
 945 #define MAX_DISKS 4
 946
 947 extern BlockDriverState *bs_table[MAX_DISKS + 1];
 948
 949 void isa_ide_init(int iobase, int iobase2, int irq,
 950                   BlockDriverState *hd0, BlockDriverState *hd1);
 951 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
 952                          int secondary_ide_enabled);
 953 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
 954 int pmac_ide_init (BlockDriverState **hd_table,
 955                    SetIRQFunc *set_irq, void *irq_opaque, int irq);
 956
 957 /* cdrom.c */
 958 int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
 959 int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
 960
 961 /* ds1225y.c */
 962 typedef struct ds1225y_t ds1225y_t;
 963 ds1225y_t *ds1225y_init(target_ulong mem_base, const char *filename);
 964
 965 /* es1370.c */
 966 int es1370_init (PCIBus *bus, AudioState *s);
 967
 968 /* sb16.c */
 969 int SB16_init (AudioState *s);
 970
 971 /* adlib.c */
 972 int Adlib_init (AudioState *s);
 973
 974 /* gus.c */
 975 int GUS_init (AudioState *s);
 976
 977 /* dma.c */
 978 typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
 979 int DMA_get_channel_mode (int nchan);
 980 int DMA_read_memory (int nchan, void *buf, int pos, int size);
 981 int DMA_write_memory (int nchan, void *buf, int pos, int size);
 982 void DMA_hold_DREQ (int nchan);
 983 void DMA_release_DREQ (int nchan);
 984 void DMA_schedule(int nchan);
 985 void DMA_run (void);
 986 void DMA_init (int high_page_enable);
 987 void DMA_register_channel (int nchan,
 988                            DMA_transfer_handler transfer_handler,
 989                            void *opaque);
 990 /* fdc.c */
 991 #define MAX_FD 2
 992 extern BlockDriverState *fd_table[MAX_FD];
 993
 994 typedef struct fdctrl_t fdctrl_t;
 995
 996 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
 997                        uint32_t io_base,
 998                        BlockDriverState **fds);
 999 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
1000
1001 /* ne2000.c */
1002
1003 void isa_ne2000_init(int base, int irq, NICInfo *nd);
1004 void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
1005
1006 /* rtl8139.c */
1007
1008 void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
1009
1010 /* pcnet.c */
1011
1012 void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
1013 void pcnet_h_reset(void *opaque);
1014 void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
1015
1016 /* vmmouse.c */
1017 void *vmmouse_init(void *m);
1018
1019 /* pckbd.c */
1020
1021 void kbd_init(void);
1022
1023 /* mc146818rtc.c */
1024
1025 typedef struct RTCState RTCState;
1026
1027 RTCState *rtc_init(int base, int irq);
1028 void rtc_set_memory(RTCState *s, int addr, int val);
1029 void rtc_set_date(RTCState *s, const struct tm *tm);
1030
1031 /* serial.c */
1032
1033 typedef struct SerialState SerialState;
1034 SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
1035                          int base, int irq, CharDriverState *chr);
1036 SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
1037                              target_ulong base, int it_shift,
1038                              int irq, CharDriverState *chr,
1039                              int ioregister);
1040 uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr);
1041 void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value);
1042 uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr);
1043 void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value);
1044 uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr);
1045 void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value);
1046
1047 /* parallel.c */
1048
1049 typedef struct ParallelState ParallelState;
1050 ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
1051
1052 /* i8259.c */
1053
1054 typedef struct PicState2 PicState2;
1055 extern PicState2 *isa_pic;
1056 void pic_set_irq(int irq, int level);
1057 void pic_set_irq_new(void *opaque, int irq, int level);
1058 PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
1059 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1060                           void *alt_irq_opaque);
1061 int pic_read_irq(PicState2 *s);
1062 void pic_update_irq(PicState2 *s);
1063 uint32_t pic_intack_read(PicState2 *s);
1064 void pic_info(void);
1065 void irq_info(void);
1066
1067 /* APIC */
1068 typedef struct IOAPICState IOAPICState;
1069
1070 int apic_init(CPUState *env);
1071 int apic_get_interrupt(CPUState *env);
1072 IOAPICState *ioapic_init(void);
1073 void ioapic_set_irq(void *opaque, int vector, int level);
1074
1075 /* i8254.c */
1076
1077 #define PIT_FREQ 1193182
1078
1079 typedef struct PITState PITState;
1080
1081 PITState *pit_init(int base, int irq);
1082 void pit_set_gate(PITState *pit, int channel, int val);
1083 int pit_get_gate(PITState *pit, int channel);
1084 int pit_get_initial_count(PITState *pit, int channel);
1085 int pit_get_mode(PITState *pit, int channel);
1086 int pit_get_out(PITState *pit, int channel, int64_t current_time);
1087
1088 /* pcspk.c */
1089 void pcspk_init(PITState *);
1090 int pcspk_audio_init(AudioState *);
1091
1092 #include "hw/smbus.h"
1093
1094 /* acpi.c */
1095 extern int acpi_enabled;
1096 void piix4_pm_init(PCIBus *bus, int devfn);
1097 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
1098 void acpi_bios_init(void);
1099
1100 /* smbus_eeprom.c */
1101 SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf);
1102
1103 /* pc.c */
1104 extern QEMUMachine pc_machine;
1105 extern QEMUMachine isapc_machine;
1106 extern int fd_bootchk;
1107
1108 void ioport_set_a20(int enable);
1109 int ioport_get_a20(void);
1110
1111 /* ppc.c */
1112 extern QEMUMachine prep_machine;
1113 extern QEMUMachine core99_machine;
1114 extern QEMUMachine heathrow_machine;
1115
1116 /* mips_r4k.c */
1117 extern QEMUMachine mips_machine;
1118
1119 /* mips_malta.c */
1120 extern QEMUMachine mips_malta_machine;
1121
1122 /* mips_int */
1123 extern void cpu_mips_irq_request(void *opaque, int irq, int level);
1124
1125 /* mips_timer.c */
1126 extern void cpu_mips_clock_init(CPUState *);
1127 extern void cpu_mips_irqctrl_init (void);
1128
1129 /* shix.c */
1130 extern QEMUMachine shix_machine;
1131
1132 #ifdef TARGET_PPC
1133 /* PowerPC hardware exceptions management helpers */
1134 void ppc_set_irq (void *opaque, int n_IRQ, int level);
1135 void ppc_openpic_irq (void *opaque, int n_IRQ, int level);
1136 int ppc_hw_interrupt (CPUState *env);
1137 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1138 #endif
1139 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
1140
1141 extern CPUWriteMemoryFunc *PPC_io_write[];
1142 extern CPUReadMemoryFunc *PPC_io_read[];
1143 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1144
1145 /* sun4m.c */
1146 extern QEMUMachine ss5_machine, ss10_machine;
1147 void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
1148
1149 /* iommu.c */
1150 void *iommu_init(uint32_t addr);
1151 void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
1152                                  uint8_t *buf, int len, int is_write);
1153 static inline void sparc_iommu_memory_read(void *opaque,
1154                                            target_phys_addr_t addr,
1155                                            uint8_t *buf, int len)
1156 {
1157     sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1158 }
1159
1160 static inline void sparc_iommu_memory_write(void *opaque,
1161                                             target_phys_addr_t addr,
1162                                             uint8_t *buf, int len)
1163 {
1164     sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1165 }
1166
1167 /* tcx.c */
1168 void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
1169                unsigned long vram_offset, int vram_size, int width, int height);
1170
1171 /* slavio_intctl.c */
1172 void *slavio_intctl_init(uint32_t addr, uint32_t addrg,
1173                          const uint32_t *intbit_to_level);
1174 void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
1175 void slavio_pic_info(void *opaque);
1176 void slavio_irq_info(void *opaque);
1177 void slavio_pic_set_irq(void *opaque, int irq, int level);
1178 void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1179
1180 /* loader.c */
1181 int get_image_size(const char *filename);
1182 int load_image(const char *filename, uint8_t *addr);
1183 int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
1184 int load_aout(const char *filename, uint8_t *addr);
1185 int load_uboot(const char *filename, target_ulong *ep, int *is_linux);
1186
1187 /* slavio_timer.c */
1188 void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
1189
1190 /* slavio_serial.c */
1191 SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1192 void slavio_serial_ms_kbd_init(int base, int irq);
1193
1194 /* slavio_misc.c */
1195 void *slavio_misc_init(uint32_t base, int irq);
1196 void slavio_set_power_fail(void *opaque, int power_failing);
1197
1198 /* esp.c */
1199 void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1200 void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1201 void esp_reset(void *opaque);
1202
1203 /* sparc32_dma.c */
1204 void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1205                        void *intctl);
1206 void ledma_set_irq(void *opaque, int isr);
1207 void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1208                        uint8_t *buf, int len, int do_bswap);
1209 void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1210                         uint8_t *buf, int len, int do_bswap);
1211 void espdma_raise_irq(void *opaque);
1212 void espdma_clear_irq(void *opaque);
1213 void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1214 void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1215 void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1216                                 void *lance_opaque);
1217
1218 /* cs4231.c */
1219 void cs_init(target_phys_addr_t base, int irq, void *intctl);
1220
1221 /* sun4u.c */
1222 extern QEMUMachine sun4u_machine;
1223
1224 /* NVRAM helpers */
1225 #include "hw/m48t59.h"
1226
1227 void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1228 uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1229 void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1230 uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1231 void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1232 uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1233 void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1234                        const unsigned char *str, uint32_t max);
1235 int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1236 void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1237                     uint32_t start, uint32_t count);
1238 int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1239                           const unsigned char *arch,
1240                           uint32_t RAM_size, int boot_device,
1241                           uint32_t kernel_image, uint32_t kernel_size,
1242                           const char *cmdline,
1243                           uint32_t initrd_image, uint32_t initrd_size,
1244                           uint32_t NVRAM_image,
1245                           int width, int height, int depth);
1246
1247 /* adb.c */
1248
1249 #define MAX_ADB_DEVICES 16
1250
1251 #define ADB_MAX_OUT_LEN 16
1252
1253 typedef struct ADBDevice ADBDevice;
1254
1255 /* buf = NULL means polling */
1256 typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1257                               const uint8_t *buf, int len);
1258 typedef int ADBDeviceReset(ADBDevice *d);
1259
1260 struct ADBDevice {
1261     struct ADBBusState *bus;
1262     int devaddr;
1263     int handler;
1264     ADBDeviceRequest *devreq;
1265     ADBDeviceReset *devreset;
1266     void *opaque;
1267 };
1268
1269 typedef struct ADBBusState {
1270     ADBDevice devices[MAX_ADB_DEVICES];
1271     int nb_devices;
1272     int poll_index;
1273 } ADBBusState;
1274
1275 int adb_request(ADBBusState *s, uint8_t *buf_out,
1276                 const uint8_t *buf, int len);
1277 int adb_poll(ADBBusState *s, uint8_t *buf_out);
1278
1279 ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
1280                                ADBDeviceRequest *devreq,
1281                                ADBDeviceReset *devreset,
1282                                void *opaque);
1283 void adb_kbd_init(ADBBusState *bus);
1284 void adb_mouse_init(ADBBusState *bus);
1285
1286 /* cuda.c */
1287
1288 extern ADBBusState adb_bus;
1289 int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1290
1291 #include "hw/usb.h"
1292
1293 /* usb ports of the VM */
1294
1295 void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1296                             usb_attachfn attach);
1297
1298 #define VM_USB_HUB_SIZE 8
1299
1300 void do_usb_add(const char *devname);
1301 void do_usb_del(const char *devname);
1302 void usb_info(void);
1303
1304 /* scsi-disk.c */
1305 enum scsi_reason {
1306     SCSI_REASON_DONE, /* Command complete.  */
1307     SCSI_REASON_DATA  /* Transfer complete, more data required.  */
1308 };
1309
1310 typedef struct SCSIDevice SCSIDevice;
1311 typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1312                                   uint32_t arg);
1313
1314 SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1315                            int tcq,
1316                            scsi_completionfn completion,
1317                            void *opaque);
1318 void scsi_disk_destroy(SCSIDevice *s);
1319
1320 int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1321 /* SCSI data transfers are asynchrnonous.  However, unlike the block IO
1322    layer the completion routine may be called directly by
1323    scsi_{read,write}_data.  */
1324 void scsi_read_data(SCSIDevice *s, uint32_t tag);
1325 int scsi_write_data(SCSIDevice *s, uint32_t tag);
1326 void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1327 uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
1328
1329 /* lsi53c895a.c */
1330 void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1331 void *lsi_scsi_init(PCIBus *bus, int devfn);
1332
1333 /* integratorcp.c */
1334 extern QEMUMachine integratorcp_machine;
1335
1336 /* versatilepb.c */
1337 extern QEMUMachine versatilepb_machine;
1338 extern QEMUMachine versatileab_machine;
1339
1340 /* realview.c */
1341 extern QEMUMachine realview_machine;
1342
1343 /* ps2.c */
1344 void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1345 void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1346 void ps2_write_mouse(void *, int val);
1347 void ps2_write_keyboard(void *, int val);
1348 uint32_t ps2_read_data(void *);
1349 void ps2_queue(void *, int b);
1350 void ps2_keyboard_set_translation(void *opaque, int mode);
1351 void ps2_mouse_fake_event(void *opaque);
1352
1353 /* smc91c111.c */
1354 void smc91c111_init(NICInfo *, uint32_t, void *, int);
1355
1356 /* pl110.c */
1357 void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1358
1359 /* pl011.c */
1360 void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1361
1362 /* pl050.c */
1363 void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1364
1365 /* pl080.c */
1366 void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
1367
1368 /* pl190.c */
1369 void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1370
1371 /* arm-timer.c */
1372 void sp804_init(uint32_t base, void *pic, int irq);
1373 void icp_pit_init(uint32_t base, void *pic, int irq);
1374
1375 /* arm_sysctl.c */
1376 void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1377
1378 /* arm_gic.c */
1379 void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1380
1381 /* arm_boot.c */
1382
1383 void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
1384                      const char *kernel_cmdline, const char *initrd_filename,
1385                      int board_id);
1386
1387 /* sh7750.c */
1388 struct SH7750State;
1389
1390 struct SH7750State *sh7750_init(CPUState * cpu);
1391
1392 typedef struct {
1393     /* The callback will be triggered if any of the designated lines change */
1394     uint16_t portamask_trigger;
1395     uint16_t portbmask_trigger;
1396     /* Return 0 if no action was taken */
1397     int (*port_change_cb) (uint16_t porta, uint16_t portb,
1398                            uint16_t * periph_pdtra,
1399                            uint16_t * periph_portdira,
1400                            uint16_t * periph_pdtrb,
1401                            uint16_t * periph_portdirb);
1402 } sh7750_io_device;
1403
1404 int sh7750_register_io_device(struct SH7750State *s,
1405                               sh7750_io_device * device);
1406 /* tc58128.c */
1407 int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1408
1409 /* NOR flash devices */
1410 typedef struct pflash_t pflash_t;
1411
1412 pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1413                            BlockDriverState *bs,
1414                            target_ulong sector_len, int nb_blocs, int width,
1415                            uint16_t id0, uint16_t id1,
1416                            uint16_t id2, uint16_t id3);
1417
1418 #include "gdbstub.h"
1419
1420 #endif /* defined(QEMU_TOOL) */
1421
1422 /* monitor.c */
1423 void monitor_init(CharDriverState *hd, int show_banner);
1424 void term_puts(const char *str);
1425 void term_vprintf(const char *fmt, va_list ap);
1426 void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1427 void term_print_filename(const char *filename);
1428 void term_flush(void);
1429 void term_print_help(void);
1430 void monitor_readline(const char *prompt, int is_password,
1431                       char *buf, int buf_size);
1432
1433 /* readline.c */
1434 typedef void ReadLineFunc(void *opaque, const char *str);
1435
1436 extern int completion_index;
1437 void add_completion(const char *str);
1438 void readline_handle_byte(int ch);
1439 void readline_find_completion(const char *cmdline);
1440 const char *readline_get_history(unsigned int index);
1441 void readline_start(const char *prompt, int is_password,
1442                     ReadLineFunc *readline_func, void *opaque);
1443
1444 void kqemu_record_dump(void);
1445
1446 #endif /* VL_H */