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reset and shutdown support - PCI is now the default
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1 /*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #ifndef VL_H
25 #define VL_H
26
27 /* we put basic includes here to avoid repeating them in device drivers */
28 #include <stdlib.h>
29 #include <stdio.h>
30 #include <stdarg.h>
31 #include <string.h>
32 #include <inttypes.h>
33 #include <time.h>
34 #include <ctype.h>
35 #include <errno.h>
36 #include <unistd.h>
37 #include <fcntl.h>
38 #include <sys/stat.h>
39
40 #ifndef O_LARGEFILE
41 #define O_LARGEFILE 0
42 #endif
43 #ifndef O_BINARY
44 #define O_BINARY 0
45 #endif
46
47 #ifdef _WIN32
48 #define lseek64 _lseeki64
49 #endif
50
51 #include "cpu.h"
52
53 #ifndef glue
54 #define xglue(x, y) x ## y
55 #define glue(x, y) xglue(x, y)
56 #define stringify(s) tostring(s)
57 #define tostring(s) #s
58 #endif
59
60 #if defined(WORDS_BIGENDIAN)
61 static inline uint32_t be32_to_cpu(uint32_t v)
62 {
63 return v;
64 }
65
66 static inline uint16_t be16_to_cpu(uint16_t v)
67 {
68 return v;
69 }
70
71 static inline uint32_t cpu_to_be32(uint32_t v)
72 {
73 return v;
74 }
75
76 static inline uint16_t cpu_to_be16(uint16_t v)
77 {
78 return v;
79 }
80
81 static inline uint32_t le32_to_cpu(uint32_t v)
82 {
83 return bswap32(v);
84 }
85
86 static inline uint16_t le16_to_cpu(uint16_t v)
87 {
88 return bswap16(v);
89 }
90
91 static inline uint32_t cpu_to_le32(uint32_t v)
92 {
93 return bswap32(v);
94 }
95
96 static inline uint16_t cpu_to_le16(uint16_t v)
97 {
98 return bswap16(v);
99 }
100
101 #else
102
103 static inline uint32_t be32_to_cpu(uint32_t v)
104 {
105 return bswap32(v);
106 }
107
108 static inline uint16_t be16_to_cpu(uint16_t v)
109 {
110 return bswap16(v);
111 }
112
113 static inline uint32_t cpu_to_be32(uint32_t v)
114 {
115 return bswap32(v);
116 }
117
118 static inline uint16_t cpu_to_be16(uint16_t v)
119 {
120 return bswap16(v);
121 }
122
123 static inline uint32_t le32_to_cpu(uint32_t v)
124 {
125 return v;
126 }
127
128 static inline uint16_t le16_to_cpu(uint16_t v)
129 {
130 return v;
131 }
132
133 static inline uint32_t cpu_to_le32(uint32_t v)
134 {
135 return v;
136 }
137
138 static inline uint16_t cpu_to_le16(uint16_t v)
139 {
140 return v;
141 }
142 #endif
143
144 static inline void cpu_to_le16w(uint16_t *p, uint16_t v)
145 {
146 *p = cpu_to_le16(v);
147 }
148
149 static inline void cpu_to_le32w(uint32_t *p, uint32_t v)
150 {
151 *p = cpu_to_le32(v);
152 }
153
154 static inline uint16_t le16_to_cpup(const uint16_t *p)
155 {
156 return le16_to_cpu(*p);
157 }
158
159 static inline uint32_t le32_to_cpup(const uint32_t *p)
160 {
161 return le32_to_cpu(*p);
162 }
163
164 /* unaligned versions (optimized for frequent unaligned accesses)*/
165
166 #if defined(__i386__) || defined(__powerpc__)
167
168 #define cpu_to_le16wu(p, v) cpu_to_le16w(p, v)
169 #define cpu_to_le32wu(p, v) cpu_to_le32w(p, v)
170 #define le16_to_cpupu(p) le16_to_cpup(p)
171 #define le32_to_cpupu(p) le32_to_cpup(p)
172
173 #else
174
175 static inline void cpu_to_le16wu(uint16_t *p, uint16_t v)
176 {
177 uint8_t *p1 = (uint8_t *)p;
178
179 p1[0] = v;
180 p1[1] = v >> 8;
181 }
182
183 static inline void cpu_to_le32wu(uint32_t *p, uint32_t v)
184 {
185 uint8_t *p1 = (uint8_t *)p;
186
187 p1[0] = v;
188 p1[1] = v >> 8;
189 p1[2] = v >> 16;
190 p1[3] = v >> 24;
191 }
192
193 static inline uint16_t le16_to_cpupu(const uint16_t *p)
194 {
195 const uint8_t *p1 = (const uint8_t *)p;
196 return p1[0] | (p1[1] << 8);
197 }
198
199 static inline uint32_t le32_to_cpupu(const uint32_t *p)
200 {
201 const uint8_t *p1 = (const uint8_t *)p;
202 return p1[0] | (p1[1] << 8) | (p1[2] << 16) | (p1[3] << 24);
203 }
204
205 #endif
206
207 /* vl.c */
208 uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
209
210 void hw_error(const char *fmt, ...);
211
212 int load_image(const char *filename, uint8_t *addr);
213 extern const char *bios_dir;
214
215 void pstrcpy(char *buf, int buf_size, const char *str);
216 char *pstrcat(char *buf, int buf_size, const char *s);
217
218 int serial_open_device(void);
219
220 extern int vm_running;
221
222 typedef void VMStopHandler(void *opaque, int reason);
223
224 int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
225 void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
226
227 void vm_start(void);
228 void vm_stop(int reason);
229
230 typedef void QEMUResetHandler(void *opaque);
231
232 void qemu_register_reset(QEMUResetHandler *func, void *opaque);
233 void qemu_system_reset_request(void);
234 void qemu_system_shutdown_request(void);
235
236 extern int audio_enabled;
237 extern int ram_size;
238 extern int bios_size;
239 extern int rtc_utc;
240 extern int cirrus_vga_enabled;
241
242 /* XXX: make it dynamic */
243 #if defined (TARGET_PPC)
244 #define BIOS_SIZE (512 * 1024)
245 #else
246 #define BIOS_SIZE 0
247 #endif
248
249 /* keyboard/mouse support */
250
251 #define MOUSE_EVENT_LBUTTON 0x01
252 #define MOUSE_EVENT_RBUTTON 0x02
253 #define MOUSE_EVENT_MBUTTON 0x04
254
255 typedef void QEMUPutKBDEvent(void *opaque, int keycode);
256 typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
257
258 void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
259 void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque);
260
261 void kbd_put_keycode(int keycode);
262 void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
263
264 /* async I/O support */
265
266 typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
267 typedef int IOCanRWHandler(void *opaque);
268
269 int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read,
270 IOReadHandler *fd_read, void *opaque);
271 void qemu_del_fd_read_handler(int fd);
272
273 /* network redirectors support */
274
275 #define MAX_NICS 8
276
277 typedef struct NetDriverState {
278 int index; /* index number in QEMU */
279 uint8_t macaddr[6];
280 char ifname[16];
281 void (*send_packet)(struct NetDriverState *nd,
282 const uint8_t *buf, int size);
283 void (*add_read_packet)(struct NetDriverState *nd,
284 IOCanRWHandler *fd_can_read,
285 IOReadHandler *fd_read, void *opaque);
286 /* tun specific data */
287 int fd;
288 /* slirp specific data */
289 } NetDriverState;
290
291 extern int nb_nics;
292 extern NetDriverState nd_table[MAX_NICS];
293
294 void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size);
295 void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read,
296 IOReadHandler *fd_read, void *opaque);
297
298 /* timers */
299
300 typedef struct QEMUClock QEMUClock;
301 typedef struct QEMUTimer QEMUTimer;
302 typedef void QEMUTimerCB(void *opaque);
303
304 /* The real time clock should be used only for stuff which does not
305 change the virtual machine state, as it is run even if the virtual
306 machine is stopped. The real time clock has a frequency of 1000
307 Hz. */
308 extern QEMUClock *rt_clock;
309
310 /* Rge virtual clock is only run during the emulation. It is stopped
311 when the virtual machine is stopped. Virtual timers use a high
312 precision clock, usually cpu cycles (use ticks_per_sec). */
313 extern QEMUClock *vm_clock;
314
315 int64_t qemu_get_clock(QEMUClock *clock);
316
317 QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
318 void qemu_free_timer(QEMUTimer *ts);
319 void qemu_del_timer(QEMUTimer *ts);
320 void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
321 int qemu_timer_pending(QEMUTimer *ts);
322
323 extern int64_t ticks_per_sec;
324 extern int pit_min_timer_count;
325
326 void cpu_enable_ticks(void);
327 void cpu_disable_ticks(void);
328
329 /* VM Load/Save */
330
331 typedef FILE QEMUFile;
332
333 void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
334 void qemu_put_byte(QEMUFile *f, int v);
335 void qemu_put_be16(QEMUFile *f, unsigned int v);
336 void qemu_put_be32(QEMUFile *f, unsigned int v);
337 void qemu_put_be64(QEMUFile *f, uint64_t v);
338 int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
339 int qemu_get_byte(QEMUFile *f);
340 unsigned int qemu_get_be16(QEMUFile *f);
341 unsigned int qemu_get_be32(QEMUFile *f);
342 uint64_t qemu_get_be64(QEMUFile *f);
343
344 static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
345 {
346 qemu_put_be64(f, *pv);
347 }
348
349 static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
350 {
351 qemu_put_be32(f, *pv);
352 }
353
354 static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
355 {
356 qemu_put_be16(f, *pv);
357 }
358
359 static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
360 {
361 qemu_put_byte(f, *pv);
362 }
363
364 static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
365 {
366 *pv = qemu_get_be64(f);
367 }
368
369 static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
370 {
371 *pv = qemu_get_be32(f);
372 }
373
374 static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
375 {
376 *pv = qemu_get_be16(f);
377 }
378
379 static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
380 {
381 *pv = qemu_get_byte(f);
382 }
383
384 int64_t qemu_ftell(QEMUFile *f);
385 int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
386
387 typedef void SaveStateHandler(QEMUFile *f, void *opaque);
388 typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
389
390 int qemu_loadvm(const char *filename);
391 int qemu_savevm(const char *filename);
392 int register_savevm(const char *idstr,
393 int instance_id,
394 int version_id,
395 SaveStateHandler *save_state,
396 LoadStateHandler *load_state,
397 void *opaque);
398 void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
399 void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
400
401 /* block.c */
402 typedef struct BlockDriverState BlockDriverState;
403
404 BlockDriverState *bdrv_new(const char *device_name);
405 void bdrv_delete(BlockDriverState *bs);
406 int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
407 void bdrv_close(BlockDriverState *bs);
408 int bdrv_read(BlockDriverState *bs, int64_t sector_num,
409 uint8_t *buf, int nb_sectors);
410 int bdrv_write(BlockDriverState *bs, int64_t sector_num,
411 const uint8_t *buf, int nb_sectors);
412 void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
413 int bdrv_commit(BlockDriverState *bs);
414 void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
415
416 #define BDRV_TYPE_HD 0
417 #define BDRV_TYPE_CDROM 1
418 #define BDRV_TYPE_FLOPPY 2
419
420 void bdrv_set_geometry_hint(BlockDriverState *bs,
421 int cyls, int heads, int secs);
422 void bdrv_set_type_hint(BlockDriverState *bs, int type);
423 void bdrv_get_geometry_hint(BlockDriverState *bs,
424 int *pcyls, int *pheads, int *psecs);
425 int bdrv_get_type_hint(BlockDriverState *bs);
426 int bdrv_is_removable(BlockDriverState *bs);
427 int bdrv_is_read_only(BlockDriverState *bs);
428 int bdrv_is_inserted(BlockDriverState *bs);
429 int bdrv_is_locked(BlockDriverState *bs);
430 void bdrv_set_locked(BlockDriverState *bs, int locked);
431 void bdrv_set_change_cb(BlockDriverState *bs,
432 void (*change_cb)(void *opaque), void *opaque);
433
434 void bdrv_info(void);
435 BlockDriverState *bdrv_find(const char *name);
436
437 /* ISA bus */
438
439 extern target_phys_addr_t isa_mem_base;
440
441 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
442 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
443
444 int register_ioport_read(int start, int length, int size,
445 IOPortReadFunc *func, void *opaque);
446 int register_ioport_write(int start, int length, int size,
447 IOPortWriteFunc *func, void *opaque);
448 void isa_unassign_ioport(int start, int length);
449
450 /* PCI bus */
451
452 extern int pci_enabled;
453
454 extern target_phys_addr_t pci_mem_base;
455
456 typedef struct PCIDevice PCIDevice;
457
458 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
459 uint32_t address, uint32_t data, int len);
460 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
461 uint32_t address, int len);
462 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
463 uint32_t addr, uint32_t size, int type);
464
465 #define PCI_ADDRESS_SPACE_MEM 0x00
466 #define PCI_ADDRESS_SPACE_IO 0x01
467 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
468
469 typedef struct PCIIORegion {
470 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
471 uint32_t size;
472 uint8_t type;
473 PCIMapIORegionFunc *map_func;
474 } PCIIORegion;
475
476 #define PCI_ROM_SLOT 6
477 #define PCI_NUM_REGIONS 7
478 struct PCIDevice {
479 /* PCI config space */
480 uint8_t config[256];
481
482 /* the following fields are read only */
483 int bus_num;
484 int devfn;
485 char name[64];
486 PCIIORegion io_regions[PCI_NUM_REGIONS];
487
488 /* do not access the following fields */
489 PCIConfigReadFunc *config_read;
490 PCIConfigWriteFunc *config_write;
491 int irq_index;
492 };
493
494 PCIDevice *pci_register_device(const char *name, int instance_size,
495 int bus_num, int devfn,
496 PCIConfigReadFunc *config_read,
497 PCIConfigWriteFunc *config_write);
498
499 void pci_register_io_region(PCIDevice *pci_dev, int region_num,
500 uint32_t size, int type,
501 PCIMapIORegionFunc *map_func);
502
503 void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
504
505 uint32_t pci_default_read_config(PCIDevice *d,
506 uint32_t address, int len);
507 void pci_default_write_config(PCIDevice *d,
508 uint32_t address, uint32_t val, int len);
509
510 extern struct PIIX3State *piix3_state;
511
512 void i440fx_init(void);
513 void piix3_init(void);
514 void pci_bios_init(void);
515 void pci_info(void);
516
517 /* temporary: will be moved in platform specific file */
518 void pci_prep_init(void);
519 void pci_pmac_init(void);
520 void pci_ppc_bios_init(void);
521
522 /* vga.c */
523
524 #define VGA_RAM_SIZE (4096 * 1024)
525
526 typedef struct DisplayState {
527 uint8_t *data;
528 int linesize;
529 int depth;
530 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
531 void (*dpy_resize)(struct DisplayState *s, int w, int h);
532 void (*dpy_refresh)(struct DisplayState *s);
533 } DisplayState;
534
535 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
536 {
537 s->dpy_update(s, x, y, w, h);
538 }
539
540 static inline void dpy_resize(DisplayState *s, int w, int h)
541 {
542 s->dpy_resize(s, w, h);
543 }
544
545 int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
546 unsigned long vga_ram_offset, int vga_ram_size,
547 int is_pci);
548 void vga_update_display(void);
549 void vga_invalidate_display(void);
550 void vga_screen_dump(const char *filename);
551
552 /* cirrus_vga.c */
553 void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
554 unsigned long vga_ram_offset, int vga_ram_size);
555
556 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
557 unsigned long vga_ram_offset, int vga_ram_size);
558
559 /* sdl.c */
560 void sdl_display_init(DisplayState *ds);
561
562 /* ide.c */
563 #define MAX_DISKS 4
564
565 extern BlockDriverState *bs_table[MAX_DISKS];
566
567 void isa_ide_init(int iobase, int iobase2, int irq,
568 BlockDriverState *hd0, BlockDriverState *hd1);
569 void pci_ide_init(BlockDriverState **hd_table);
570 void pci_piix3_ide_init(BlockDriverState **hd_table);
571
572 /* oss.c */
573 typedef enum {
574 AUD_FMT_U8,
575 AUD_FMT_S8,
576 AUD_FMT_U16,
577 AUD_FMT_S16
578 } audfmt_e;
579
580 void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt);
581 void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt);
582 int AUD_write (void *in_buf, int size);
583 void AUD_run (void);
584 void AUD_adjust_estimate (int _leftover);
585 int AUD_get_free (void);
586 int AUD_get_live (void);
587 int AUD_get_buffer_size (void);
588 void AUD_init (void);
589
590 /* dma.c */
591 typedef int (*DMA_transfer_handler) (void *opaque, target_ulong addr, int size);
592 int DMA_get_channel_mode (int nchan);
593 void DMA_hold_DREQ (int nchan);
594 void DMA_release_DREQ (int nchan);
595 void DMA_schedule(int nchan);
596 void DMA_run (void);
597 void DMA_init (void);
598 void DMA_register_channel (int nchan,
599 DMA_transfer_handler transfer_handler, void *opaque);
600
601 /* sb16.c */
602 void SB16_run (void);
603 void SB16_init (void);
604
605 /* fdc.c */
606 #define MAX_FD 2
607 extern BlockDriverState *fd_table[MAX_FD];
608
609 typedef struct fdctrl_t fdctrl_t;
610
611 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
612 uint32_t io_base,
613 BlockDriverState **fds);
614 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
615
616 /* ne2000.c */
617
618 void isa_ne2000_init(int base, int irq, NetDriverState *nd);
619 void pci_ne2000_init(NetDriverState *nd);
620
621 /* pckbd.c */
622
623 void kbd_init(void);
624
625 /* mc146818rtc.c */
626
627 typedef struct RTCState RTCState;
628
629 RTCState *rtc_init(int base, int irq);
630 void rtc_set_memory(RTCState *s, int addr, int val);
631 void rtc_set_date(RTCState *s, const struct tm *tm);
632
633 /* serial.c */
634
635 typedef struct SerialState SerialState;
636
637 extern SerialState *serial_console;
638
639 SerialState *serial_init(int base, int irq, int fd);
640 int serial_can_receive(SerialState *s);
641 void serial_receive_byte(SerialState *s, int ch);
642 void serial_receive_break(SerialState *s);
643
644 /* i8259.c */
645
646 void pic_set_irq(int irq, int level);
647 void pic_init(void);
648 uint32_t pic_intack_read(CPUState *env);
649 void pic_info(void);
650 void irq_info(void);
651
652 /* i8254.c */
653
654 #define PIT_FREQ 1193182
655
656 typedef struct PITState PITState;
657
658 PITState *pit_init(int base, int irq);
659 void pit_set_gate(PITState *pit, int channel, int val);
660 int pit_get_gate(PITState *pit, int channel);
661 int pit_get_out(PITState *pit, int channel, int64_t current_time);
662
663 /* pc.c */
664 void pc_init(int ram_size, int vga_ram_size, int boot_device,
665 DisplayState *ds, const char **fd_filename, int snapshot,
666 const char *kernel_filename, const char *kernel_cmdline,
667 const char *initrd_filename);
668
669 /* ppc.c */
670 void ppc_init (int ram_size, int vga_ram_size, int boot_device,
671 DisplayState *ds, const char **fd_filename, int snapshot,
672 const char *kernel_filename, const char *kernel_cmdline,
673 const char *initrd_filename);
674 void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device,
675 DisplayState *ds, const char **fd_filename, int snapshot,
676 const char *kernel_filename, const char *kernel_cmdline,
677 const char *initrd_filename);
678 void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
679 DisplayState *ds, const char **fd_filename, int snapshot,
680 const char *kernel_filename, const char *kernel_cmdline,
681 const char *initrd_filename);
682 #ifdef TARGET_PPC
683 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
684 #endif
685 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
686
687 extern CPUWriteMemoryFunc *PPC_io_write[];
688 extern CPUReadMemoryFunc *PPC_io_read[];
689 extern int prep_enabled;
690
691 /* NVRAM helpers */
692 #include "hw/m48t59.h"
693
694 void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
695 uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
696 void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
697 uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
698 void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
699 uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
700 void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
701 const unsigned char *str, uint32_t max);
702 int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
703 void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
704 uint32_t start, uint32_t count);
705 int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
706 const unsigned char *arch,
707 uint32_t RAM_size, int boot_device,
708 uint32_t kernel_image, uint32_t kernel_size,
709 uint32_t cmdline, uint32_t cmdline_size,
710 uint32_t initrd_image, uint32_t initrd_size,
711 uint32_t NVRAM_image);
712
713 /* adb.c */
714
715 #define MAX_ADB_DEVICES 16
716
717 typedef struct ADBDevice ADBDevice;
718
719 typedef void ADBDeviceReceivePacket(ADBDevice *d, const uint8_t *buf, int len);
720
721 struct ADBDevice {
722 struct ADBBusState *bus;
723 int devaddr;
724 int handler;
725 ADBDeviceReceivePacket *receive_packet;
726 void *opaque;
727 };
728
729 typedef struct ADBBusState {
730 ADBDevice devices[MAX_ADB_DEVICES];
731 int nb_devices;
732 } ADBBusState;
733
734 void adb_receive_packet(ADBBusState *s, const uint8_t *buf, int len);
735 void adb_send_packet(ADBBusState *s, const uint8_t *buf, int len);
736
737 ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
738 ADBDeviceReceivePacket *receive_packet,
739 void *opaque);
740 void adb_kbd_init(ADBBusState *bus);
741 void adb_mouse_init(ADBBusState *bus);
742
743 /* cuda.c */
744
745 extern ADBBusState adb_bus;
746 int cuda_init(void);
747
748 /* monitor.c */
749 void monitor_init(void);
750 void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
751 void term_flush(void);
752 void term_print_help(void);
753
754 /* gdbstub.c */
755
756 #define DEFAULT_GDBSTUB_PORT 1234
757
758 int gdbserver_start(int port);
759
760 #endif /* VL_H */