+ \r
+ #\r
+ # ARM PL180 MCI\r
+ #\r
+ gArmTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000006\r
+ gArmTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000007\r
+\r
+ #\r
+ # ARM PL390 General Interrupt Controller\r
+ #\r
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C\r
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D\r
+ gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023\r
+\r
+ #\r
+ # ARM Secure SEC PCDs\r
+ #\r
+ gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015\r
+ gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016\r
+\r
+ #\r
+ # ARM MPCore MailBox PCDs\r
+ #\r
+ # Address to Set/Get to Mailbox in Multicore system\r
+ gArmTokenSpaceGuid.PcdMPCoreMailboxSetAddress|0|UINT32|0x00000017\r
+ gArmTokenSpaceGuid.PcdMPCoreMailboxGetAddress|0|UINT32|0x00000018\r
+ # Address/Value to clear Mailbox in Multicore system\r
+ gArmTokenSpaceGuid.PcdMPCoreMailboxClearAddress|0|UINT32|0x00000019\r
+ gArmTokenSpaceGuid.PcdMPCoreMailboxClearValue|0|UINT32|0x0000001A\r
+\r
+ #\r
+ # ARM L2x0 PCDs\r
+ #\r
+ gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B\r
+ \r
+ #\r
+ # ARM PL390 General Interrupt Controller\r
+ #\r
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000001C\r
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000001D\r
+ \r
+ # \r
+ # BdsLib\r
+ #\r
+ gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E\r
+ gArmTokenSpaceGuid.PcdLinuxKernelDP|L""|VOID*|0x0000001F\r
+ gArmTokenSpaceGuid.PcdLinuxAtag|""|VOID*|0x00000020\r
+ gArmTokenSpaceGuid.PcdFdtDP|L""|VOID*|0x00000021\r
+\r