+ // The ARM Core Info Table must define every core\r
+ ASSERT (Index != ArmCoreCount);\r
+\r
+ // Clear Secondary cores MailBox\r
+ MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress, ArmCoreInfoTable[Index].MailboxClearValue);\r
+\r
+ do {\r
+ ArmCallWFI ();\r
+\r
+ // Read the Mailbox\r
+ SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);\r
+\r
+ // Acknowledge the interrupt and send End of Interrupt signal.\r
+ AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);\r
+ // Check if it is a valid interrupt ID\r
+ if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {\r
+ // Got a valid SGI number hence signal End of Interrupt\r
+ ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);\r
+ }\r
+ } while (SecondaryEntryAddr == 0);\r