+\r
+ #\r
+ # AARCH64 uses strict alignment and avoids SIMD registers for code that may execute\r
+ # with the MMU off. This involves SEC, PEI_CORE and PEIM modules as well as BASE\r
+ # libraries, given that they may be included into such modules.\r
+ # This library, even though of the BASE type, is never used in such cases, and\r
+ # avoiding the SIMD register file (which is shared with the FPU) prevents the\r
+ # compiler from successfully building some of the OpenSSL source files that\r
+ # use floating point types, so clear the flags here.\r
+ #\r
+ GCC:*_*_AARCH64_CC_XIPFLAGS ==\r