-} x64_PAGE_TABLE_ENTRY_2M;\r
-\r
-typedef union {\r
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
- UINT64 Reserved:57;\r
-} x64_PAGE_TABLE_ENTRY_COMMON;\r
-\r
-typedef union {\r
- x64_PAGE_TABLE_ENTRY_4K Page4k;\r
- x64_PAGE_TABLE_ENTRY_2M Page2Mb;\r
- x64_PAGE_TABLE_ENTRY_COMMON Common;\r
-} x64_PAGE_TABLE_ENTRY;\r
-\r
-//\r
-// MTRR Definitions\r
-//\r
-typedef enum {\r
- Uncached = 0,\r
- WriteCombining = 1,\r
- WriteThrough = 4,\r
- WriteProtected = 5,\r
- WriteBack = 6\r
-} x64_MTRR_MEMORY_TYPE;\r
-\r
-typedef union {\r
- struct {\r
- UINT32 VCNT:8; // The number of Variable Range MTRRs\r
- UINT32 FIX:1; // 1=Fixed Range MTRRs supported. 0=Fixed Range MTRRs not supported\r
- UINT32 Reserved_0; // Reserved\r
- UINT32 WC:1; // Write combining memory type supported\r
- UINT32 Reserved_1:21; // Reserved\r
- UINT32 Reserved_2:32; // Reserved\r
- } Bits;\r
- UINT64 Uint64;\r
-} x64_MTRRCAP_MSR;\r
-\r
-typedef union {\r
- struct {\r
- UINT32 Type:8; // Default Memory Type\r
- UINT32 Reserved_0:2; // Reserved\r
- UINT32 FE:1; // 1=Fixed Range MTRRs enabled. 0=Fixed Range MTRRs disabled\r
- UINT32 E:1; // 1=MTRRs enabled, 0=MTRRs disabled\r
- UINT32 Reserved_1:20; // Reserved\r
- UINT32 Reserved_2:32; // Reserved\r
- } Bits;\r
- UINT64 Uint64;\r
-} x64_MTRR_DEF_TYPE_MSR;\r
-\r
-typedef union {\r
- UINT8 Type[8]; // The 8 Memory Type values in the 64-bit MTRR\r
- UINT64 Uint64; // The full 64-bit MSR\r
-} x64_MTRR_FIXED_RANGE_MSR;\r
-\r
-typedef struct {\r
- x64_MTRRCAP_MSR Capabilities; // MTRR Capabilities MSR value\r
- x64_MTRR_DEF_TYPE_MSR DefaultType; // Default Memory Type MSR Value\r
- x64_MTRR_FIXED_RANGE_MSR Fixed[11]; // The 11 Fixed MTRR MSR Values\r
-} x64_MTRR_FIXED_RANGE;\r
-\r
-\r
-typedef union {\r
- struct {\r
- UINT64 Type:8; // Memory Type\r
- UINT64 Reserved0:4; // Reserved\r
- UINT64 PhysBase:40; // The physical base address(bits 35..12) of the MTRR\r
- UINT64 Reserved1:12 ; // Reserved\r
- } Bits;\r
- UINT64 Uint64;\r
-} x64_MTRR_PHYSBASE_MSR;\r
-\r
-typedef union {\r
- struct {\r
- UINT64 Reserved0:11; // Reserved\r
- UINT64 Valid:1; // 1=MTRR is valid, 0=MTRR is not valid\r
- UINT64 PhysMask:40; // The physical address mask (bits 35..12) of the MTRR\r
- UINT64 Reserved1:12; // Reserved\r
- } Bits;\r
- UINT64 Uint64;\r
-} x64_MTRR_PHYSMASK_MSR;\r
-\r
-typedef struct {\r
- x64_MTRR_PHYSBASE_MSR PhysBase; // Variable MTRR Physical Base MSR\r
- x64_MTRR_PHYSMASK_MSR PhysMask; // Variable MTRR Physical Mask MSR\r
-} x64_MTRR_VARIABLE_RANGE;\r