+ Store first address not used by e820 RAM entries in\r
+ PlatformInfoHob->FirstNonAddress\r
+**/\r
+STATIC\r
+VOID\r
+PlatformGetFirstNonAddressCB (\r
+ IN EFI_E820_ENTRY64 *E820Entry,\r
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
+ )\r
+{\r
+ UINT64 Candidate;\r
+\r
+ if (E820Entry->Type != EfiAcpiAddressRangeMemory) {\r
+ return;\r
+ }\r
+\r
+ Candidate = E820Entry->BaseAddr + E820Entry->Length;\r
+ if (PlatformInfoHob->FirstNonAddress < Candidate) {\r
+ DEBUG ((DEBUG_INFO, "%a: FirstNonAddress=0x%Lx\n", __FUNCTION__, Candidate));\r
+ PlatformInfoHob->FirstNonAddress = Candidate;\r
+ }\r
+}\r
+\r
+/**\r
+ Store the low (below 4G) memory size in\r
+ PlatformInfoHob->LowMemory\r
+**/\r
+STATIC\r
+VOID\r
+PlatformGetLowMemoryCB (\r
+ IN EFI_E820_ENTRY64 *E820Entry,\r
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
+ )\r
+{\r
+ UINT64 Candidate;\r
+\r
+ if (E820Entry->Type != EfiAcpiAddressRangeMemory) {\r
+ return;\r
+ }\r
+\r
+ Candidate = E820Entry->BaseAddr + E820Entry->Length;\r
+ if (Candidate >= BASE_4GB) {\r
+ return;\r
+ }\r
+\r
+ if (PlatformInfoHob->LowMemory < Candidate) {\r
+ DEBUG ((DEBUG_INFO, "%a: LowMemory=0x%Lx\n", __FUNCTION__, Candidate));\r
+ PlatformInfoHob->LowMemory = (UINT32)Candidate;\r
+ }\r
+}\r
+\r
+/**\r
+ Create HOBs for reservations and RAM (except low memory).\r
+**/\r
+STATIC\r
+VOID\r
+PlatformAddHobCB (\r
+ IN EFI_E820_ENTRY64 *E820Entry,\r
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
+ )\r
+{\r
+ UINT64 Base, End;\r
+\r
+ Base = E820Entry->BaseAddr;\r
+ End = E820Entry->BaseAddr + E820Entry->Length;\r
+\r
+ switch (E820Entry->Type) {\r
+ case EfiAcpiAddressRangeMemory:\r
+ if (Base >= BASE_4GB) {\r
+ //\r
+ // Round up the start address, and round down the end address.\r
+ //\r
+ Base = ALIGN_VALUE (Base, (UINT64)EFI_PAGE_SIZE);\r
+ End = End & ~(UINT64)EFI_PAGE_MASK;\r
+ if (Base < End) {\r
+ DEBUG ((DEBUG_INFO, "%a: HighMemory [0x%Lx, 0x%Lx)\n", __FUNCTION__, Base, End));\r
+ PlatformAddMemoryRangeHob (Base, End);\r
+ }\r
+ }\r
+\r
+ break;\r
+ case EfiAcpiAddressRangeReserved:\r
+ BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_RESERVED, 0, Base, End - Base);\r
+ DEBUG ((DEBUG_INFO, "%a: Reserved [0x%Lx, 0x%Lx)\n", __FUNCTION__, Base, End));\r
+ break;\r
+ default:\r
+ DEBUG ((\r
+ DEBUG_WARN,\r
+ "%a: Type %u [0x%Lx, 0x%Lx) (NOT HANDLED)\n",\r
+ __FUNCTION__,\r
+ E820Entry->Type,\r
+ Base,\r
+ End\r
+ ));\r
+ break;\r
+ }\r
+}\r
+\r
+/**\r
+ Check whenever the 64bit PCI MMIO window overlaps with a reservation\r
+ from qemu. If so move down the MMIO window to resolve the conflict.\r
+\r
+ This happens on (virtual) AMD machines with 1TB address space,\r
+ because the AMD IOMMU uses an address window just below 1TB.\r
+**/\r
+STATIC\r
+VOID\r
+PlatformReservationConflictCB (\r
+ IN EFI_E820_ENTRY64 *E820Entry,\r
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
+ )\r
+{\r
+ UINT64 IntersectionBase;\r
+ UINT64 IntersectionEnd;\r
+ UINT64 NewBase;\r
+\r
+ IntersectionBase = MAX (\r
+ E820Entry->BaseAddr,\r
+ PlatformInfoHob->PcdPciMmio64Base\r
+ );\r
+ IntersectionEnd = MIN (\r
+ E820Entry->BaseAddr + E820Entry->Length,\r
+ PlatformInfoHob->PcdPciMmio64Base +\r
+ PlatformInfoHob->PcdPciMmio64Size\r
+ );\r
+\r
+ if (IntersectionBase >= IntersectionEnd) {\r
+ return; // no overlap\r
+ }\r
+\r
+ NewBase = E820Entry->BaseAddr - PlatformInfoHob->PcdPciMmio64Size;\r
+ NewBase = NewBase & ~(PlatformInfoHob->PcdPciMmio64Size - 1);\r
+\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: move mmio: 0x%Lx => %Lx\n",\r
+ __FUNCTION__,\r
+ PlatformInfoHob->PcdPciMmio64Base,\r
+ NewBase\r
+ ));\r
+ PlatformInfoHob->PcdPciMmio64Base = NewBase;\r
+}\r