-#define CRTC_ADDRESS_REGISTER 0x3d4\r
-#define CRTC_DATA_REGISTER 0x3d5\r
-#define SEQ_ADDRESS_REGISTER 0x3c4\r
-#define SEQ_DATA_REGISTER 0x3c5\r
-#define GRAPH_ADDRESS_REGISTER 0x3ce\r
-#define GRAPH_DATA_REGISTER 0x3cf\r
-#define ATT_ADDRESS_REGISTER 0x3c0\r
-#define MISC_OUTPUT_REGISTER 0x3c2\r
-#define INPUT_STATUS_1_REGISTER 0x3da\r
-#define DAC_PIXEL_MASK_REGISTER 0x3c6\r
-#define PALETTE_INDEX_REGISTER 0x3c8\r
-#define PALETTE_DATA_REGISTER 0x3c9\r
-\r
-#define VBE_DISPI_IOPORT_INDEX 0x01CE\r
-#define VBE_DISPI_IOPORT_DATA 0x01D0\r
-\r
-#define VBE_DISPI_INDEX_ID 0x0\r
-#define VBE_DISPI_INDEX_XRES 0x1\r
-#define VBE_DISPI_INDEX_YRES 0x2\r
-#define VBE_DISPI_INDEX_BPP 0x3\r
-#define VBE_DISPI_INDEX_ENABLE 0x4\r
-#define VBE_DISPI_INDEX_BANK 0x5\r
-#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6\r
-#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7\r
-#define VBE_DISPI_INDEX_X_OFFSET 0x8\r
-#define VBE_DISPI_INDEX_Y_OFFSET 0x9\r
-#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa\r
-\r
-#define VBE_DISPI_ID0 0xB0C0\r
-#define VBE_DISPI_ID1 0xB0C1\r
-#define VBE_DISPI_ID2 0xB0C2\r
-#define VBE_DISPI_ID3 0xB0C3\r
-#define VBE_DISPI_ID4 0xB0C4\r
-#define VBE_DISPI_ID5 0xB0C5\r
-\r
-#define VBE_DISPI_DISABLED 0x00\r
-#define VBE_DISPI_ENABLED 0x01\r
-#define VBE_DISPI_GETCAPS 0x02\r
-#define VBE_DISPI_8BIT_DAC 0x20\r
-#define VBE_DISPI_LFB_ENABLED 0x40\r
-#define VBE_DISPI_NOCLEARMEM 0x80\r
+#define CRTC_ADDRESS_REGISTER 0x3d4\r
+#define CRTC_DATA_REGISTER 0x3d5\r
+#define SEQ_ADDRESS_REGISTER 0x3c4\r
+#define SEQ_DATA_REGISTER 0x3c5\r
+#define GRAPH_ADDRESS_REGISTER 0x3ce\r
+#define GRAPH_DATA_REGISTER 0x3cf\r
+#define ATT_ADDRESS_REGISTER 0x3c0\r
+#define MISC_OUTPUT_REGISTER 0x3c2\r
+#define INPUT_STATUS_1_REGISTER 0x3da\r
+#define DAC_PIXEL_MASK_REGISTER 0x3c6\r
+#define PALETTE_INDEX_REGISTER 0x3c8\r
+#define PALETTE_DATA_REGISTER 0x3c9\r
+\r
+#define VBE_DISPI_IOPORT_INDEX 0x01CE\r
+#define VBE_DISPI_IOPORT_DATA 0x01D0\r
+\r
+#define VBE_DISPI_INDEX_ID 0x0\r
+#define VBE_DISPI_INDEX_XRES 0x1\r
+#define VBE_DISPI_INDEX_YRES 0x2\r
+#define VBE_DISPI_INDEX_BPP 0x3\r
+#define VBE_DISPI_INDEX_ENABLE 0x4\r
+#define VBE_DISPI_INDEX_BANK 0x5\r
+#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6\r
+#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7\r
+#define VBE_DISPI_INDEX_X_OFFSET 0x8\r
+#define VBE_DISPI_INDEX_Y_OFFSET 0x9\r
+#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa\r
+\r
+#define VBE_DISPI_ID0 0xB0C0\r
+#define VBE_DISPI_ID1 0xB0C1\r
+#define VBE_DISPI_ID2 0xB0C2\r
+#define VBE_DISPI_ID3 0xB0C3\r
+#define VBE_DISPI_ID4 0xB0C4\r
+#define VBE_DISPI_ID5 0xB0C5\r
+\r
+#define VBE_DISPI_DISABLED 0x00\r
+#define VBE_DISPI_ENABLED 0x01\r
+#define VBE_DISPI_GETCAPS 0x02\r
+#define VBE_DISPI_8BIT_DAC 0x20\r
+#define VBE_DISPI_LFB_ENABLED 0x40\r
+#define VBE_DISPI_NOCLEARMEM 0x80\r