1. Mark the network volatile variables as deprecated in code comments and remove...

[mirror_edk2.git] / PcAtChipsetPkg / PciHostBridgeDxe / PciHostBridge.c

diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c b/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c
index dc8e79b11a270de8373c40eddc6867df0ac0b675..83fcdf4f1a7742fab38b38b9467864d6c8f319c2 100644 (file)
--- a/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c
+++ b/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c
@@ -1,7 +1,7 @@
 /** @file\r
   Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation\r
 \r
 /** @file\r
   Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation\r
 \r

-Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>\r

 This program and the accompanying materials are\r
 licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
 This program and the accompanying materials are\r
 licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r


@@ -14,17 +14,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 \r
 #include "PciHostBridge.h"\r
 \r
 \r
 #include "PciHostBridge.h"\r
 \r

-//\r
-// Support 64 K IO space\r
-//\r
-#define RES_IO_BASE   0x1000\r
-#define RES_IO_LIMIT  0xFFFF\r
-//\r
-// Support 4G address space\r
-//\r
-#define RES_MEM_BASE_1 0xF8000000\r
-#define RES_MEM_LIMIT_1 (0xFEC00000 - 1)\r
-\r

 //\r
 // Hard code: Root Bridge Number within the host bridge\r
 //            Root Bridge's attribute\r
 //\r
 // Hard code: Root Bridge Number within the host bridge\r
 //            Root Bridge's attribute\r


@@ -33,25 +22,38 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 //\r
 UINTN RootBridgeNumber[1] = { 1 };\r
 \r
 //\r
 UINTN RootBridgeNumber[1] = { 1 };\r
 \r

-UINT64 RootBridgeAttribute[1][1] = { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM };\r
+UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };\r

 \r
 EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {\r
   {\r
 \r
 EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {\r
   {\r

-    ACPI_DEVICE_PATH,\r
-    ACPI_DP,\r
-    (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
-    (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8),\r
-    EISA_PNP_ID(0x0A03),\r
-    0,\r
-    END_DEVICE_PATH_TYPE,\r
-    END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
-    END_DEVICE_PATH_LENGTH,\r
-    0\r
+    {\r
+      {\r
+        {\r
+          ACPI_DEVICE_PATH,\r
+          ACPI_DP,\r
+          {\r
+            (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
+            (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)\r
+          }\r
+        },\r
+        EISA_PNP_ID(0x0A03),\r
+        0\r
+      },\r
+  \r
+      {\r
+        END_DEVICE_PATH_TYPE,\r
+        END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
+        {\r
+          END_DEVICE_PATH_LENGTH,\r
+          0\r
+        }\r
+      }\r
+    }\r

   }\r
 };\r
 \r
 PCI_ROOT_BRIDGE_RESOURCE_APPETURE  mResAppeture[1][1] = {\r
   }\r
 };\r
 \r
 PCI_ROOT_BRIDGE_RESOURCE_APPETURE  mResAppeture[1][1] = {\r

-  {0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}\r
+  {{0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}}\r

 };\r
 \r
 EFI_HANDLE mDriverImageHandle;\r
 };\r
 \r
 EFI_HANDLE mDriverImageHandle;\r


@@ -78,6 +80,7 @@ PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {
 //\r
 // Implementation\r
 //\r
 //\r
 // Implementation\r
 //\r

+\r

 /**\r
   Entry point of this driver\r
 \r
 /**\r
   Entry point of this driver\r
 \r


@@ -100,8 +103,6 @@ InitializePciHostBridge (
   UINTN                       Loop2;\r
   PCI_HOST_BRIDGE_INSTANCE    *HostBridge;\r
   PCI_ROOT_BRIDGE_INSTANCE    *PrivateData;\r
   UINTN                       Loop2;\r
   PCI_HOST_BRIDGE_INSTANCE    *HostBridge;\r
   PCI_ROOT_BRIDGE_INSTANCE    *PrivateData;\r

-  IN EFI_PHYSICAL_ADDRESS     BaseAddress;\r
-  IN UINT64                   Length;\r

  \r
   mDriverImageHandle = ImageHandle;\r
   \r
  \r
   mDriverImageHandle = ImageHandle;\r
   \r


@@ -162,29 +163,6 @@ InitializePciHostBridge (
     }\r
   } \r
 \r
     }\r
   } \r
 \r

-  Status = gDS->AddIoSpace (\r
-                  EfiGcdIoTypeIo, \r
-                  RES_IO_BASE, \r
-                  RES_IO_LIMIT - RES_IO_BASE + 1\r
-                  );\r
-  \r
-  // PCI memory space from 3.75Gbytes->(4GBytes - BIOSFWH local APIC etc)\r
-  Status = gDS->AddMemorySpace (\r
-                  EfiGcdMemoryTypeMemoryMappedIo, \r
-                  RES_MEM_BASE_1, \r
-                  (RES_MEM_LIMIT_1 - RES_MEM_BASE_1 + 1),\r
-                  0\r
-                  );\r
-  \r
-  BaseAddress = 0x80000000;\r
-  Length      = RES_MEM_BASE_1 - BaseAddress;\r
-  Status = gDS->AddMemorySpace (\r
-                  EfiGcdMemoryTypeMemoryMappedIo, \r
-                  BaseAddress, \r
-                  Length,\r
-                  0\r
-                  );\r
-  \r

   return EFI_SUCCESS;\r
 }\r
 \r
   return EFI_SUCCESS;\r
 }\r
 \r


@@ -236,7 +214,7 @@ InitializePciHostBridge (
                                           required here. This notification can be used to perform any chipsetspecific\r
                                           programming.\r
 \r
                                           required here. This notification can be used to perform any chipsetspecific\r
                                           programming.\r
 \r

-   @param[in] PciResAlloc         The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+   @param[in] This                The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r

    @param[in] Phase               The phase during enumeration\r
 \r
    @retval EFI_NOT_READY          This phase cannot be entered at this time. For example, this error\r
    @param[in] Phase               The phase during enumeration\r
 \r
    @retval EFI_NOT_READY          This phase cannot be entered at this time. For example, this error\r


@@ -303,12 +281,14 @@ NotifyPhase(
     }  \r
     break;\r
 \r
     }  \r
     break;\r
 \r

+  case EfiPciHostBridgeEndEnumeration:\r
+    break;\r
+\r

   case EfiPciHostBridgeBeginBusAllocation:\r
     //\r
     // No specific action is required here, can perform any chipset specific programing\r
     //\r
     HostBridgeInstance->CanRestarted = FALSE;\r
   case EfiPciHostBridgeBeginBusAllocation:\r
     //\r
     // No specific action is required here, can perform any chipset specific programing\r
     //\r
     HostBridgeInstance->CanRestarted = FALSE;\r

-    return EFI_SUCCESS;\r

     break;\r
 \r
   case EfiPciHostBridgeEndBusAllocation:\r
     break;\r
 \r
   case EfiPciHostBridgeEndBusAllocation:\r


@@ -316,7 +296,6 @@ NotifyPhase(
     // No specific action is required here, can perform any chipset specific programing\r
     //\r
     //HostBridgeInstance->CanRestarted = FALSE;\r
     // No specific action is required here, can perform any chipset specific programing\r
     //\r
     //HostBridgeInstance->CanRestarted = FALSE;\r

-    return EFI_SUCCESS;\r

     break;\r
 \r
   case EfiPciHostBridgeBeginResourceAllocation:\r
     break;\r
 \r
   case EfiPciHostBridgeBeginResourceAllocation:\r


@@ -324,7 +303,6 @@ NotifyPhase(
     // No specific action is required here, can perform any chipset specific programing\r
     //\r
     //HostBridgeInstance->CanRestarted = FALSE;\r
     // No specific action is required here, can perform any chipset specific programing\r
     //\r
     //HostBridgeInstance->CanRestarted = FALSE;\r

-    return EFI_SUCCESS;\r

     break;\r
 \r
   case EfiPciHostBridgeAllocateResources:\r
     break;\r
 \r
   case EfiPciHostBridgeAllocateResources:\r


@@ -345,7 +323,7 @@ NotifyPhase(
             //\r
             // Get the number of '1' in Alignment.\r
             //\r
             //\r
             // Get the number of '1' in Alignment.\r
             //\r

-            BitsOfAlignment = HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1;\r
+            BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);\r

                                   \r
             switch (Index) {\r
 \r
                                   \r
             switch (Index) {\r
 \r


@@ -494,7 +472,6 @@ NotifyPhase(
     HostBridgeInstance->ResourceSubmited = FALSE;\r
     HostBridgeInstance->CanRestarted     = TRUE;      \r
     return ReturnStatus;\r
     HostBridgeInstance->ResourceSubmited = FALSE;\r
     HostBridgeInstance->CanRestarted     = TRUE;      \r
     return ReturnStatus;\r

-    break;\r

 \r
   case EfiPciHostBridgeEndResourceAllocation:\r
     HostBridgeInstance->CanRestarted = FALSE;\r
 \r
   case EfiPciHostBridgeEndResourceAllocation:\r
     HostBridgeInstance->CanRestarted = FALSE;\r


@@ -502,7 +479,7 @@ NotifyPhase(
 \r
   default:\r
     return EFI_INVALID_PARAMETER;\r
 \r
   default:\r
     return EFI_INVALID_PARAMETER;\r

-  }; // end switch\r
+  }\r

   \r
   return EFI_SUCCESS;  \r
 }\r
   \r
   return EFI_SUCCESS;  \r
 }\r


@@ -521,7 +498,7 @@ NotifyPhase(
    For D945 implementation, there is only one root bridge in PCI host bridge.\r
 \r
    @param[in]       This              The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
    For D945 implementation, there is only one root bridge in PCI host bridge.\r
 \r
    @param[in]       This              The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r

-   @param[in][out]  RootBridgeHandle  Returns the device handle of the next PCI root bridge.\r
+   @param[in, out]  RootBridgeHandle  Returns the device handle of the next PCI root bridge.\r

    \r
    @retval EFI_SUCCESS            If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the\r
                                   specific Host bridge and return EFI_SUCCESS. \r
    \r
    @retval EFI_SUCCESS            If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the\r
                                   specific Host bridge and return EFI_SUCCESS. \r


@@ -871,7 +848,7 @@ SubmitResources(
   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
   UINT8                                 *Temp;\r
   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
   UINT8                                 *Temp;\r

-  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     *ptr;\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     *Ptr;\r

   UINT64                                AddrLen;\r
   UINT64                                Alignment;\r
   \r
   UINT64                                AddrLen;\r
   UINT64                                Alignment;\r
   \r


@@ -898,30 +875,30 @@ SubmitResources(
     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
     if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
       while ( *Temp == 0x8A) {\r
     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
     if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
       while ( *Temp == 0x8A) {\r

-        ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
+        Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r

 \r
         //\r
         // Check Address Length\r
         //\r
 \r
         //\r
         // Check Address Length\r
         //\r

-        if (ptr->AddrLen > 0xffffffff) {\r
+        if (Ptr->AddrLen > 0xffffffff) {\r

           return EFI_INVALID_PARAMETER;\r
         }\r
 \r
         //\r
         // Check address range alignment\r
         //\r
           return EFI_INVALID_PARAMETER;\r
         }\r
 \r
         //\r
         // Check address range alignment\r
         //\r

-        if (ptr->AddrRangeMax >= 0xffffffff || ptr->AddrRangeMax != (GetPowerOfTwo64 (ptr->AddrRangeMax + 1) - 1)) {\r
+        if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {\r

           return EFI_INVALID_PARAMETER;\r
         }\r
         \r
           return EFI_INVALID_PARAMETER;\r
         }\r
         \r

-        switch (ptr->ResType) {\r
+        switch (Ptr->ResType) {\r

 \r
         case 0:\r
             \r
           //\r
           // Check invalid Address Sapce Granularity\r
           //\r
 \r
         case 0:\r
             \r
           //\r
           // Check invalid Address Sapce Granularity\r
           //\r

-          if (ptr->AddrSpaceGranularity != 32) {\r
+          if (Ptr->AddrSpaceGranularity != 32) {\r

             return EFI_INVALID_PARAMETER;\r
           }\r
             \r
             return EFI_INVALID_PARAMETER;\r
           }\r
             \r


@@ -929,14 +906,14 @@ SubmitResources(
           // check the memory resource request is supported by PCI root bridge\r
           //\r
           if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&\r
           // check the memory resource request is supported by PCI root bridge\r
           //\r
           if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&\r

-               ptr->SpecificFlag == 0x06) {\r
+               Ptr->SpecificFlag == 0x06) {\r

             return EFI_INVALID_PARAMETER;\r
           }\r
             \r
             return EFI_INVALID_PARAMETER;\r
           }\r
             \r

-          AddrLen = ptr->AddrLen;\r
-          Alignment = ptr->AddrRangeMax;\r
-          if (ptr->AddrSpaceGranularity == 32) {\r
-            if (ptr->SpecificFlag == 0x06) {\r
+          AddrLen = Ptr->AddrLen;\r
+          Alignment = Ptr->AddrRangeMax;\r
+          if (Ptr->AddrSpaceGranularity == 32) {\r
+            if (Ptr->SpecificFlag == 0x06) {\r

               //\r
               // Apply from GCD\r
               //\r
               //\r
               // Apply from GCD\r
               //\r


@@ -949,8 +926,8 @@ SubmitResources(
             }\r
           }\r
 \r
             }\r
           }\r
 \r

-          if (ptr->AddrSpaceGranularity == 64) {\r
-            if (ptr->SpecificFlag == 0x06) {\r
+          if (Ptr->AddrSpaceGranularity == 64) {\r
+            if (Ptr->SpecificFlag == 0x06) {\r

               RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;\r
             } else {\r
               RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;\r
               RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;\r
             } else {\r
               RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;\r


@@ -959,8 +936,8 @@ SubmitResources(
           break;\r
 \r
         case 1:\r
           break;\r
 \r
         case 1:\r

-          AddrLen = (UINTN)ptr->AddrLen;\r
-          Alignment = (UINTN)ptr->AddrRangeMax;\r
+          AddrLen = (UINTN) Ptr->AddrLen;\r
+          Alignment = (UINTN) Ptr->AddrRangeMax;\r

           RootBridgeInstance->ResAllocNode[TypeIo].Length  = AddrLen;\r
           RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;\r
           RootBridgeInstance->ResAllocNode[TypeIo].Status  = ResRequested;\r
           RootBridgeInstance->ResAllocNode[TypeIo].Length  = AddrLen;\r
           RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;\r
           RootBridgeInstance->ResAllocNode[TypeIo].Status  = ResRequested;\r


@@ -1018,7 +995,7 @@ GetProposedResources(
   UINTN                                 Number; \r
   VOID                                  *Buffer; \r
   UINT8                                 *Temp;\r
   UINTN                                 Number; \r
   VOID                                  *Buffer; \r
   UINT8                                 *Temp;\r

-  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     *ptr;\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     *Ptr;\r

   UINT64                                ResStatus;\r
     \r
   Buffer = NULL;\r
   UINT64                                ResStatus;\r
     \r
   Buffer = NULL;\r


@@ -1053,7 +1030,7 @@ GetProposedResources(
       Temp = Buffer;\r
       for (Index = 0; Index < TypeBus; Index ++) {\r
         if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
       Temp = Buffer;\r
       for (Index = 0; Index < TypeBus; Index ++) {\r
         if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r

-          ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
+          Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r

           ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;\r
           \r
           switch (Index) {\r
           ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;\r
           \r
           switch (Index) {\r


@@ -1062,81 +1039,81 @@ GetProposedResources(
             //\r
             // Io\r
             //\r
             //\r
             // Io\r
             //\r

-            ptr->Desc = 0x8A;\r
-            ptr->Len  = 0x2B;\r
-            ptr->ResType = 1;\r
-            ptr->GenFlag = 0; \r
-            ptr->SpecificFlag = 0;\r
-            ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
-            ptr->AddrRangeMax = 0;\r
-            ptr->AddrTranslationOffset = \\r
+            Ptr->Desc = 0x8A;\r
+            Ptr->Len  = 0x2B;\r
+            Ptr->ResType = 1;\r
+            Ptr->GenFlag = 0; \r
+            Ptr->SpecificFlag = 0;\r
+            Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
+            Ptr->AddrRangeMax = 0;\r
+            Ptr->AddrTranslationOffset = \\r

                  (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;\r
                  (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;\r

-            ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
+            Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r

             break;\r
 \r
           case TypeMem32:\r
             //\r
             // Memory 32\r
             // \r
             break;\r
 \r
           case TypeMem32:\r
             //\r
             // Memory 32\r
             // \r

-            ptr->Desc = 0x8A;\r
-            ptr->Len  = 0x2B;\r
-            ptr->ResType = 0;\r
-            ptr->GenFlag = 0; \r
-            ptr->SpecificFlag = 0;\r
-            ptr->AddrSpaceGranularity = 32;\r
-            ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
-            ptr->AddrRangeMax = 0;\r
-            ptr->AddrTranslationOffset = \\r
+            Ptr->Desc = 0x8A;\r
+            Ptr->Len  = 0x2B;\r
+            Ptr->ResType = 0;\r
+            Ptr->GenFlag = 0; \r
+            Ptr->SpecificFlag = 0;\r
+            Ptr->AddrSpaceGranularity = 32;\r
+            Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
+            Ptr->AddrRangeMax = 0;\r
+            Ptr->AddrTranslationOffset = \\r

                  (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;              \r
                  (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;              \r

-            ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
+            Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r

             break;\r
 \r
           case TypePMem32:\r
             //\r
             // Prefetch memory 32\r
             //\r
             break;\r
 \r
           case TypePMem32:\r
             //\r
             // Prefetch memory 32\r
             //\r

-            ptr->Desc = 0x8A;\r
-            ptr->Len  = 0x2B;\r
-            ptr->ResType = 0;\r
-            ptr->GenFlag = 0; \r
-            ptr->SpecificFlag = 6;\r
-            ptr->AddrSpaceGranularity = 32;\r
-            ptr->AddrRangeMin = 0;\r
-            ptr->AddrRangeMax = 0;\r
-            ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       \r
-            ptr->AddrLen = 0;\r
+            Ptr->Desc = 0x8A;\r
+            Ptr->Len  = 0x2B;\r
+            Ptr->ResType = 0;\r
+            Ptr->GenFlag = 0; \r
+            Ptr->SpecificFlag = 6;\r
+            Ptr->AddrSpaceGranularity = 32;\r
+            Ptr->AddrRangeMin = 0;\r
+            Ptr->AddrRangeMax = 0;\r
+            Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       \r
+            Ptr->AddrLen = 0;\r

             break;\r
 \r
           case TypeMem64:\r
             //\r
             // Memory 64\r
             //\r
             break;\r
 \r
           case TypeMem64:\r
             //\r
             // Memory 64\r
             //\r

-            ptr->Desc = 0x8A;\r
-            ptr->Len  = 0x2B;\r
-            ptr->ResType = 0;\r
-            ptr->GenFlag = 0; \r
-            ptr->SpecificFlag = 0;\r
-            ptr->AddrSpaceGranularity = 64;\r
-            ptr->AddrRangeMin = 0;\r
-            ptr->AddrRangeMax = 0;\r
-            ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       \r
-            ptr->AddrLen = 0;\r
+            Ptr->Desc = 0x8A;\r
+            Ptr->Len  = 0x2B;\r
+            Ptr->ResType = 0;\r
+            Ptr->GenFlag = 0; \r
+            Ptr->SpecificFlag = 0;\r
+            Ptr->AddrSpaceGranularity = 64;\r
+            Ptr->AddrRangeMin = 0;\r
+            Ptr->AddrRangeMax = 0;\r
+            Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       \r
+            Ptr->AddrLen = 0;\r

             break;\r
 \r
           case TypePMem64:\r
             //\r
             // Prefetch memory 64\r
             //\r
             break;\r
 \r
           case TypePMem64:\r
             //\r
             // Prefetch memory 64\r
             //\r

-            ptr->Desc = 0x8A;\r
-            ptr->Len  = 0x2B;\r
-            ptr->ResType = 0;\r
-            ptr->GenFlag = 0; \r
-            ptr->SpecificFlag = 6;\r
-            ptr->AddrSpaceGranularity = 64;\r
-            ptr->AddrRangeMin = 0;\r
-            ptr->AddrRangeMax = 0;\r
-            ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       \r
-            ptr->AddrLen = 0;\r
+            Ptr->Desc = 0x8A;\r
+            Ptr->Len  = 0x2B;\r
+            Ptr->ResType = 0;\r
+            Ptr->GenFlag = 0; \r
+            Ptr->SpecificFlag = 6;\r
+            Ptr->AddrSpaceGranularity = 64;\r
+            Ptr->AddrRangeMin = 0;\r
+            Ptr->AddrRangeMax = 0;\r
+            Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       \r
+            Ptr->AddrLen = 0;\r

             break;\r
           };\r
           \r
             break;\r
           };\r
           \r


@@ -1158,110 +1135,6 @@ GetProposedResources(
   return EFI_INVALID_PARAMETER;\r
 }\r
 \r
   return EFI_INVALID_PARAMETER;\r
 }\r
 \r

-/**\r
-  Update attribute for PCI root bridge for specifc device.\r
-\r
-  @param RootBridge      Point to PCI root bridge.\r
-  @param PciAddress      The specific device PCI address\r
-**/\r
-STATIC\r
-VOID\r
-UpdateRootBridgeAttributes (\r
-  IN  PCI_ROOT_BRIDGE_INSTANCE                     *RootBridge,\r
-  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS  PciAddress\r
-  )\r
-{\r
-  EFI_STATUS                 Status;\r
-  PCI_TYPE01                 PciConfigurationHeader;\r
-  UINT64                     Attributes;\r
-\r
-  //\r
-  // Read the PCI Configuration Header for the device\r
-  //\r
-  Status = RootBridge->Io.Pci.Read (\r
-    &RootBridge->Io,\r
-    EfiPciWidthUint16,\r
-    EFI_PCI_ADDRESS(\r
-      PciAddress.Bus,\r
-      PciAddress.Device,\r
-      PciAddress.Function,\r
-      0\r
-      ),\r
-    sizeof (PciConfigurationHeader) / sizeof (UINT16),\r
-    &PciConfigurationHeader\r
-    );\r
-  if (EFI_ERROR (Status)) {\r
-    return;\r
-  }\r
-\r
-  Attributes = RootBridge->Attributes;\r
-\r
-  //\r
-  // Look for devices with the VGA Palette Snoop enabled in the COMMAND register of the PCI Config Header\r
-  //\r
-  if (PciConfigurationHeader.Hdr.Command & 0x20) {\r
-    Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
-  }\r
-\r
-  //\r
-  // If the device is a PCI-PCI Bridge, then look at the Subordinate Bus Number\r
-  //\r
-  if (IS_PCI_BRIDGE(&PciConfigurationHeader)) {\r
-    //\r
-    // Look at the PPB Configuration for legacy decoding attributes\r
-    //\r
-    if (PciConfigurationHeader.Bridge.BridgeControl & 0x04) {\r
-      Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;\r
-      Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;\r
-    }\r
-    if (PciConfigurationHeader.Bridge.BridgeControl & 0x08) {\r
-      Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
-      Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
-      Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
-    }\r
-  } else {\r
-    //\r
-    // See if the PCI device is an IDE controller\r
-    //\r
-    if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x01 &&\r
-        PciConfigurationHeader.Hdr.ClassCode[1] == 0x01    ) {\r
-      if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x80) {\r
-        Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
-        Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
-      }\r
-      if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x01) {\r
-        Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
-      }\r
-      if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x04) {\r
-        Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
-      }\r
-    }\r
-\r
-    //\r
-    // See if the PCI device is a legacy VGA controller\r
-    //\r
-    if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x00 &&\r
-        PciConfigurationHeader.Hdr.ClassCode[1] == 0x01    ) {\r
-      Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
-      Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
-      Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
-    }\r
-\r
-    //\r
-    // See if the PCI device is a standard VGA controller\r
-    //\r
-    if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x03 &&\r
-        PciConfigurationHeader.Hdr.ClassCode[1] == 0x00    ) {\r
-      Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
-      Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
-      Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
-    }\r
-  }\r
-\r
-  RootBridge->Attributes = Attributes;\r
-  RootBridge->Supports = Attributes;\r
-}\r
-\r

 /**\r
    Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various\r
    stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual\r
 /**\r
    Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various\r
    stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual\r


@@ -1292,7 +1165,7 @@ UpdateRootBridgeAttributes (
 EFI_STATUS\r
 EFIAPI\r
 PreprocessController (\r
 EFI_STATUS\r
 EFIAPI\r
 PreprocessController (\r

-  IN  struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,\r
+  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL          *This,\r

   IN  EFI_HANDLE                                                RootBridgeHandle,\r
   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS               PciAddress,\r
   IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE              Phase\r
   IN  EFI_HANDLE                                                RootBridgeHandle,\r
   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS               PciAddress,\r
   IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE              Phase\r


@@ -1311,14 +1184,17 @@ PreprocessController (
   while (List != &HostBridgeInstance->Head) {\r
     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
     if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
   while (List != &HostBridgeInstance->Head) {\r
     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
     if (RootBridgeHandle == RootBridgeInstance->Handle) {\r

-      UpdateRootBridgeAttributes (\r
-        RootBridgeInstance,\r
-        PciAddress\r
-        );\r
-      return EFI_SUCCESS;\r
+      break;\r

     }\r
     List = List->ForwardLink;\r
   }\r
     }\r
     List = List->ForwardLink;\r
   }\r

+  if (List == &HostBridgeInstance->Head) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r

 \r
 \r

-  return EFI_INVALID_PARAMETER;\r
+  if ((UINT32)Phase > EfiPciBeforeResourceCollection) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r
+\r
+  return EFI_SUCCESS;\r

 }\r
 }\r