+ ## Specifies max supported number of Logical Processors.\r
+ # @Prompt Configure max supported number of Logical Processors\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002\r
+\r
+ ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must\r
+ ## aligns the address on a 4-KByte boundary.\r
+ # @Prompt Configure stack size for Application Processor (AP)\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003\r
+\r
+ ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.\r
+ # @Prompt Stack size in the temporary RAM.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003\r
+\r
+ ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.\r
+ # @Prompt SMM profile data buffer size.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107\r
+\r
+ ## Specifies stack size in bytes for each processor in SMM.\r
+ # @Prompt Processor stack size in SMM.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105\r
+\r
+ ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.\r
+ # @Prompt AP synchronization timeout value in SMM.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104\r
+\r
+ ## Indicates if SMM Code Access Check is enabled.\r
+ # If enabled, the SMM handler cannot execute the code outside SMM regions.\r
+ # This PCD is suggested to TRUE in production image.<BR><BR>\r
+ # TRUE - SMM Code Access Check will be enabled.<BR>\r
+ # FALSE - SMM Code Access Check will be disabled.<BR>\r
+ # @Prompt SMM Code Access Check.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013\r
+\r
+ ## Indicates the CPU synchronization method used when processing an SMI.\r
+ # 0x00 - Traditional CPU synchronization method.<BR>\r
+ # 0x01 - Relaxed CPU synchronization method.<BR>\r
+ # @Prompt SMM CPU Synchronization Method.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014\r
+\r
+[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r
+ ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.\r
+ # @Prompt Timeout for the BSP to detect all APs for the first time.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004\r
+ ## Specifies the base address of the first microcode Patch in the microcode Region.\r
+ # @Prompt Microcode Region base address.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005\r
+ ## Specifies the size of the microcode Region.\r
+ # @Prompt Microcode Region size.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006\r
+\r
+[PcdsDynamic, PcdsDynamicEx]\r
+ ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.\r
+ # @Prompt The pointer to a CPU S3 data buffer.\r
+ # @ValidList 0x80000001 | 0\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010\r
+\r
+ ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.\r
+ # @Prompt The pointer to CPU Hot Plug Data.\r
+ # @ValidList 0x80000001 | 0\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011\r
+\r