+ {
+ TCGv t0, t1, t2;
+ t0 = tcg_temp_new();
+ tcg_gen_andi_i32(t0, cpu_sr, SR_T);
+ t1 = tcg_temp_new();
+ tcg_gen_add_i32(t1, REG(B7_4), REG(B11_8));
+ tcg_gen_add_i32(t0, t0, t1);
+ t2 = tcg_temp_new();
+ tcg_gen_setcond_i32(TCG_COND_GTU, t2, REG(B11_8), t1);
+ tcg_gen_setcond_i32(TCG_COND_GTU, t1, t1, t0);
+ tcg_gen_or_i32(t1, t1, t2);
+ tcg_temp_free(t2);
+ tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_T);
+ tcg_gen_or_i32(cpu_sr, cpu_sr, t1);
+ tcg_temp_free(t1);
+ tcg_gen_mov_i32(REG(B11_8), t0);
+ tcg_temp_free(t0);
+ }